xref: /OK3568_Linux_fs/external/mpp/inc/vpu_api.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1 /*
2  * Copyright 2015 Rockchip Electronics Co. LTD
3  *
4  * Licensed under the Apache License, Version 2.0 (the "License");
5  * you may not use this file except in compliance with the License.
6  * You may obtain a copy of the License at
7  *
8  *      http://www.apache.org/licenses/LICENSE-2.0
9  *
10  * Unless required by applicable law or agreed to in writing, software
11  * distributed under the License is distributed on an "AS IS" BASIS,
12  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13  * See the License for the specific language governing permissions and
14  * limitations under the License.
15  */
16 
17 #ifndef __VPU_API_H__
18 #define __VPU_API_H__
19 
20 #include "rk_type.h"
21 #include "mpp_err.h"
22 
23 /**
24  * @brief rockchip media process interface
25  */
26 
27 #define VPU_API_NOPTS_VALUE          (0x8000000000000000LL)
28 
29 /*
30  * bit definition of ColorType in structure VPU_FRAME
31  */
32 #define VPU_OUTPUT_FORMAT_TYPE_MASK                 (0x0000ffff)
33 #define VPU_OUTPUT_FORMAT_ARGB8888                  (0x00000000)
34 #define VPU_OUTPUT_FORMAT_ABGR8888                  (0x00000001)
35 #define VPU_OUTPUT_FORMAT_RGB888                    (0x00000002)
36 #define VPU_OUTPUT_FORMAT_RGB565                    (0x00000003)
37 #define VPU_OUTPUT_FORMAT_RGB555                    (0x00000004)
38 #define VPU_OUTPUT_FORMAT_YUV420_SEMIPLANAR         (0x00000005)
39 #define VPU_OUTPUT_FORMAT_YUV420_PLANAR             (0x00000006)
40 #define VPU_OUTPUT_FORMAT_YUV422                    (0x00000007)
41 #define VPU_OUTPUT_FORMAT_YUV444                    (0x00000008)
42 #define VPU_OUTPUT_FORMAT_YCH420                    (0x00000009)
43 #define VPU_OUTPUT_FORMAT_BIT_MASK                  (0x000f0000)
44 #define VPU_OUTPUT_FORMAT_BIT_8                     (0x00000000)
45 #define VPU_OUTPUT_FORMAT_BIT_10                    (0x00010000)
46 #define VPU_OUTPUT_FORMAT_BIT_12                    (0x00020000)
47 #define VPU_OUTPUT_FORMAT_BIT_14                    (0x00030000)
48 #define VPU_OUTPUT_FORMAT_BIT_16                    (0x00040000)
49 #define VPU_OUTPUT_FORMAT_FBC_MASK                  (0x00f00000)
50 #define VPU_OUTPUT_FORMAT_FBC_AFBC_V1               (0x00100000)
51 #define VPU_OUTPUT_FORMAT_FBC_AFBC_V2               (0x00200000)
52 #define VPU_OUTPUT_FORMAT_DYNCRANGE_MASK            (0x0f000000)
53 #define VPU_OUTPUT_FORMAT_DYNCRANGE_SDR             (0x00000000)
54 #define VPU_OUTPUT_FORMAT_DYNCRANGE_HDR10           (0x01000000)
55 #define VPU_OUTPUT_FORMAT_DYNCRANGE_HDR_HLG         (0x02000000)
56 #define VPU_OUTPUT_FORMAT_DYNCRANGE_HDR_DOLBY       (0x03000000)
57 
58 /**
59  * @brief input picture type
60  */
61 typedef enum {
62     ENC_INPUT_YUV420_PLANAR = 0,              /**< YYYY... UUUU... VVVV */
63     ENC_INPUT_YUV420_SEMIPLANAR = 1,          /**< YYYY... UVUVUV...    */
64     ENC_INPUT_YUV422_INTERLEAVED_YUYV = 2,    /**< YUYVYUYV...          */
65     ENC_INPUT_YUV422_INTERLEAVED_UYVY = 3,    /**< UYVYUYVY...          */
66     ENC_INPUT_RGB565 = 4,                     /**< 16-bit RGB           */
67     ENC_INPUT_BGR565 = 5,                     /**< 16-bit RGB           */
68     ENC_INPUT_RGB555 = 6,                     /**< 15-bit RGB           */
69     ENC_INPUT_BGR555 = 7,                     /**< 15-bit RGB           */
70     ENC_INPUT_RGB444 = 8,                     /**< 12-bit RGB           */
71     ENC_INPUT_BGR444 = 9,                     /**< 12-bit RGB           */
72     ENC_INPUT_RGB888 = 10,                    /**< 24-bit RGB           */
73     ENC_INPUT_BGR888 = 11,                    /**< 24-bit RGB           */
74     ENC_INPUT_RGB101010 = 12,                 /**< 30-bit RGB           */
75     ENC_INPUT_BGR101010 = 13                  /**< 30-bit RGB           */
76 } EncInputPictureType;
77 
78 typedef enum VPU_API_CMD {
79     VPU_API_ENC_SETCFG,
80     VPU_API_ENC_GETCFG,
81     VPU_API_ENC_SETFORMAT,
82     VPU_API_ENC_SETIDRFRAME,
83 
84     VPU_API_ENABLE_DEINTERLACE,
85     VPU_API_SET_VPUMEM_CONTEXT,
86     VPU_API_USE_PRESENT_TIME_ORDER,
87     VPU_API_SET_DEFAULT_WIDTH_HEIGH,
88     VPU_API_SET_INFO_CHANGE,
89     VPU_API_USE_FAST_MODE,
90     VPU_API_DEC_GET_STREAM_COUNT,
91     VPU_API_GET_VPUMEM_USED_COUNT,
92     VPU_API_GET_FRAME_INFO,
93     VPU_API_SET_OUTPUT_BLOCK,
94     VPU_API_GET_EOS_STATUS,
95     VPU_API_SET_OUTPUT_MODE,
96 
97     /* get sps/pps header */
98     VPU_API_GET_EXTRA_INFO = 0x200,
99 
100     VPU_API_SET_IMMEDIATE_OUT = 0x1000,
101     VPU_API_SET_PARSER_SPLIT_MODE,          /* NOTE: should control before init */
102     VPU_API_DEC_OUT_FRM_STRUCT_TYPE,
103     VPU_API_DEC_EN_THUMBNAIL,
104     VPU_API_DEC_EN_HDR_META,
105     VPU_API_DEC_EN_MVC,
106     VPU_API_DEC_EN_FBC_HDR_256_ODD,
107     VPU_API_SET_INPUT_BLOCK,
108 
109     /* set pkt/frm ready callback */
110     VPU_API_SET_PKT_RDY_CB = 0x1100,
111     VPU_API_SET_FRM_RDY_CB,
112 
113     VPU_API_ENC_VEPU22_START = 0x2000,
114     VPU_API_ENC_SET_VEPU22_CFG,
115     VPU_API_ENC_GET_VEPU22_CFG,
116     VPU_API_ENC_SET_VEPU22_CTU_QP,
117     VPU_API_ENC_SET_VEPU22_ROI,
118 
119     VPU_API_ENC_MPP        = 0x3000,
120     VPU_API_ENC_MPP_SETCFG,
121     VPU_API_ENC_MPP_GETCFG,
122 
123     /* mlvec dynamic configure */
124     VPU_API_ENC_MLVEC_CFG = 0x4000,
125     VPU_API_ENC_SET_MAX_TID,
126     VPU_API_ENC_SET_MARK_LTR,
127     VPU_API_ENC_SET_USE_LTR,
128     VPU_API_ENC_SET_FRAME_QP,
129     VPU_API_ENC_SET_BASE_LAYER_PID,
130 } VPU_API_CMD;
131 
132 typedef struct {
133     RK_U32   TimeLow;
134     RK_U32   TimeHigh;
135 } TIME_STAMP;
136 
137 typedef struct {
138     RK_U32   CodecType;
139     RK_U32   ImgWidth;
140     RK_U32   ImgHeight;
141     RK_U32   ImgHorStride;
142     RK_U32   ImgVerStride;
143     RK_U32   BufSize;
144 } VPU_GENERIC;
145 
146 typedef struct VPUMem {
147     RK_U32  phy_addr;
148     RK_U32 *vir_addr;
149     RK_U32  size;
150     RK_U32 *offset;
151 } VPUMemLinear_t;
152 
153 typedef struct tVPU_FRAME {
154     RK_U32              FrameBusAddr[2];    // 0: Y address; 1: UV address;
155     RK_U32              FrameWidth;         // buffer horizontal stride
156     RK_U32              FrameHeight;        // buffer vertical   stride
157     RK_U32              OutputWidth;        // deprecated
158     RK_U32              OutputHeight;       // deprecated
159     RK_U32              DisplayWidth;       // valid width  for display
160     RK_U32              DisplayHeight;      // valid height for display
161     RK_U32              CodingType;
162     RK_U32              FrameType;          // frame; top_field_first; bot_field_first
163     RK_U32              ColorType;
164     RK_U32              DecodeFrmNum;
165     TIME_STAMP          ShowTime;
166     RK_U32              ErrorInfo;          // error information
167     RK_U32              employ_cnt;
168     VPUMemLinear_t      vpumem;
169     struct tVPU_FRAME  *next_frame;
170     union {
171         struct {
172             RK_U32      Res0[2];
173             struct {
174                 RK_U32      ColorPrimaries : 8;
175                 RK_U32      ColorTransfer  : 8;
176                 RK_U32      ColorCoeffs    : 8;
177                 RK_U32      ColorRange     : 1;
178                 RK_U32      Res1           : 7;
179             };
180 
181             RK_U32      Res2;
182         };
183 
184         RK_U32          Res[4];
185     };
186 } VPU_FRAME;
187 
188 typedef struct FrameThumbInfo {
189     RK_U32      enable;
190     RK_U32      yOffset;
191     RK_U32      uvOffset;
192 } FrameThumbInfo_t;
193 
194 typedef struct FrameHdrInfo {
195     RK_U32      isHdr;
196     RK_U32      offset;
197     RK_U32      size;
198 } FrameHdrInfo_t;
199 
200 typedef struct VideoFrame {
201     VPU_FRAME        vpuFrame;
202     FrameThumbInfo_t thumbInfo;
203     FrameHdrInfo_t   hdrInfo;
204     RK_U32           viewId;
205     RK_U32           reserved[16];
206 } VideoFrame_t;
207 
208 typedef struct VideoPacket {
209     RK_S64 pts;                /* with unit of us*/
210     RK_S64 dts;                /* with unit of us*/
211     RK_U8 *data;
212     RK_S32 size;
213     RK_U32 capability;
214     RK_U32 nFlags;
215 } VideoPacket_t;
216 
217 typedef struct DecoderOut {
218     RK_U8 *data;
219     RK_U32 size;
220     RK_S64 timeUs;
221     RK_S32 nFlags;
222 } DecoderOut_t;
223 
224 typedef struct ParserOut {
225     RK_U8 *data;
226     RK_U32 size;
227     RK_S64 timeUs;
228     RK_U32 nFlags;
229     RK_U32 width;
230     RK_U32 height;
231 } ParserOut_t;
232 
233 typedef struct EncInputStream {
234     RK_U8 *buf;
235     RK_S32 size;
236     RK_U32 bufPhyAddr;
237     RK_S64 timeUs;
238     RK_U32 nFlags;
239 } EncInputStream_t;
240 
241 typedef struct EncoderOut {
242     RK_U8 *data;
243     RK_S32 size;
244     RK_S64 timeUs;
245     RK_S32 keyFrame;
246 
247 } EncoderOut_t;
248 
249 typedef RK_S32 (*VpuFrmRdyCbFunc)(void *cb_ctx);
250 
251 typedef struct {
252     VpuFrmRdyCbFunc cb;
253     void           *cbCtx;
254 } FrameRdyCB;
255 
256 /*
257  * @brief Enumeration used to define the possible video compression codings.
258  * @note  This essentially refers to file extensions. If the coding is
259  *        being used to specify the ENCODE type, then additional work
260  *        must be done to configure the exact flavor of the compression
261  *        to be used.  For decode cases where the user application can
262  *        not differentiate between MPEG-4 and H.264 bit streams, it is
263  *        up to the codec to handle this.
264  *
265  *        sync with the omx_video.h
266  */
267 typedef enum OMX_RK_VIDEO_CODINGTYPE {
268     OMX_RK_VIDEO_CodingUnused,                          /**< Value when coding is N/A */
269     OMX_RK_VIDEO_CodingAutoDetect,                      /**< Autodetection of coding type */
270     OMX_RK_VIDEO_CodingMPEG2,                           /**< AKA: H.262 */
271     OMX_RK_VIDEO_CodingH263,                            /**< H.263 */
272     OMX_RK_VIDEO_CodingMPEG4,                           /**< MPEG-4 */
273     OMX_RK_VIDEO_CodingWMV,                             /**< Windows Media Video (WMV1,WMV2,WMV3)*/
274     OMX_RK_VIDEO_CodingRV,                              /**< all versions of Real Video */
275     OMX_RK_VIDEO_CodingAVC,                             /**< H.264/AVC */
276     OMX_RK_VIDEO_CodingMJPEG,                           /**< Motion JPEG */
277     OMX_RK_VIDEO_CodingVP8,                             /**< VP8 */
278     OMX_RK_VIDEO_CodingVP9,                             /**< VP9 */
279     OMX_RK_VIDEO_CodingVC1 = 0x01000000,                /**< Windows Media Video (WMV1,WMV2,WMV3)*/
280     OMX_RK_VIDEO_CodingFLV1,                            /**< Sorenson H.263 */
281     OMX_RK_VIDEO_CodingDIVX3,                           /**< DIVX3 */
282     OMX_RK_VIDEO_CodingVP6,
283     OMX_RK_VIDEO_CodingHEVC,                            /**< H.265/HEVC */
284     OMX_RK_VIDEO_CodingAVSPLUS,                         /**< AVS+ profile 0x48 */
285     OMX_RK_VIDEO_CodingAVS,                             /**< AVS  profile 0x20 */
286     OMX_RK_VIDEO_CodingAVS2,                            /**< AVS2 */
287     OMX_RK_VIDEO_CodingAV1,                             /**< av1 */
288     OMX_RK_VIDEO_CodingKhronosExtensions = 0x6F000000,  /**< Reserved region for introducing Khronos Standard Extensions */
289     OMX_RK_VIDEO_CodingVendorStartUnused = 0x7F000000,  /**< Reserved region for introducing Vendor Extensions */
290     OMX_RK_VIDEO_CodingMax = 0x7FFFFFFF
291 } OMX_RK_VIDEO_CODINGTYPE;
292 
293 typedef enum CODEC_TYPE {
294     CODEC_NONE,
295     CODEC_DECODER,
296     CODEC_ENCODER,
297     CODEC_BUTT,
298 } CODEC_TYPE;
299 
300 typedef enum VPU_API_ERR {
301     VPU_API_OK                      = 0,
302     VPU_API_ERR_UNKNOW              = -1,
303     VPU_API_ERR_BASE                = -1000,
304     VPU_API_ERR_LIST_STREAM         = VPU_API_ERR_BASE - 1,
305     VPU_API_ERR_INIT                = VPU_API_ERR_BASE - 2,
306     VPU_API_ERR_VPU_CODEC_INIT      = VPU_API_ERR_BASE - 3,
307     VPU_API_ERR_STREAM              = VPU_API_ERR_BASE - 4,
308     VPU_API_ERR_FATAL_THREAD        = VPU_API_ERR_BASE - 5,
309     VPU_API_EOS_STREAM_REACHED      = VPU_API_ERR_BASE - 11,
310 
311     VPU_API_ERR_BUTT,
312 } VPU_API_ERR;
313 
314 typedef enum VPU_FRAME_ERR {
315     VPU_FRAME_ERR_UNKNOW           = 0x0001,
316     VPU_FRAME_ERR_UNSUPPORT        = 0x0002,
317 
318 } VPU_FRAME_ERR;
319 
320 typedef struct EncParameter {
321     RK_S32 width;
322     RK_S32 height;
323     RK_S32 rc_mode;                 /* 0 - CQP mode; 1 - CBR mode; 2 - FIXQP mode*/
324     RK_S32 bitRate;                 /* target bitrate */
325     RK_S32 framerate;
326     RK_S32 qp;
327     RK_S32 enableCabac;
328     RK_S32 cabacInitIdc;
329     RK_S32 format;
330     RK_S32 intraPicRate;
331     RK_S32 framerateout;
332     RK_S32 profileIdc;
333     RK_S32 levelIdc;
334     RK_S32 reserved[3];
335 } EncParameter_t;
336 
337 typedef struct EXtraCfg {
338     RK_S32 vc1extra_size;
339     RK_S32 vp6codeid;
340     RK_S32 tsformat;
341     RK_U32 ori_vpu; /* use origin vpu framework */
342     /* below used in decode */
343     RK_U32 mpp_mode;     /* use mpp framework */
344     RK_U32 bit_depth;    /* 8 or 10 bit */
345     RK_U32 yuv_format;   /* 0:420 1:422 2:444 */
346     RK_U32 reserved[16];
347 } EXtraCfg_t;
348 
349 /**
350  * @brief vpu function interface
351  */
352 typedef struct VpuCodecContext {
353     void* vpuApiObj;
354 
355     CODEC_TYPE codecType;
356     OMX_RK_VIDEO_CODINGTYPE videoCoding;
357 
358     RK_U32 width;
359     RK_U32 height;
360     void  *extradata;
361     RK_S32 extradata_size;
362 
363     RK_U8  enableparsing;
364 
365     RK_S32 no_thread;
366     EXtraCfg_t extra_cfg;
367 
368     void* private_data;
369 
370     /*
371      ** 1: error state(not working)  0: working
372     */
373     RK_S32 decoder_err;
374 
375 
376     /**
377      * Allocate and initialize an VpuCodecContext.
378      *
379      * @param ctx The context of vpu api, allocated in this function.
380      * @param extraData The extra data of codec, some codecs need / can
381      *        use extradata like Huffman tables, also live VC1 codec can
382      *        use extradata to initialize itself.
383      * @param extra_size The size of extra data.
384      *
385      * @return 0 for init success, others for failure.
386      * @note check whether ctx has been allocated success after you do init.
387      */
388     RK_S32 (*init)(struct VpuCodecContext *ctx, RK_U8 *extraData, RK_U32 extra_size);
389     /**
390      * @brief both send video stream packet to decoder and get video frame from
391      *        decoder at the same time
392      * @param ctx The context of vpu codec
393      * @param pkt[in] Stream to be decoded
394      * @param aDecOut[out] Decoding frame
395      * @return 0 for decode success, others for failure.
396      */
397     RK_S32 (*decode)(struct VpuCodecContext *ctx, VideoPacket_t *pkt, DecoderOut_t *aDecOut);
398     /**
399      * @brief both send video frame to encoder and get encoded video stream from
400      *        encoder at the same time.
401      * @param ctx The context of vpu codec
402      * @param aEncInStrm[in] Frame to be encoded
403      * @param aEncOut[out] Encoding stream
404      * @return 0 for encode success, others for failure.
405      */
406     RK_S32 (*encode)(struct VpuCodecContext *ctx, EncInputStream_t *aEncInStrm, EncoderOut_t *aEncOut);
407     /**
408      * @brief flush codec while do fast forward playing.
409      * @param ctx The context of vpu codec
410      * @return 0 for flush success, others for failure.
411      */
412     RK_S32 (*flush)(struct VpuCodecContext *ctx);
413     RK_S32 (*control)(struct VpuCodecContext *ctx, VPU_API_CMD cmdType, void* param);
414     /**
415      * @brief send video stream packet to decoder only, async interface
416      * @param ctx The context of vpu codec
417      * @param pkt Stream to be decoded
418      * @return 0 for success, others for failure.
419      */
420     RK_S32 (*decode_sendstream)(struct VpuCodecContext *ctx, VideoPacket_t *pkt);
421     /**
422      * @brief get video frame from decoder only, async interface
423      * @param ctx The context of vpu codec
424      * @param aDecOut Decoding frame
425      * @return 0 for success, others for failure.
426      */
427     RK_S32 (*decode_getframe)(struct VpuCodecContext *ctx, DecoderOut_t *aDecOut);
428     /**
429      * @brief send video frame to encoder only, async interface
430      * @param ctx The context of vpu codec
431      * @param aEncInStrm Frame to be encoded
432      * @return 0 for success, others for failure.
433      */
434     RK_S32 (*encoder_sendframe)(struct VpuCodecContext *ctx, EncInputStream_t *aEncInStrm);
435     /**
436      * @brief get encoded video packet from encoder only, async interface
437      * @param ctx The context of vpu codec
438      * @param aEncOut Encoding stream
439      * @return 0 for success, others for failure.
440      */
441     RK_S32 (*encoder_getstream)(struct VpuCodecContext *ctx, EncoderOut_t *aEncOut);
442 } VpuCodecContext_t;
443 
444 /* allocated vpu codec context */
445 #ifdef __cplusplus
446 extern "C"
447 {
448 #endif
449 
450 /**
451  * @brief open context of vpu
452  * @param ctx pointer of vpu codec context
453  */
454 RK_S32 vpu_open_context(struct VpuCodecContext **ctx);
455 /**
456  * @brief close context of vpu
457  * @param ctx pointer of vpu codec context
458  */
459 RK_S32 vpu_close_context(struct VpuCodecContext **ctx);
460 
461 #ifdef __cplusplus
462 }
463 #endif
464 
465 /*
466  * vpu_mem api
467  */
468 #define vpu_display_mem_pool_FIELDS \
469     RK_S32 (*commit_hdl)(vpu_display_mem_pool *p, RK_S32 hdl, RK_S32 size); \
470     void* (*get_free)(vpu_display_mem_pool *p); \
471     RK_S32 (*inc_used)(vpu_display_mem_pool *p, void *hdl); \
472     RK_S32 (*put_used)(vpu_display_mem_pool *p, void *hdl); \
473     RK_S32 (*reset)(vpu_display_mem_pool *p); \
474     RK_S32 (*get_unused_num)(vpu_display_mem_pool *p); \
475     RK_S32 buff_size;\
476     float version; \
477     RK_S32 res[18];
478 
479 typedef struct vpu_display_mem_pool vpu_display_mem_pool;
480 
481 struct vpu_display_mem_pool {
482     vpu_display_mem_pool_FIELDS
483 };
484 
485 #ifdef __cplusplus
486 extern "C"
487 {
488 #endif
489 
490 /*
491  * vpu memory handle interface
492  */
493 RK_S32 VPUMemJudgeIommu(void);
494 RK_S32 VPUMallocLinear(VPUMemLinear_t *p, RK_U32 size);
495 RK_S32 VPUFreeLinear(VPUMemLinear_t *p);
496 RK_S32 VPUMemDuplicate(VPUMemLinear_t *dst, VPUMemLinear_t *src);
497 RK_S32 VPUMemLink(VPUMemLinear_t *p);
498 RK_S32 VPUMemFlush(VPUMemLinear_t *p);
499 RK_S32 VPUMemClean(VPUMemLinear_t *p);
500 RK_S32 VPUMemInvalidate(VPUMemLinear_t *p);
501 RK_S32 VPUMemGetFD(VPUMemLinear_t *p);
502 RK_S32 VPUMallocLinearFromRender(VPUMemLinear_t *p, RK_U32 size, void *ctx);
503 
504 /*
505  * vpu memory allocator and manager interface
506  */
507 vpu_display_mem_pool* open_vpu_memory_pool(void);
508 void close_vpu_memory_pool(vpu_display_mem_pool *p);
509 int create_vpu_memory_pool_allocator(vpu_display_mem_pool **ipool, int num, int size);
510 void release_vpu_memory_pool_allocator(vpu_display_mem_pool *ipool);
511 
512 #ifdef __cplusplus
513 }
514 #endif
515 
516 #endif /*__VPU_API_H__*/
517