1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (C) 2021 Rockchip Electronics Co., Ltd. 3*4882a593Smuzhiyun * Authors: 4*4882a593Smuzhiyun * Cerf Yu <cerf.yu@rock-chips.com> 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * Licensed under the Apache License, Version 2.0 (the "License"); 7*4882a593Smuzhiyun * you may not use this file except in compliance with the License. 8*4882a593Smuzhiyun * You may obtain a copy of the License at 9*4882a593Smuzhiyun * 10*4882a593Smuzhiyun * http://www.apache.org/licenses/LICENSE-2.0 11*4882a593Smuzhiyun * 12*4882a593Smuzhiyun * Unless required by applicable law or agreed to in writing, software 13*4882a593Smuzhiyun * distributed under the License is distributed on an "AS IS" BASIS, 14*4882a593Smuzhiyun * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 15*4882a593Smuzhiyun * See the License for the specific language governing permissions and 16*4882a593Smuzhiyun * limitations under the License. 17*4882a593Smuzhiyun */ 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun #ifndef _RGA_IM2D_HARDWARE_H_ 20*4882a593Smuzhiyun #define _RGA_IM2D_HARDWARE_H_ 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun #include "rga_ioctl.h" 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun typedef enum { 25*4882a593Smuzhiyun IM_RGA_HW_VERSION_RGA_V_ERR_INDEX = 0x0, 26*4882a593Smuzhiyun IM_RGA_HW_VERSION_RGA_1_INDEX, 27*4882a593Smuzhiyun IM_RGA_HW_VERSION_RGA_1_PLUS_INDEX, 28*4882a593Smuzhiyun IM_RGA_HW_VERSION_RGA_2_INDEX, 29*4882a593Smuzhiyun IM_RGA_HW_VERSION_RGA_2_LITE0_INDEX, 30*4882a593Smuzhiyun IM_RGA_HW_VERSION_RGA_2_LITE1_INDEX, 31*4882a593Smuzhiyun IM_RGA_HW_VERSION_RGA_2_ENHANCE_INDEX, 32*4882a593Smuzhiyun IM_RGA_HW_VERSION_RGA_3_INDEX, 33*4882a593Smuzhiyun IM_RGA_HW_VERSION_MASK_INDEX, 34*4882a593Smuzhiyun } IM_RGA_HW_VERSION_INDEX; 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun typedef enum { 37*4882a593Smuzhiyun IM_RGA_HW_VERSION_RGA_V_ERR = 1 << IM_RGA_HW_VERSION_RGA_V_ERR_INDEX, 38*4882a593Smuzhiyun IM_RGA_HW_VERSION_RGA_1 = 1 << IM_RGA_HW_VERSION_RGA_1_INDEX, 39*4882a593Smuzhiyun IM_RGA_HW_VERSION_RGA_1_PLUS = 1 << IM_RGA_HW_VERSION_RGA_1_PLUS_INDEX, 40*4882a593Smuzhiyun IM_RGA_HW_VERSION_RGA_2 = 1 << IM_RGA_HW_VERSION_RGA_2_INDEX, 41*4882a593Smuzhiyun IM_RGA_HW_VERSION_RGA_2_LITE0 = 1 << IM_RGA_HW_VERSION_RGA_2_LITE0_INDEX, 42*4882a593Smuzhiyun IM_RGA_HW_VERSION_RGA_2_LITE1 = 1 << IM_RGA_HW_VERSION_RGA_2_LITE1_INDEX, 43*4882a593Smuzhiyun IM_RGA_HW_VERSION_RGA_2_ENHANCE = 1 << IM_RGA_HW_VERSION_RGA_2_ENHANCE_INDEX, 44*4882a593Smuzhiyun IM_RGA_HW_VERSION_RGA_3 = 1 << IM_RGA_HW_VERSION_RGA_3_INDEX, 45*4882a593Smuzhiyun IM_RGA_HW_VERSION_MASK = ~((~(unsigned int)0x0 << IM_RGA_HW_VERSION_MASK_INDEX) | 1), 46*4882a593Smuzhiyun }IM_RGA_HW_VERSION; 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun typedef enum { 49*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_ERROR_INDEX = 0, 50*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_RGB_INDEX, 51*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_RGB_OTHER_INDEX, 52*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_BPP_INDEX, 53*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_420_SEMI_PLANNER_8_BIT_INDEX, 54*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_420_SEMI_PLANNER_10_BIT_INDEX, 55*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_420_PLANNER_8_BIT_INDEX, 56*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_420_PLANNER_10_BIT_INDEX, 57*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_422_SEMI_PLANNER_8_BIT_INDEX, 58*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_422_SEMI_PLANNER_10_BIT_INDEX, 59*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_422_PLANNER_8_BIT_INDEX, 60*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_422_PLANNER_10_BIT_INDEX, 61*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUYV_420_INDEX, 62*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUYV_422_INDEX, 63*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_400_INDEX, 64*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_Y4_INDEX, 65*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_RGBA2BPP_INDEX, 66*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_MASK_INDEX, 67*4882a593Smuzhiyun } IM_RGA_SUPPORT_FORMAT_INDEX; 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun typedef enum { 70*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_ERROR = 1 << IM_RGA_SUPPORT_FORMAT_ERROR_INDEX, 71*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_RGB = 1 << IM_RGA_SUPPORT_FORMAT_RGB_INDEX, 72*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_RGB_OTHER = 1 << IM_RGA_SUPPORT_FORMAT_RGB_OTHER_INDEX, 73*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_BPP = 1 << IM_RGA_SUPPORT_FORMAT_BPP_INDEX, 74*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_420_SEMI_PLANNER_8_BIT = 1 << IM_RGA_SUPPORT_FORMAT_YUV_420_SEMI_PLANNER_8_BIT_INDEX, 75*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_420_SEMI_PLANNER_10_BIT = 1 << IM_RGA_SUPPORT_FORMAT_YUV_420_SEMI_PLANNER_10_BIT_INDEX, 76*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_420_PLANNER_8_BIT = 1 << IM_RGA_SUPPORT_FORMAT_YUV_420_PLANNER_8_BIT_INDEX, 77*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_420_PLANNER_10_BIT = 1 << IM_RGA_SUPPORT_FORMAT_YUV_420_PLANNER_10_BIT_INDEX, 78*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_422_SEMI_PLANNER_8_BIT = 1 << IM_RGA_SUPPORT_FORMAT_YUV_422_SEMI_PLANNER_8_BIT_INDEX, 79*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_422_SEMI_PLANNER_10_BIT = 1 << IM_RGA_SUPPORT_FORMAT_YUV_422_SEMI_PLANNER_10_BIT_INDEX, 80*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_422_PLANNER_8_BIT = 1 << IM_RGA_SUPPORT_FORMAT_YUV_422_PLANNER_8_BIT_INDEX, 81*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_422_PLANNER_10_BIT = 1 << IM_RGA_SUPPORT_FORMAT_YUV_422_PLANNER_10_BIT_INDEX, 82*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUYV_420 = 1 << IM_RGA_SUPPORT_FORMAT_YUYV_420_INDEX, 83*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUYV_422 = 1 << IM_RGA_SUPPORT_FORMAT_YUYV_422_INDEX, 84*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_400 = 1 << IM_RGA_SUPPORT_FORMAT_YUV_400_INDEX, 85*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_Y4 = 1 << IM_RGA_SUPPORT_FORMAT_Y4_INDEX, 86*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_RGBA2BPP = 1 << IM_RGA_SUPPORT_FORMAT_RGBA2BPP_INDEX, 87*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_MASK = ~((~(unsigned int)0x0 << IM_RGA_SUPPORT_FORMAT_MASK_INDEX) | 1), 88*4882a593Smuzhiyun } IM_RGA_SUPPORT_FORMAT; 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun typedef enum { 91*4882a593Smuzhiyun IM_RGA_SUPPORT_FEATURE_ERROR_INDEX = 0, 92*4882a593Smuzhiyun IM_RGA_SUPPORT_FEATURE_COLOR_FILL_INDEX, 93*4882a593Smuzhiyun IM_RGA_SUPPORT_FEATURE_COLOR_PALETTE_INDEX, 94*4882a593Smuzhiyun IM_RGA_SUPPORT_FEATURE_ROP_INDEX, 95*4882a593Smuzhiyun IM_RGA_SUPPORT_FEATURE_QUANTIZE_INDEX, 96*4882a593Smuzhiyun IM_RGA_SUPPORT_FEATURE_SRC1_R2Y_CSC_INDEX, 97*4882a593Smuzhiyun IM_RGA_SUPPORT_FEATURE_DST_FULL_CSC_INDEX, 98*4882a593Smuzhiyun IM_RGA_SUPPORT_FEATURE_FBC_INDEX, 99*4882a593Smuzhiyun IM_RGA_SUPPORT_FEATURE_BLEND_YUV_INDEX, 100*4882a593Smuzhiyun IM_RGA_SUPPORT_FEATURE_BT2020_INDEX, 101*4882a593Smuzhiyun IM_RGA_SUPPORT_FEATURE_MOSAIC_INDEX, 102*4882a593Smuzhiyun IM_RGA_SUPPORT_FEATURE_OSD_INDEX, 103*4882a593Smuzhiyun IM_RGA_SUPPORT_FEATURE_PRE_INTR_INDEX, 104*4882a593Smuzhiyun IM_RGA_SUPPORT_FEATURE_MASK_INDEX, 105*4882a593Smuzhiyun } IM_RGA_SUPPORT_FEATURE_INDEX; 106*4882a593Smuzhiyun 107*4882a593Smuzhiyun typedef enum { 108*4882a593Smuzhiyun IM_RGA_SUPPORT_FEATURE_ERROR = 1 << IM_RGA_SUPPORT_FEATURE_ERROR_INDEX, 109*4882a593Smuzhiyun IM_RGA_SUPPORT_FEATURE_COLOR_FILL = 1 << IM_RGA_SUPPORT_FEATURE_COLOR_FILL_INDEX, 110*4882a593Smuzhiyun IM_RGA_SUPPORT_FEATURE_COLOR_PALETTE = 1 << IM_RGA_SUPPORT_FEATURE_COLOR_PALETTE_INDEX, 111*4882a593Smuzhiyun IM_RGA_SUPPORT_FEATURE_ROP = 1 << IM_RGA_SUPPORT_FEATURE_ROP_INDEX, 112*4882a593Smuzhiyun IM_RGA_SUPPORT_FEATURE_QUANTIZE = 1 << IM_RGA_SUPPORT_FEATURE_QUANTIZE_INDEX, 113*4882a593Smuzhiyun IM_RGA_SUPPORT_FEATURE_SRC1_R2Y_CSC = 1 << IM_RGA_SUPPORT_FEATURE_SRC1_R2Y_CSC_INDEX, 114*4882a593Smuzhiyun IM_RGA_SUPPORT_FEATURE_DST_FULL_CSC = 1 << IM_RGA_SUPPORT_FEATURE_DST_FULL_CSC_INDEX, 115*4882a593Smuzhiyun IM_RGA_SUPPORT_FEATURE_FBC = 1 << IM_RGA_SUPPORT_FEATURE_FBC_INDEX, 116*4882a593Smuzhiyun IM_RGA_SUPPORT_FEATURE_BLEND_YUV = 1 << IM_RGA_SUPPORT_FEATURE_BLEND_YUV_INDEX, 117*4882a593Smuzhiyun IM_RGA_SUPPORT_FEATURE_BT2020 = 1 << IM_RGA_SUPPORT_FEATURE_BT2020_INDEX, 118*4882a593Smuzhiyun IM_RGA_SUPPORT_FEATURE_MOSAIC = 1 << IM_RGA_SUPPORT_FEATURE_MOSAIC_INDEX, 119*4882a593Smuzhiyun IM_RGA_SUPPORT_FEATURE_OSD = 1 << IM_RGA_SUPPORT_FEATURE_OSD_INDEX, 120*4882a593Smuzhiyun IM_RGA_SUPPORT_FEATURE_PRE_INTR = 1 << IM_RGA_SUPPORT_FEATURE_PRE_INTR_INDEX, 121*4882a593Smuzhiyun IM_RGA_SUPPORT_FEATURE_MASK = ~((~(unsigned int)0x0 << IM_RGA_SUPPORT_FEATURE_MASK_INDEX) | 1), 122*4882a593Smuzhiyun } IM_RGA_SUPPORT_FEATURE; 123*4882a593Smuzhiyun 124*4882a593Smuzhiyun typedef struct { 125*4882a593Smuzhiyun unsigned int version; 126*4882a593Smuzhiyun unsigned int input_resolution; 127*4882a593Smuzhiyun unsigned int output_resolution; 128*4882a593Smuzhiyun unsigned int byte_stride; 129*4882a593Smuzhiyun unsigned int scale_limit; 130*4882a593Smuzhiyun unsigned int performance; 131*4882a593Smuzhiyun unsigned int input_format; 132*4882a593Smuzhiyun unsigned int output_format; 133*4882a593Smuzhiyun unsigned int feature; 134*4882a593Smuzhiyun char reserved[24]; 135*4882a593Smuzhiyun } rga_info_table_entry; 136*4882a593Smuzhiyun 137*4882a593Smuzhiyun typedef struct { 138*4882a593Smuzhiyun struct rga_version_t current; 139*4882a593Smuzhiyun struct rga_version_t minimum; 140*4882a593Smuzhiyun } rga_version_bind_table_entry_t; 141*4882a593Smuzhiyun 142*4882a593Smuzhiyun const rga_info_table_entry hw_info_table[] = { 143*4882a593Smuzhiyun { IM_RGA_HW_VERSION_RGA_V_ERR , 0, 0, 0, 0, 0, 0, 0, 0, {0} }, 144*4882a593Smuzhiyun { IM_RGA_HW_VERSION_RGA_1 , 8192, 2048, 4, 8, 1, 145*4882a593Smuzhiyun /* input format */ 146*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_RGB | 147*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_RGB_OTHER | 148*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_BPP | 149*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_420_SEMI_PLANNER_8_BIT | 150*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_420_PLANNER_8_BIT | 151*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_422_SEMI_PLANNER_8_BIT | 152*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_422_PLANNER_8_BIT, 153*4882a593Smuzhiyun /* output format */ 154*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_RGB | 155*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_RGB_OTHER | 156*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_420_SEMI_PLANNER_8_BIT | 157*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_420_PLANNER_8_BIT | 158*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_422_SEMI_PLANNER_8_BIT | 159*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_422_PLANNER_8_BIT, 160*4882a593Smuzhiyun /* feature */ 161*4882a593Smuzhiyun IM_RGA_SUPPORT_FEATURE_COLOR_FILL | 162*4882a593Smuzhiyun IM_RGA_SUPPORT_FEATURE_COLOR_PALETTE | 163*4882a593Smuzhiyun IM_RGA_SUPPORT_FEATURE_ROP, 164*4882a593Smuzhiyun /* reserved */ 165*4882a593Smuzhiyun {0} }, 166*4882a593Smuzhiyun { IM_RGA_HW_VERSION_RGA_1_PLUS , 8192, 2048, 4, 8, 1, 167*4882a593Smuzhiyun /* input format */ 168*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_RGB | 169*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_RGB_OTHER | 170*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_BPP | 171*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_420_SEMI_PLANNER_8_BIT | 172*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_420_PLANNER_8_BIT | 173*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_422_SEMI_PLANNER_8_BIT | 174*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_422_PLANNER_8_BIT, 175*4882a593Smuzhiyun /* output format */ 176*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_RGB | 177*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_RGB_OTHER | 178*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_420_SEMI_PLANNER_8_BIT | 179*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_420_PLANNER_8_BIT | 180*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_422_SEMI_PLANNER_8_BIT | 181*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_422_PLANNER_8_BIT, 182*4882a593Smuzhiyun /* feature */ 183*4882a593Smuzhiyun IM_RGA_SUPPORT_FEATURE_COLOR_FILL | 184*4882a593Smuzhiyun IM_RGA_SUPPORT_FEATURE_COLOR_PALETTE, 185*4882a593Smuzhiyun /* reserved */ 186*4882a593Smuzhiyun {0} }, 187*4882a593Smuzhiyun { IM_RGA_HW_VERSION_RGA_2 , 8192, 4096, 4, 16, 2, 188*4882a593Smuzhiyun /* input format */ 189*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_RGB | 190*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_RGB_OTHER | 191*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_420_SEMI_PLANNER_8_BIT | 192*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_420_PLANNER_8_BIT | 193*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_422_SEMI_PLANNER_8_BIT | 194*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_422_PLANNER_8_BIT, 195*4882a593Smuzhiyun /* output format */ 196*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_RGB | 197*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_RGB_OTHER | 198*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_420_SEMI_PLANNER_8_BIT | 199*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_420_PLANNER_8_BIT | 200*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_422_SEMI_PLANNER_8_BIT | 201*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_422_PLANNER_8_BIT, 202*4882a593Smuzhiyun /* feature */ 203*4882a593Smuzhiyun IM_RGA_SUPPORT_FEATURE_COLOR_FILL | 204*4882a593Smuzhiyun IM_RGA_SUPPORT_FEATURE_COLOR_PALETTE | 205*4882a593Smuzhiyun IM_RGA_SUPPORT_FEATURE_ROP, 206*4882a593Smuzhiyun /* reserved */ 207*4882a593Smuzhiyun {0} }, 208*4882a593Smuzhiyun { IM_RGA_HW_VERSION_RGA_2_LITE0 , 8192, 4096, 4, 8, 2, 209*4882a593Smuzhiyun /* input format */ 210*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_RGB | 211*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_RGB_OTHER | 212*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_420_SEMI_PLANNER_8_BIT | 213*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_420_PLANNER_8_BIT | 214*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_422_SEMI_PLANNER_8_BIT | 215*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_422_PLANNER_8_BIT, 216*4882a593Smuzhiyun /* output format */ 217*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_RGB | 218*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_RGB_OTHER | 219*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_420_SEMI_PLANNER_8_BIT | 220*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_420_PLANNER_8_BIT | 221*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_422_SEMI_PLANNER_8_BIT | 222*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_422_PLANNER_8_BIT, 223*4882a593Smuzhiyun /* feature */ 224*4882a593Smuzhiyun IM_RGA_SUPPORT_FEATURE_COLOR_FILL | 225*4882a593Smuzhiyun IM_RGA_SUPPORT_FEATURE_COLOR_PALETTE | 226*4882a593Smuzhiyun IM_RGA_SUPPORT_FEATURE_ROP, 227*4882a593Smuzhiyun /* reserved */ 228*4882a593Smuzhiyun {0} }, 229*4882a593Smuzhiyun { IM_RGA_HW_VERSION_RGA_2_LITE1 , 8192, 4096, 4, 8, 2, 230*4882a593Smuzhiyun /* input format */ 231*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_RGB | 232*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_RGB_OTHER | 233*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_420_SEMI_PLANNER_8_BIT | 234*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_420_PLANNER_8_BIT | 235*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_422_SEMI_PLANNER_8_BIT | 236*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_422_PLANNER_8_BIT | 237*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_420_SEMI_PLANNER_10_BIT | 238*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_420_PLANNER_10_BIT | 239*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_422_SEMI_PLANNER_10_BIT | 240*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_422_PLANNER_10_BIT, 241*4882a593Smuzhiyun /* output format */ 242*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_RGB | 243*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_RGB_OTHER | 244*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_420_SEMI_PLANNER_8_BIT | 245*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_420_PLANNER_8_BIT | 246*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_422_SEMI_PLANNER_8_BIT | 247*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_422_PLANNER_8_BIT, 248*4882a593Smuzhiyun /* feature */ 249*4882a593Smuzhiyun IM_RGA_SUPPORT_FEATURE_COLOR_FILL | 250*4882a593Smuzhiyun IM_RGA_SUPPORT_FEATURE_COLOR_PALETTE, 251*4882a593Smuzhiyun /* reserved */ 252*4882a593Smuzhiyun {0} }, 253*4882a593Smuzhiyun { IM_RGA_HW_VERSION_RGA_2_ENHANCE , 8192, 4096, 4, 16, 2, 254*4882a593Smuzhiyun /* input format */ 255*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_RGB | 256*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_RGB_OTHER | 257*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_420_SEMI_PLANNER_8_BIT | 258*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_420_PLANNER_8_BIT | 259*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_422_SEMI_PLANNER_8_BIT | 260*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_422_PLANNER_8_BIT | 261*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_420_SEMI_PLANNER_10_BIT | 262*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_420_PLANNER_10_BIT | 263*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_422_SEMI_PLANNER_10_BIT | 264*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_422_PLANNER_10_BIT, 265*4882a593Smuzhiyun /* output format */ 266*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_RGB | 267*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_RGB_OTHER | 268*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_420_SEMI_PLANNER_8_BIT | 269*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_420_PLANNER_8_BIT | 270*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_422_SEMI_PLANNER_8_BIT | 271*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_422_PLANNER_8_BIT | 272*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUYV_420 | 273*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUYV_422, 274*4882a593Smuzhiyun /* feature */ 275*4882a593Smuzhiyun IM_RGA_SUPPORT_FEATURE_COLOR_FILL | 276*4882a593Smuzhiyun IM_RGA_SUPPORT_FEATURE_COLOR_PALETTE | 277*4882a593Smuzhiyun IM_RGA_SUPPORT_FEATURE_ROP, 278*4882a593Smuzhiyun /* reserved */ 279*4882a593Smuzhiyun {0} }, 280*4882a593Smuzhiyun { IM_RGA_HW_VERSION_RGA_3 , 8176, 8128, 16, 8, 4, 281*4882a593Smuzhiyun /* input format */ 282*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_RGB | 283*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_420_SEMI_PLANNER_8_BIT | 284*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_422_SEMI_PLANNER_8_BIT | 285*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_420_SEMI_PLANNER_10_BIT | 286*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_422_SEMI_PLANNER_10_BIT | 287*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUYV_422, 288*4882a593Smuzhiyun /* output format */ 289*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_RGB | 290*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_420_SEMI_PLANNER_8_BIT | 291*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_422_SEMI_PLANNER_8_BIT | 292*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_420_SEMI_PLANNER_10_BIT | 293*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUV_422_SEMI_PLANNER_10_BIT | 294*4882a593Smuzhiyun IM_RGA_SUPPORT_FORMAT_YUYV_422, 295*4882a593Smuzhiyun /* feature */ 296*4882a593Smuzhiyun IM_RGA_SUPPORT_FEATURE_FBC | 297*4882a593Smuzhiyun IM_RGA_SUPPORT_FEATURE_BLEND_YUV | 298*4882a593Smuzhiyun IM_RGA_SUPPORT_FEATURE_BT2020, 299*4882a593Smuzhiyun /* reserved */ 300*4882a593Smuzhiyun {0} }, 301*4882a593Smuzhiyun }; 302*4882a593Smuzhiyun 303*4882a593Smuzhiyun /* 304*4882a593Smuzhiyun * The range of the version is [min, max), that is version >= min, version < max. 305*4882a593Smuzhiyun * 306*4882a593Smuzhiyun * current = librga version. 307*4882a593Smuzhiyun * minimum = support minimum driver version. 308*4882a593Smuzhiyun */ 309*4882a593Smuzhiyun const rga_version_bind_table_entry_t user_driver_bind_table[] = { 310*4882a593Smuzhiyun { { 0, 0, 0, "0.0.0" }, {0, 0, 0, "0.0.0" } }, 311*4882a593Smuzhiyun { { 1, 0, 3, "1.0.3" }, {0, 0, 0, "0.0.0" } }, 312*4882a593Smuzhiyun { { 1, 6, 0, "1.6.0" }, {1, 1, 5, "1.1.5" } }, 313*4882a593Smuzhiyun { { 1, 7, 2, "1.7.2" }, {1, 2, 0, "1.2.0" } }, 314*4882a593Smuzhiyun { { 1, 7, 3, "1.7.3" }, {1, 2, 4, "1.2.4" } }, 315*4882a593Smuzhiyun }; 316*4882a593Smuzhiyun 317*4882a593Smuzhiyun /* 318*4882a593Smuzhiyun * The range of the version is [min, max), that is version >= min, version < max. 319*4882a593Smuzhiyun * 320*4882a593Smuzhiyun * current = librga version. 321*4882a593Smuzhiyun * minimum = support minimum librga header version. 322*4882a593Smuzhiyun */ 323*4882a593Smuzhiyun const rga_version_bind_table_entry_t user_header_bind_table[] = { 324*4882a593Smuzhiyun { { 0, 0, 0, "0.0.0" }, { 0, 0, 0, "0.0.0" } }, 325*4882a593Smuzhiyun { { 1, 0, 3, "1.0.3" }, { 1, 0, 3, "1.0.3" } }, 326*4882a593Smuzhiyun { { 1, 4, 0, "1.4.0" }, { 1, 4, 0, "1.4.0" } }, 327*4882a593Smuzhiyun }; 328*4882a593Smuzhiyun 329*4882a593Smuzhiyun #endif 330