1*4882a593Smuzhiyun #include "CamHwIsp20.h"
2*4882a593Smuzhiyun #include "rk_aiq_comm.h"
3*4882a593Smuzhiyun #include "fake_v4l2_device.h"
4*4882a593Smuzhiyun #include "rkcif-config.h"
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun namespace RkCam {
RawStreamCapUnit()7*4882a593Smuzhiyun RawStreamCapUnit::RawStreamCapUnit ()
8*4882a593Smuzhiyun :_is_1608_stream(false)
9*4882a593Smuzhiyun ,_skip_num(0)
10*4882a593Smuzhiyun ,_state(RAW_CAP_STATE_INVALID)
11*4882a593Smuzhiyun {
12*4882a593Smuzhiyun }
13*4882a593Smuzhiyun
RawStreamCapUnit(const rk_sensor_full_info_t * s_info,bool linked_to_isp,int tx_buf_cnt)14*4882a593Smuzhiyun RawStreamCapUnit::RawStreamCapUnit (const rk_sensor_full_info_t *s_info, bool linked_to_isp, int tx_buf_cnt)
15*4882a593Smuzhiyun :_is_1608_stream(false)
16*4882a593Smuzhiyun ,_skip_num(0)
17*4882a593Smuzhiyun ,_state(RAW_CAP_STATE_INVALID)
18*4882a593Smuzhiyun {
19*4882a593Smuzhiyun /*
20*4882a593Smuzhiyun * for _mipi_tx_devs, index 0 refer to short frame always, inedex 1 refer
21*4882a593Smuzhiyun * to middle frame always, index 2 refert to long frame always.
22*4882a593Smuzhiyun * for CIF usecase, because mipi_id0 refert to long frame always, so we
23*4882a593Smuzhiyun * should know the HDR mode firstly befor building the relationship between
24*4882a593Smuzhiyun * _mipi_tx_devs array and mipi_idx. here we just set the mipi_idx to
25*4882a593Smuzhiyun * _mipi_tx_devs, we will build the real relation in start.
26*4882a593Smuzhiyun * for CIF usecase, rawwr2_path is always connected to _mipi_tx_devs[0],
27*4882a593Smuzhiyun * rawwr0_path is always connected to _mipi_tx_devs[1], and rawwr1_path is always
28*4882a593Smuzhiyun * connected to _mipi_tx_devs[0]
29*4882a593Smuzhiyun */
30*4882a593Smuzhiyun // FIXME: flag(start_en) is ensure 1608 sensor already open.
31*4882a593Smuzhiyun bool start_en = true;
32*4882a593Smuzhiyun if (s_info->linked_to_1608) {
33*4882a593Smuzhiyun // Traverse the corresponding [1~4] nodes
34*4882a593Smuzhiyun if (CamHwIsp20::rk1608_share_inf.us_open_cnt > 0) {
35*4882a593Smuzhiyun // 1st open
36*4882a593Smuzhiyun start_en = false;
37*4882a593Smuzhiyun }
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun // state update.
40*4882a593Smuzhiyun CamHwIsp20::rk1608_share_inf.us_open_cnt++;
41*4882a593Smuzhiyun if (CamHwIsp20::rk1608_share_inf.us_open_cnt > 10)
42*4882a593Smuzhiyun CamHwIsp20::rk1608_share_inf.us_open_cnt = 10;
43*4882a593Smuzhiyun }
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun //short frame
46*4882a593Smuzhiyun if (strlen(s_info->isp_info->rawrd2_s_path)) {
47*4882a593Smuzhiyun if (linked_to_isp)
48*4882a593Smuzhiyun _dev[0] = new V4l2Device (s_info->isp_info->rawwr2_path);//rkisp_rawwr2
49*4882a593Smuzhiyun else {
50*4882a593Smuzhiyun if (s_info->dvp_itf) {
51*4882a593Smuzhiyun if (strlen(s_info->cif_info->stream_cif_path))
52*4882a593Smuzhiyun _dev[0] = new V4l2Device (s_info->cif_info->stream_cif_path);
53*4882a593Smuzhiyun else
54*4882a593Smuzhiyun _dev[0] = new V4l2Device (s_info->cif_info->dvp_id0);
55*4882a593Smuzhiyun } else {
56*4882a593Smuzhiyun if (!s_info->linked_to_1608) {
57*4882a593Smuzhiyun // normal mode
58*4882a593Smuzhiyun _dev[0] = new V4l2Device (s_info->cif_info->mipi_id0);
59*4882a593Smuzhiyun } else {
60*4882a593Smuzhiyun if (start_en) {
61*4882a593Smuzhiyun // 1608 sensor mode.
62*4882a593Smuzhiyun _dev[0] = new V4l2Device (s_info->cif_info->mipi_id0);
63*4882a593Smuzhiyun }
64*4882a593Smuzhiyun }
65*4882a593Smuzhiyun }
66*4882a593Smuzhiyun }
67*4882a593Smuzhiyun if (_dev[0].ptr())
68*4882a593Smuzhiyun _dev[0]->open();
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun }
71*4882a593Smuzhiyun //mid frame
72*4882a593Smuzhiyun if (strlen(s_info->isp_info->rawrd0_m_path)) {
73*4882a593Smuzhiyun if (linked_to_isp)
74*4882a593Smuzhiyun _dev[1] = new V4l2Device (s_info->isp_info->rawwr0_path);//rkisp_rawwr0
75*4882a593Smuzhiyun else {
76*4882a593Smuzhiyun if (!s_info->dvp_itf) {
77*4882a593Smuzhiyun if (!s_info->linked_to_1608) {
78*4882a593Smuzhiyun // normal mode.
79*4882a593Smuzhiyun _dev[1] = new V4l2Device (s_info->cif_info->mipi_id1);
80*4882a593Smuzhiyun } else {
81*4882a593Smuzhiyun if (start_en) {
82*4882a593Smuzhiyun // 1608 sensor mode.
83*4882a593Smuzhiyun _dev[1] = new V4l2Device (s_info->cif_info->mipi_id1);
84*4882a593Smuzhiyun }
85*4882a593Smuzhiyun }
86*4882a593Smuzhiyun }
87*4882a593Smuzhiyun }
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun if (_dev[1].ptr())
90*4882a593Smuzhiyun _dev[1]->open();
91*4882a593Smuzhiyun }
92*4882a593Smuzhiyun //long frame
93*4882a593Smuzhiyun if (strlen(s_info->isp_info->rawrd1_l_path)) {
94*4882a593Smuzhiyun if (linked_to_isp)
95*4882a593Smuzhiyun _dev[2] = new V4l2Device (s_info->isp_info->rawwr1_path);//rkisp_rawwr1
96*4882a593Smuzhiyun else {
97*4882a593Smuzhiyun if (!s_info->dvp_itf) {
98*4882a593Smuzhiyun if (!s_info->linked_to_1608) {
99*4882a593Smuzhiyun // normal mode.
100*4882a593Smuzhiyun _dev[2] = new V4l2Device (s_info->cif_info->mipi_id2);//rkisp_rawwr1
101*4882a593Smuzhiyun } else {
102*4882a593Smuzhiyun if (start_en) {
103*4882a593Smuzhiyun // 1608 sensor mode.
104*4882a593Smuzhiyun _dev[2] = new V4l2Device (s_info->cif_info->mipi_id2);//rkisp_rawwr1
105*4882a593Smuzhiyun }
106*4882a593Smuzhiyun }
107*4882a593Smuzhiyun }
108*4882a593Smuzhiyun }
109*4882a593Smuzhiyun if (_dev[2].ptr())
110*4882a593Smuzhiyun _dev[2]->open();
111*4882a593Smuzhiyun }
112*4882a593Smuzhiyun int buf_cnt = tx_buf_cnt;
113*4882a593Smuzhiyun if (tx_buf_cnt == 0) {
114*4882a593Smuzhiyun if (linked_to_isp) {
115*4882a593Smuzhiyun buf_cnt = ISP_TX_BUF_NUM;
116*4882a593Smuzhiyun } else if (s_info->linked_to_1608) {
117*4882a593Smuzhiyun buf_cnt = VIPCAP_TX_BUF_NUM_1608;
118*4882a593Smuzhiyun } else {
119*4882a593Smuzhiyun buf_cnt = VIPCAP_TX_BUF_NUM;
120*4882a593Smuzhiyun }
121*4882a593Smuzhiyun }
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun for (int i = 0; i < 3; i++) {
124*4882a593Smuzhiyun if (_dev[i].ptr()) {
125*4882a593Smuzhiyun _dev[i]->set_buffer_count(buf_cnt);
126*4882a593Smuzhiyun _dev[i]->set_buf_sync (true);
127*4882a593Smuzhiyun _dev_bakup[i] = _dev[i];
128*4882a593Smuzhiyun _dev_index[i] = i;
129*4882a593Smuzhiyun _stream[i] = new RKRawStream(_dev[i], i, ISP_POLL_TX);
130*4882a593Smuzhiyun _stream[i]->setPollCallback(this);
131*4882a593Smuzhiyun } else {
132*4882a593Smuzhiyun _dev_bakup[i] = NULL;
133*4882a593Smuzhiyun _dev_index[i] = i;
134*4882a593Smuzhiyun }
135*4882a593Smuzhiyun }
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun _state = RAW_CAP_STATE_INITED;
138*4882a593Smuzhiyun }
139*4882a593Smuzhiyun
~RawStreamCapUnit()140*4882a593Smuzhiyun RawStreamCapUnit::~RawStreamCapUnit ()
141*4882a593Smuzhiyun {
142*4882a593Smuzhiyun _state = RAW_CAP_STATE_INVALID;
143*4882a593Smuzhiyun }
144*4882a593Smuzhiyun
start(int mode)145*4882a593Smuzhiyun XCamReturn RawStreamCapUnit::start(int mode)
146*4882a593Smuzhiyun {
147*4882a593Smuzhiyun LOGD_CAMHW_SUBM(ISP20HW_SUBM, "%s enter", __FUNCTION__);
148*4882a593Smuzhiyun for (int i = 0; i < _mipi_dev_max; i++) {
149*4882a593Smuzhiyun _stream[i]->setCamPhyId(mCamPhyId);
150*4882a593Smuzhiyun _stream[i]->start();
151*4882a593Smuzhiyun }
152*4882a593Smuzhiyun _state = RAW_CAP_STATE_STARTED;
153*4882a593Smuzhiyun LOGD_CAMHW_SUBM(ISP20HW_SUBM, "%s exit", __FUNCTION__);
154*4882a593Smuzhiyun return XCAM_RETURN_NO_ERROR;
155*4882a593Smuzhiyun }
156*4882a593Smuzhiyun
stop()157*4882a593Smuzhiyun XCamReturn RawStreamCapUnit::stop ()
158*4882a593Smuzhiyun {
159*4882a593Smuzhiyun LOGD_CAMHW_SUBM(ISP20HW_SUBM, "%s enter", __FUNCTION__);
160*4882a593Smuzhiyun for (int i = 0; i < _mipi_dev_max; i++) {
161*4882a593Smuzhiyun _stream[i]->stopThreadOnly();
162*4882a593Smuzhiyun }
163*4882a593Smuzhiyun _buf_mutex.lock();
164*4882a593Smuzhiyun for (int i = 0; i < _mipi_dev_max; i++) {
165*4882a593Smuzhiyun buf_list[i].clear ();
166*4882a593Smuzhiyun }
167*4882a593Smuzhiyun _buf_mutex.unlock();
168*4882a593Smuzhiyun for (int i = 0; i < _mipi_dev_max; i++) {
169*4882a593Smuzhiyun _stream[i]->stopDeviceOnly();
170*4882a593Smuzhiyun }
171*4882a593Smuzhiyun _state = RAW_CAP_STATE_STOPPED;
172*4882a593Smuzhiyun LOGD_CAMHW_SUBM(ISP20HW_SUBM, "%s exit", __FUNCTION__);
173*4882a593Smuzhiyun return XCAM_RETURN_NO_ERROR;
174*4882a593Smuzhiyun }
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun XCamReturn
prepare(int idx)177*4882a593Smuzhiyun RawStreamCapUnit::prepare(int idx)
178*4882a593Smuzhiyun {
179*4882a593Smuzhiyun XCamReturn ret = XCAM_RETURN_NO_ERROR;
180*4882a593Smuzhiyun LOGD_CAMHW_SUBM(ISP20HW_SUBM, "%s enter", __FUNCTION__);
181*4882a593Smuzhiyun // mipi rx/tx format should match to sensor.
182*4882a593Smuzhiyun for (int i = 0; i < 3; i++) {
183*4882a593Smuzhiyun if (!(idx & (1 << i)))
184*4882a593Smuzhiyun continue;
185*4882a593Smuzhiyun ret = _dev[i]->prepare();
186*4882a593Smuzhiyun if (ret < 0)
187*4882a593Smuzhiyun LOGE_CAMHW_SUBM(ISP20HW_SUBM, "mipi tx:%d prepare err: %d\n", ret);
188*4882a593Smuzhiyun
189*4882a593Smuzhiyun _stream[i]->set_device_prepared(true);
190*4882a593Smuzhiyun }
191*4882a593Smuzhiyun _state = RAW_CAP_STATE_PREPARED;
192*4882a593Smuzhiyun LOGD_CAMHW_SUBM(ISP20HW_SUBM, "%s exit", __FUNCTION__);
193*4882a593Smuzhiyun return ret;
194*4882a593Smuzhiyun }
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun void
prepare_cif_mipi()197*4882a593Smuzhiyun RawStreamCapUnit::prepare_cif_mipi()
198*4882a593Smuzhiyun {
199*4882a593Smuzhiyun LOGD_CAMHW_SUBM(ISP20HW_SUBM, "%s enter,working_mode=0x%x", __FUNCTION__, _working_mode);
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun FakeV4l2Device* fake_dev = dynamic_cast<FakeV4l2Device* >(_dev[0].ptr());
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun if (fake_dev) {
204*4882a593Smuzhiyun LOGD_CAMHW_SUBM(ISP20HW_SUBM,"ignore fake tx");
205*4882a593Smuzhiyun return;
206*4882a593Smuzhiyun }
207*4882a593Smuzhiyun
208*4882a593Smuzhiyun SmartPtr<V4l2Device> tx_devs_tmp[3] =
209*4882a593Smuzhiyun {
210*4882a593Smuzhiyun _dev_bakup[0],
211*4882a593Smuzhiyun _dev_bakup[1],
212*4882a593Smuzhiyun _dev_bakup[2],
213*4882a593Smuzhiyun };
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun // _mipi_tx_devs
216*4882a593Smuzhiyun if (_working_mode == RK_AIQ_WORKING_MODE_NORMAL) {
217*4882a593Smuzhiyun // use _mipi_tx_devs[0] only
218*4882a593Smuzhiyun // id0 as normal
219*4882a593Smuzhiyun // do nothing
220*4882a593Smuzhiyun LOGD_CAMHW_SUBM(ISP20HW_SUBM, "CIF tx: %s -> normal",
221*4882a593Smuzhiyun _dev[0]->get_device_name());
222*4882a593Smuzhiyun } else if (RK_AIQ_HDR_GET_WORKING_MODE(_working_mode) == RK_AIQ_WORKING_MODE_ISP_HDR2) {
223*4882a593Smuzhiyun // use _mipi_tx_devs[0] and _mipi_tx_devs[1]
224*4882a593Smuzhiyun // id0 as l, id1 as s
225*4882a593Smuzhiyun SmartPtr<V4l2Device> tmp = tx_devs_tmp[1];
226*4882a593Smuzhiyun tx_devs_tmp[1] = tx_devs_tmp[0];
227*4882a593Smuzhiyun tx_devs_tmp[0] = tmp;
228*4882a593Smuzhiyun LOGD_CAMHW_SUBM(ISP20HW_SUBM, "CIF tx: %s -> long",
229*4882a593Smuzhiyun _dev[1]->get_device_name());
230*4882a593Smuzhiyun LOGD_CAMHW_SUBM(ISP20HW_SUBM, "CIF tx: %s -> short",
231*4882a593Smuzhiyun _dev[0]->get_device_name());
232*4882a593Smuzhiyun } else if (RK_AIQ_HDR_GET_WORKING_MODE(_working_mode) == RK_AIQ_WORKING_MODE_ISP_HDR3) {
233*4882a593Smuzhiyun // use _mipi_tx_devs[0] and _mipi_tx_devs[1]
234*4882a593Smuzhiyun // id0 as l, id1 as m, id2 as s
235*4882a593Smuzhiyun SmartPtr<V4l2Device> tmp = tx_devs_tmp[2];
236*4882a593Smuzhiyun tx_devs_tmp[2] = tx_devs_tmp[0];
237*4882a593Smuzhiyun tx_devs_tmp[0] = tmp;
238*4882a593Smuzhiyun LOGD_CAMHW_SUBM(ISP20HW_SUBM, "CIF tx: %s -> long",
239*4882a593Smuzhiyun _dev[2]->get_device_name());
240*4882a593Smuzhiyun LOGD_CAMHW_SUBM(ISP20HW_SUBM, "CIF tx: %s -> middle",
241*4882a593Smuzhiyun _dev[1]->get_device_name());
242*4882a593Smuzhiyun LOGD_CAMHW_SUBM(ISP20HW_SUBM, "CIF tx: %s -> short",
243*4882a593Smuzhiyun _dev[0]->get_device_name());
244*4882a593Smuzhiyun } else {
245*4882a593Smuzhiyun LOGE_CAMHW_SUBM(ISP20HW_SUBM, "wrong hdr mode: %d\n", _working_mode);
246*4882a593Smuzhiyun }
247*4882a593Smuzhiyun for (int i = 0; i < 3; i++) {
248*4882a593Smuzhiyun if (tx_devs_tmp[i].ptr()) {
249*4882a593Smuzhiyun _dev[i] = tx_devs_tmp[i];
250*4882a593Smuzhiyun _dev_index[i] = i;
251*4882a593Smuzhiyun _stream[i].release();
252*4882a593Smuzhiyun _stream[i] = new RKRawStream(_dev[i], i, ISP_POLL_TX);
253*4882a593Smuzhiyun _stream[i]->setPollCallback(this);
254*4882a593Smuzhiyun }
255*4882a593Smuzhiyun }
256*4882a593Smuzhiyun LOGD_CAMHW_SUBM(ISP20HW_SUBM, "%s exit", __FUNCTION__);
257*4882a593Smuzhiyun }
258*4882a593Smuzhiyun
259*4882a593Smuzhiyun void
set_working_mode(int mode)260*4882a593Smuzhiyun RawStreamCapUnit::set_working_mode(int mode)
261*4882a593Smuzhiyun {
262*4882a593Smuzhiyun LOGD_CAMHW_SUBM(ISP20HW_SUBM, "%s enter,mode=0x%x", __FUNCTION__, mode);
263*4882a593Smuzhiyun _working_mode = mode;
264*4882a593Smuzhiyun
265*4882a593Smuzhiyun switch (_working_mode) {
266*4882a593Smuzhiyun case RK_AIQ_ISP_HDR_MODE_3_FRAME_HDR:
267*4882a593Smuzhiyun case RK_AIQ_ISP_HDR_MODE_3_LINE_HDR:
268*4882a593Smuzhiyun _mipi_dev_max = 3;
269*4882a593Smuzhiyun break;
270*4882a593Smuzhiyun case RK_AIQ_ISP_HDR_MODE_2_FRAME_HDR:
271*4882a593Smuzhiyun case RK_AIQ_ISP_HDR_MODE_2_LINE_HDR:
272*4882a593Smuzhiyun _mipi_dev_max = 2;
273*4882a593Smuzhiyun break;
274*4882a593Smuzhiyun default:
275*4882a593Smuzhiyun _mipi_dev_max = 1;
276*4882a593Smuzhiyun }
277*4882a593Smuzhiyun LOGD_CAMHW_SUBM(ISP20HW_SUBM, "%s exit", __FUNCTION__);
278*4882a593Smuzhiyun }
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun void
set_tx_devices(SmartPtr<V4l2Device> mipi_tx_devs[3])281*4882a593Smuzhiyun RawStreamCapUnit::set_tx_devices(SmartPtr<V4l2Device> mipi_tx_devs[3])
282*4882a593Smuzhiyun {
283*4882a593Smuzhiyun for (int i = 0; i < 3; i++) {
284*4882a593Smuzhiyun _dev[i] = mipi_tx_devs[i];
285*4882a593Smuzhiyun _stream[i].release();
286*4882a593Smuzhiyun _stream[i] = new RKRawStream(_dev[i], i, ISP_POLL_TX);
287*4882a593Smuzhiyun _stream[i]->setPollCallback(this);
288*4882a593Smuzhiyun }
289*4882a593Smuzhiyun }
290*4882a593Smuzhiyun
291*4882a593Smuzhiyun SmartPtr<V4l2Device>
get_tx_device(int index)292*4882a593Smuzhiyun RawStreamCapUnit::get_tx_device(int index)
293*4882a593Smuzhiyun {
294*4882a593Smuzhiyun if (index > _mipi_dev_max)
295*4882a593Smuzhiyun return nullptr;
296*4882a593Smuzhiyun else
297*4882a593Smuzhiyun return _dev[index];
298*4882a593Smuzhiyun }
299*4882a593Smuzhiyun
300*4882a593Smuzhiyun XCamReturn
set_tx_format(const struct v4l2_subdev_format & sns_sd_fmt,uint32_t sns_v4l_pix_fmt)301*4882a593Smuzhiyun RawStreamCapUnit::set_tx_format(const struct v4l2_subdev_format& sns_sd_fmt,
302*4882a593Smuzhiyun uint32_t sns_v4l_pix_fmt)
303*4882a593Smuzhiyun {
304*4882a593Smuzhiyun XCamReturn ret = XCAM_RETURN_NO_ERROR;
305*4882a593Smuzhiyun
306*4882a593Smuzhiyun for (int i = 0; i < 3; i++) {
307*4882a593Smuzhiyun if (!_dev[i].ptr()) {
308*4882a593Smuzhiyun ret = XCAM_RETURN_ERROR_PARAM;
309*4882a593Smuzhiyun break;
310*4882a593Smuzhiyun }
311*4882a593Smuzhiyun
312*4882a593Smuzhiyun ret = _dev[i]->set_format(sns_sd_fmt.format.width,
313*4882a593Smuzhiyun sns_sd_fmt.format.height,
314*4882a593Smuzhiyun sns_v4l_pix_fmt,
315*4882a593Smuzhiyun V4L2_FIELD_NONE,
316*4882a593Smuzhiyun 0);
317*4882a593Smuzhiyun if (ret < 0) {
318*4882a593Smuzhiyun LOGE_CAMHW_SUBM(ISP20HW_SUBM, "device(%s) set format failed", _dev[i]->get_device_name());
319*4882a593Smuzhiyun } else {
320*4882a593Smuzhiyun LOGD_CAMHW_SUBM(ISP20HW_SUBM, "device(%s) set fmt info: fmt 0x%x, %dx%d !",
321*4882a593Smuzhiyun _dev[i]->get_device_name(), sns_v4l_pix_fmt,
322*4882a593Smuzhiyun sns_sd_fmt.format.width, sns_sd_fmt.format.height);
323*4882a593Smuzhiyun }
324*4882a593Smuzhiyun }
325*4882a593Smuzhiyun
326*4882a593Smuzhiyun return ret;
327*4882a593Smuzhiyun }
328*4882a593Smuzhiyun
329*4882a593Smuzhiyun XCamReturn
set_tx_format(const struct v4l2_subdev_selection & sns_sd_sel,uint32_t sns_v4l_pix_fmt)330*4882a593Smuzhiyun RawStreamCapUnit::set_tx_format(const struct v4l2_subdev_selection& sns_sd_sel,
331*4882a593Smuzhiyun uint32_t sns_v4l_pix_fmt)
332*4882a593Smuzhiyun {
333*4882a593Smuzhiyun XCamReturn ret = XCAM_RETURN_NO_ERROR;
334*4882a593Smuzhiyun
335*4882a593Smuzhiyun for (int i = 0; i < 3; i++) {
336*4882a593Smuzhiyun if (!_dev[i].ptr()) {
337*4882a593Smuzhiyun ret = XCAM_RETURN_ERROR_PARAM;
338*4882a593Smuzhiyun break;
339*4882a593Smuzhiyun }
340*4882a593Smuzhiyun
341*4882a593Smuzhiyun ret = _dev[i]->set_format(sns_sd_sel.r.width,
342*4882a593Smuzhiyun sns_sd_sel.r.height,
343*4882a593Smuzhiyun sns_v4l_pix_fmt,
344*4882a593Smuzhiyun V4L2_FIELD_NONE,
345*4882a593Smuzhiyun 0);
346*4882a593Smuzhiyun if (ret < 0) {
347*4882a593Smuzhiyun LOGE_CAMHW_SUBM(ISP20HW_SUBM, "device(%s) set format failed", _dev[i]->get_device_name());
348*4882a593Smuzhiyun } else {
349*4882a593Smuzhiyun LOGD_CAMHW_SUBM(ISP20HW_SUBM, "device(%s) set fmt info: fmt 0x%x, %dx%d !",
350*4882a593Smuzhiyun _dev[i]->get_device_name(), sns_v4l_pix_fmt,
351*4882a593Smuzhiyun sns_sd_sel.r.width, sns_sd_sel.r.height);
352*4882a593Smuzhiyun }
353*4882a593Smuzhiyun }
354*4882a593Smuzhiyun
355*4882a593Smuzhiyun return ret;
356*4882a593Smuzhiyun }
357*4882a593Smuzhiyun
358*4882a593Smuzhiyun void
set_devices(SmartPtr<V4l2SubDevice> ispdev,CamHwIsp20 * handle,RawStreamProcUnit * proc)359*4882a593Smuzhiyun RawStreamCapUnit::set_devices(SmartPtr<V4l2SubDevice> ispdev, CamHwIsp20* handle, RawStreamProcUnit *proc)
360*4882a593Smuzhiyun {
361*4882a593Smuzhiyun _isp_core_dev = ispdev;
362*4882a593Smuzhiyun _camHw = handle;
363*4882a593Smuzhiyun _proc_stream = proc;
364*4882a593Smuzhiyun }
365*4882a593Smuzhiyun
366*4882a593Smuzhiyun XCamReturn
poll_buffer_ready(SmartPtr<V4l2BufferProxy> & buf,int dev_index)367*4882a593Smuzhiyun RawStreamCapUnit::poll_buffer_ready (SmartPtr<V4l2BufferProxy> &buf, int dev_index)
368*4882a593Smuzhiyun {
369*4882a593Smuzhiyun XCamReturn ret = XCAM_RETURN_NO_ERROR;
370*4882a593Smuzhiyun SmartPtr<V4l2BufferProxy> buf_s, buf_m, buf_l;
371*4882a593Smuzhiyun
372*4882a593Smuzhiyun _buf_mutex.lock();
373*4882a593Smuzhiyun buf_list[dev_index].push(buf);
374*4882a593Smuzhiyun ret = sync_raw_buf(buf_s, buf_m, buf_l);
375*4882a593Smuzhiyun _buf_mutex.unlock();
376*4882a593Smuzhiyun
377*4882a593Smuzhiyun if (ret == XCAM_RETURN_NO_ERROR) {
378*4882a593Smuzhiyun // FIXME: rawCap only has one valid pointer(just malloc once buf), so it needs to do multiple syncs
379*4882a593Smuzhiyun if (!_is_1608_stream) {
380*4882a593Smuzhiyun // normal
381*4882a593Smuzhiyun if (_proc_stream) {
382*4882a593Smuzhiyun _proc_stream->send_sync_buf(buf_s, buf_m, buf_l);
383*4882a593Smuzhiyun }
384*4882a593Smuzhiyun } else {
385*4882a593Smuzhiyun // 1608 mode.
386*4882a593Smuzhiyun for (int idx = 0; idx < CAM_INDEX_FOR_1608; idx++) {
387*4882a593Smuzhiyun if (CamHwIsp20::rk1608_share_inf.raw_proc_unit[idx]) {
388*4882a593Smuzhiyun CamHwIsp20::rk1608_share_inf.raw_proc_unit[idx]->send_sync_buf(buf_s, buf_m, buf_l);
389*4882a593Smuzhiyun }
390*4882a593Smuzhiyun }
391*4882a593Smuzhiyun }
392*4882a593Smuzhiyun
393*4882a593Smuzhiyun if (_camHw->mHwResLintener) {
394*4882a593Smuzhiyun auto vbufInfo = buf_s->get_video_info();
395*4882a593Smuzhiyun SmartPtr<SubVideoBuffer> subvbuf = new SubVideoBuffer (buf_s);
396*4882a593Smuzhiyun subvbuf->_buf_type = ISP_POLL_TX;
397*4882a593Smuzhiyun subvbuf->set_sequence(buf_s->get_sequence());
398*4882a593Smuzhiyun subvbuf->set_video_info(vbufInfo);
399*4882a593Smuzhiyun SmartPtr<VideoBuffer> vbuf = subvbuf.dynamic_cast_ptr<VideoBuffer>();
400*4882a593Smuzhiyun _camHw->mHwResLintener->hwResCb(vbuf);
401*4882a593Smuzhiyun }
402*4882a593Smuzhiyun }
403*4882a593Smuzhiyun
404*4882a593Smuzhiyun return XCAM_RETURN_NO_ERROR;
405*4882a593Smuzhiyun }
406*4882a593Smuzhiyun
skip_frames(int skip_num,int32_t skip_seq)407*4882a593Smuzhiyun void RawStreamCapUnit::skip_frames(int skip_num, int32_t skip_seq)
408*4882a593Smuzhiyun {
409*4882a593Smuzhiyun _mipi_mutex.lock();
410*4882a593Smuzhiyun _skip_num = skip_num;
411*4882a593Smuzhiyun _skip_to_seq = skip_seq + _skip_num;
412*4882a593Smuzhiyun _mipi_mutex.unlock();
413*4882a593Smuzhiyun }
414*4882a593Smuzhiyun
check_skip_frame(int32_t buf_seq)415*4882a593Smuzhiyun bool RawStreamCapUnit::check_skip_frame(int32_t buf_seq)
416*4882a593Smuzhiyun {
417*4882a593Smuzhiyun _mipi_mutex.lock();
418*4882a593Smuzhiyun #if 0 // ts
419*4882a593Smuzhiyun if (_skip_num > 0) {
420*4882a593Smuzhiyun int64_t skip_ts_ms = _skip_start_ts / 1000 / 1000;
421*4882a593Smuzhiyun int64_t buf_ts_ms = buf_ts / 1000;
422*4882a593Smuzhiyun LOGD_CAMHW_SUBM(ISP20HW_SUBM, "skip num %d, start from %" PRId64 " ms, buf ts %" PRId64 " ms",
423*4882a593Smuzhiyun _skip_num,
424*4882a593Smuzhiyun skip_ts_ms,
425*4882a593Smuzhiyun buf_ts_ms);
426*4882a593Smuzhiyun if (buf_ts_ms > skip_ts_ms) {
427*4882a593Smuzhiyun _skip_num--;
428*4882a593Smuzhiyun _mipi_mutex.unlock();
429*4882a593Smuzhiyun return true;
430*4882a593Smuzhiyun }
431*4882a593Smuzhiyun }
432*4882a593Smuzhiyun #else
433*4882a593Smuzhiyun
434*4882a593Smuzhiyun if ((_skip_num > 0) && (buf_seq < _skip_to_seq)) {
435*4882a593Smuzhiyun LOGE_CAMHW_SUBM(ISP20HW_SUBM, "skip num %d, skip seq %d, dest seq %d",
436*4882a593Smuzhiyun _skip_num, buf_seq, _skip_to_seq);
437*4882a593Smuzhiyun _skip_num--;
438*4882a593Smuzhiyun _mipi_mutex.unlock();
439*4882a593Smuzhiyun return true;
440*4882a593Smuzhiyun }
441*4882a593Smuzhiyun #endif
442*4882a593Smuzhiyun _mipi_mutex.unlock();
443*4882a593Smuzhiyun return false;
444*4882a593Smuzhiyun }
445*4882a593Smuzhiyun
446*4882a593Smuzhiyun XCamReturn
sync_raw_buf(SmartPtr<V4l2BufferProxy> & buf_s,SmartPtr<V4l2BufferProxy> & buf_m,SmartPtr<V4l2BufferProxy> & buf_l)447*4882a593Smuzhiyun RawStreamCapUnit::sync_raw_buf
448*4882a593Smuzhiyun (
449*4882a593Smuzhiyun SmartPtr<V4l2BufferProxy> &buf_s,
450*4882a593Smuzhiyun SmartPtr<V4l2BufferProxy> &buf_m,
451*4882a593Smuzhiyun SmartPtr<V4l2BufferProxy> &buf_l
452*4882a593Smuzhiyun )
453*4882a593Smuzhiyun {
454*4882a593Smuzhiyun uint32_t sequence_s = -1, sequence_m = -1, sequence_l = -1;
455*4882a593Smuzhiyun
456*4882a593Smuzhiyun for (int i = 0; i < _mipi_dev_max; i++) {
457*4882a593Smuzhiyun if (buf_list[i].is_empty()) {
458*4882a593Smuzhiyun return XCAM_RETURN_ERROR_FAILED;
459*4882a593Smuzhiyun }
460*4882a593Smuzhiyun }
461*4882a593Smuzhiyun
462*4882a593Smuzhiyun buf_l = buf_list[ISP_MIPI_HDR_L].front();
463*4882a593Smuzhiyun if (buf_l.ptr())
464*4882a593Smuzhiyun sequence_l = buf_l->get_sequence();
465*4882a593Smuzhiyun
466*4882a593Smuzhiyun buf_m = buf_list[ISP_MIPI_HDR_M].front();
467*4882a593Smuzhiyun if (buf_m.ptr())
468*4882a593Smuzhiyun sequence_m = buf_m->get_sequence();
469*4882a593Smuzhiyun
470*4882a593Smuzhiyun buf_s = buf_list[ISP_MIPI_HDR_S].front();
471*4882a593Smuzhiyun
472*4882a593Smuzhiyun if (buf_s.ptr()) {
473*4882a593Smuzhiyun sequence_s = buf_s->get_sequence();
474*4882a593Smuzhiyun if ((_working_mode == RK_AIQ_ISP_HDR_MODE_3_FRAME_HDR ||
475*4882a593Smuzhiyun _working_mode == RK_AIQ_ISP_HDR_MODE_3_LINE_HDR) &&
476*4882a593Smuzhiyun buf_m.ptr() && buf_l.ptr() && buf_s.ptr() &&
477*4882a593Smuzhiyun sequence_l == sequence_s && sequence_m == sequence_s) {
478*4882a593Smuzhiyun
479*4882a593Smuzhiyun buf_list[ISP_MIPI_HDR_S].erase(buf_s);
480*4882a593Smuzhiyun buf_list[ISP_MIPI_HDR_M].erase(buf_m);
481*4882a593Smuzhiyun buf_list[ISP_MIPI_HDR_L].erase(buf_l);
482*4882a593Smuzhiyun if (check_skip_frame(sequence_s)) {
483*4882a593Smuzhiyun LOGW_CAMHW_SUBM(ISP20HW_SUBM, "skip frame %d", sequence_s);
484*4882a593Smuzhiyun goto end;
485*4882a593Smuzhiyun }
486*4882a593Smuzhiyun } else if ((_working_mode == RK_AIQ_ISP_HDR_MODE_2_FRAME_HDR ||
487*4882a593Smuzhiyun _working_mode == RK_AIQ_ISP_HDR_MODE_2_LINE_HDR) &&
488*4882a593Smuzhiyun buf_m.ptr() && buf_s.ptr() && sequence_m == sequence_s) {
489*4882a593Smuzhiyun buf_list[ISP_MIPI_HDR_S].erase(buf_s);
490*4882a593Smuzhiyun buf_list[ISP_MIPI_HDR_M].erase(buf_m);
491*4882a593Smuzhiyun if (check_skip_frame(sequence_s)) {
492*4882a593Smuzhiyun LOGE_CAMHW_SUBM(ISP20HW_SUBM, "skip frame %d", sequence_s);
493*4882a593Smuzhiyun goto end;
494*4882a593Smuzhiyun }
495*4882a593Smuzhiyun } else if (_working_mode == RK_AIQ_WORKING_MODE_NORMAL) {
496*4882a593Smuzhiyun buf_list[ISP_MIPI_HDR_S].erase(buf_s);
497*4882a593Smuzhiyun if (check_skip_frame(sequence_s)) {
498*4882a593Smuzhiyun LOGW_CAMHW_SUBM(ISP20HW_SUBM, "skip frame %d", sequence_s);
499*4882a593Smuzhiyun goto end;
500*4882a593Smuzhiyun }
501*4882a593Smuzhiyun } else {
502*4882a593Smuzhiyun LOGW_CAMHW_SUBM(ISP20HW_SUBM, "do nothing, sequence not match l: %d, s: %d, m: %d !!!",
503*4882a593Smuzhiyun sequence_l, sequence_s, sequence_m);
504*4882a593Smuzhiyun }
505*4882a593Smuzhiyun return XCAM_RETURN_NO_ERROR;
506*4882a593Smuzhiyun }
507*4882a593Smuzhiyun end:
508*4882a593Smuzhiyun return XCAM_RETURN_ERROR_FAILED;
509*4882a593Smuzhiyun }
510*4882a593Smuzhiyun
511*4882a593Smuzhiyun XCamReturn
reset_hardware()512*4882a593Smuzhiyun RawStreamCapUnit::reset_hardware()
513*4882a593Smuzhiyun {
514*4882a593Smuzhiyun XCamReturn ret = XCAM_RETURN_NO_ERROR;
515*4882a593Smuzhiyun if (_dev[0].ptr()) {
516*4882a593Smuzhiyun int32_t reset = 1;
517*4882a593Smuzhiyun int32_t b_ret = 0;
518*4882a593Smuzhiyun
519*4882a593Smuzhiyun errno = 0;
520*4882a593Smuzhiyun b_ret = _dev[0]->io_control(RKCIF_CMD_SET_RESET, &reset);
521*4882a593Smuzhiyun if (b_ret < 0) {
522*4882a593Smuzhiyun LOGE_CAMHW_SUBM(SENSOR_SUBM, "device(%s) reset failed: %d (%s)!",
523*4882a593Smuzhiyun XCAM_STR(_dev[0]->get_device_name()), b_ret, strerror(errno));
524*4882a593Smuzhiyun return XCAM_RETURN_ERROR_IOCTL;
525*4882a593Smuzhiyun }
526*4882a593Smuzhiyun
527*4882a593Smuzhiyun LOGD_CAMHW_SUBM(SENSOR_SUBM, "device(%s) reset", XCAM_STR(_dev[0]->get_device_name()));
528*4882a593Smuzhiyun }
529*4882a593Smuzhiyun
530*4882a593Smuzhiyun return ret;
531*4882a593Smuzhiyun }
532*4882a593Smuzhiyun
533*4882a593Smuzhiyun XCamReturn
set_csi_mem_word_big_align(uint32_t width,uint32_t height,uint32_t sns_v4l_pix_fmt,int8_t sns_bpp)534*4882a593Smuzhiyun RawStreamCapUnit::set_csi_mem_word_big_align(uint32_t width, uint32_t height,
535*4882a593Smuzhiyun uint32_t sns_v4l_pix_fmt, int8_t sns_bpp)
536*4882a593Smuzhiyun {
537*4882a593Smuzhiyun XCamReturn ret = XCAM_RETURN_NO_ERROR;
538*4882a593Smuzhiyun
539*4882a593Smuzhiyun LOGD_CAMHW_SUBM(ISP20HW_SUBM,"sensor fmt 0x%x, %dx%d, sns_bpp: %d",
540*4882a593Smuzhiyun sns_v4l_pix_fmt, width, height, sns_bpp);
541*4882a593Smuzhiyun
542*4882a593Smuzhiyun for (int i = 0; i < 3; i++) {
543*4882a593Smuzhiyun if (!_dev[i].ptr()) {
544*4882a593Smuzhiyun ret = XCAM_RETURN_BYPASS;
545*4882a593Smuzhiyun break;
546*4882a593Smuzhiyun }
547*4882a593Smuzhiyun
548*4882a593Smuzhiyun if (((width / 2 - RKMOUDLE_UNITE_EXTEND_PIXEL) * sns_bpp / 8) & 0xf) {
549*4882a593Smuzhiyun int mem_mode = CSI_LVDS_MEM_WORD_HIGH_ALIGN;
550*4882a593Smuzhiyun int ret1 = _dev[i]->io_control (RKCIF_CMD_SET_CSI_MEMORY_MODE, &mem_mode);
551*4882a593Smuzhiyun if (ret1) {
552*4882a593Smuzhiyun LOGE_CAMHW_SUBM(ISP20HW_SUBM, "set CSI_MEM_WORD_BIG_ALIGN failed!\n");
553*4882a593Smuzhiyun ret = XCAM_RETURN_ERROR_IOCTL;
554*4882a593Smuzhiyun } else {
555*4882a593Smuzhiyun LOGD_CAMHW_SUBM(ISP20HW_SUBM,"set the memory mode of vicap to big align");
556*4882a593Smuzhiyun }
557*4882a593Smuzhiyun }
558*4882a593Smuzhiyun }
559*4882a593Smuzhiyun
560*4882a593Smuzhiyun return ret;
561*4882a593Smuzhiyun }
562*4882a593Smuzhiyun
563*4882a593Smuzhiyun }
564