1*4882a593Smuzhiyunconfig BR2_TOOLCHAIN_EXTERNAL_CODESCAPE_MTI_MIPS
2*4882a593Smuzhiyun	bool "Codescape MTI GNU Linux Toolchain 2018.09"
3*4882a593Smuzhiyun	depends on BR2_mips || BR2_mipsel || BR2_mips64 || BR2_mips64el
4*4882a593Smuzhiyun	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_7
5*4882a593Smuzhiyun	depends on BR2_HOSTARCH = "x86_64" || BR2_HOSTARCH = "x86"
6*4882a593Smuzhiyun	depends on BR2_MIPS_CPU_MIPS32R2 || (BR2_MIPS_CPU_MIPS64R2 && !BR2_MIPS_SOFT_FLOAT) || \
7*4882a593Smuzhiyun		BR2_MIPS_CPU_MIPS32R5 || (BR2_MIPS_CPU_MIPS64R5 && !BR2_MIPS_SOFT_FLOAT)
8*4882a593Smuzhiyun	select BR2_TOOLCHAIN_EXTERNAL_GLIBC
9*4882a593Smuzhiyun	select BR2_INSTALL_LIBSTDCPP
10*4882a593Smuzhiyun	select BR2_TOOLCHAIN_HEADERS_AT_LEAST_4_7
11*4882a593Smuzhiyun	select BR2_TOOLCHAIN_GCC_AT_LEAST_6
12*4882a593Smuzhiyun	select BR2_TOOLCHAIN_HAS_FORTRAN
13*4882a593Smuzhiyun	select BR2_TOOLCHAIN_HAS_OPENMP
14*4882a593Smuzhiyun	help
15*4882a593Smuzhiyun	  Codescape MTI GNU Linux Toolchain 2018.09 for the MIPS
16*4882a593Smuzhiyun	  architecture, from MIPS Tech LLC. It uses gcc 6.3.0,
17*4882a593Smuzhiyun	  binutils 2.28.51, glibc 2.20, gdb 7.9.1 and kernel headers
18*4882a593Smuzhiyun	  4.7. It has support for the following variants:
19*4882a593Smuzhiyun	    - MIPS32r2 - Big-Endian, Hard-Float, Legacy NaN, o32 ABI
20*4882a593Smuzhiyun	      Select 'MIPS (big endian)' Target Architecture
21*4882a593Smuzhiyun	      Select 'mips 32r2' Target Architecture Variant
22*4882a593Smuzhiyun	      Disable 'Use soft-float'
23*4882a593Smuzhiyun	    - MIPS32r2 - Big-Endian, Hard-Float, 2008 NaN, o32 ABI
24*4882a593Smuzhiyun	      Select 'MIPS (big endian)' Target Architecture
25*4882a593Smuzhiyun	      Select 'mips 32r2' Target Architecture Variant
26*4882a593Smuzhiyun	      Disable 'Use soft-float'
27*4882a593Smuzhiyun	      Set BR2_TARGET_OPTIMIZATION to '-mnan=2008'
28*4882a593Smuzhiyun	    - MIPS32r2 - Big-Endian, Soft-Float, Legacy NaN, o32 ABI
29*4882a593Smuzhiyun	      Select 'MIPS (big endian)' Target Architecture
30*4882a593Smuzhiyun	      Select 'mips 32r2' Target Architecture Variant
31*4882a593Smuzhiyun	      Enable 'Use soft-float'
32*4882a593Smuzhiyun	    - MIPS32r2 - Little-Endian, Hard-Float, Legacy NaN, o32 ABI
33*4882a593Smuzhiyun	      Select 'MIPS (little endian)' Target Architecture
34*4882a593Smuzhiyun	      Select 'mips 32r2' Target Architecture Variant
35*4882a593Smuzhiyun	      Disable 'Use soft-float'
36*4882a593Smuzhiyun	    - MIPS32r2 - Little-Endian, Hard-Float, 2008 NaN, o32 ABI
37*4882a593Smuzhiyun	      Select 'MIPS (little endian)' Target Architecture
38*4882a593Smuzhiyun	      Select 'mips 32r2' Target Architecture Variant
39*4882a593Smuzhiyun	      Disable 'Use soft-float'
40*4882a593Smuzhiyun	      Set BR2_TARGET_OPTIMIZATION to '-mnan=2008'
41*4882a593Smuzhiyun	    - MIPS32r2 - Little-Endian, Soft-Float, Legacy NaN, o32 ABI
42*4882a593Smuzhiyun	      Select 'MIPS (little endian)' Target Architecture
43*4882a593Smuzhiyun	      Select 'mips 32r2' Target Architecture Variant
44*4882a593Smuzhiyun	      Enable 'Use soft-float'
45*4882a593Smuzhiyun	    - MIPS32r2 - Little-Endian, Hard-Float, 2008 NaN, o32 ABI,
46*4882a593Smuzhiyun	      microMIPS
47*4882a593Smuzhiyun	      Select 'MIPS (little endian)' Target Architecture
48*4882a593Smuzhiyun	      Select 'mips 32r2' Target Architecture Variant
49*4882a593Smuzhiyun	      Enable 'Use soft-float'
50*4882a593Smuzhiyun	      Set BR2_TARGET_OPTIMIZATION to '-mmicromips'
51*4882a593Smuzhiyun	    - MIPS32r2 - Little-Endian, Soft-Float, Legacy NaN, o32 ABI,
52*4882a593Smuzhiyun	      microMIPS
53*4882a593Smuzhiyun	      Select 'MIPS (little endian)' Target Architecture
54*4882a593Smuzhiyun	      Select 'mips 32r2' Target Architecture Variant
55*4882a593Smuzhiyun	      Disable 'Use soft-float'
56*4882a593Smuzhiyun	      Set BR2_TARGET_OPTIMIZATION to '-mmicromips'
57*4882a593Smuzhiyun	    - MIPS64r2 - Big-Endian, Hard-Float, Legacy NaN, n32 ABI
58*4882a593Smuzhiyun	      Select 'MIPS64 (big endian)' Target Architecture
59*4882a593Smuzhiyun	      Select 'mips 64r2' Target Architecture Variant
60*4882a593Smuzhiyun	      Select 'n32' Target ABI
61*4882a593Smuzhiyun	      Disable 'Use soft-float'
62*4882a593Smuzhiyun	    - MIPS64r2 - Little-Endian, Hard-Float, Legacy NaN, n32 ABI
63*4882a593Smuzhiyun	      Select 'MIPS64 (little endian)' Target Architecture
64*4882a593Smuzhiyun	      Select 'mips 64r2' Target Architecture Variant
65*4882a593Smuzhiyun	      Select 'n32' Target ABI
66*4882a593Smuzhiyun	      Disable 'Use soft-float'
67*4882a593Smuzhiyun	    - MIPS64r2 - Big-Endian, Hard-Float, Legacy NaN, n64 ABI
68*4882a593Smuzhiyun	      Select 'MIPS64 (big endian)' Target Architecture
69*4882a593Smuzhiyun	      Select 'mips 64r2' Target Architecture Variant
70*4882a593Smuzhiyun	      Select 'n64' Target ABI
71*4882a593Smuzhiyun	      Disable 'Use soft-float'
72*4882a593Smuzhiyun	    - MIPS64r2 - Little-Endian, Hard-Float, Legacy NaN, n64 ABI
73*4882a593Smuzhiyun	      Select 'MIPS64 (little endian)' Target Architecture
74*4882a593Smuzhiyun	      Select 'mips 64r2' Target Architecture Variant
75*4882a593Smuzhiyun	      Select 'n64' Target ABI
76*4882a593Smuzhiyun	      Disable 'Use soft-float'
77