1*4882a593SmuzhiyunFrom 962ee8fc46ca51691bde1c8c1022dacbe8a037ed Mon Sep 17 00:00:00 2001 2*4882a593SmuzhiyunFrom: Carl Reinke <carlreinke@users.noreply.github.com> 3*4882a593SmuzhiyunDate: Sun, 14 Jun 2020 14:11:00 -0600 4*4882a593SmuzhiyunSubject: [PATCH] Move definitions that don't need to be exposed from opl.h to 5*4882a593Smuzhiyun opl.c 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun[Retrieved from: 8*4882a593Smuzhiyunhttps://github.com/opentyrian/opentyrian/commit/962ee8fc46ca51691bde1c8c1022dacbe8a037ed] 9*4882a593SmuzhiyunSigned-off-by: Fabrice Fontaine <fontaine.fabrice@gmail.com> 10*4882a593Smuzhiyun--- 11*4882a593Smuzhiyun src/opl.c | 153 +++++++++++++++++++++++++++++++++++++++++++++++++++- 12*4882a593Smuzhiyun src/opl.h | 157 ++---------------------------------------------------- 13*4882a593Smuzhiyun 2 files changed, 154 insertions(+), 156 deletions(-) 14*4882a593Smuzhiyun 15*4882a593Smuzhiyundiff --git a/src/opl.c b/src/opl.c 16*4882a593Smuzhiyunindex a4071c5..f15474c 100644 17*4882a593Smuzhiyun--- a/src/opl.c 18*4882a593Smuzhiyun+++ b/src/opl.c 19*4882a593Smuzhiyun@@ -23,12 +23,161 @@ 20*4882a593Smuzhiyun * Copyright (C) 1998-2001 Ken Silverman 21*4882a593Smuzhiyun * Ken Silverman's official web site: "http://www.advsys.net/ken" 22*4882a593Smuzhiyun */ 23*4882a593Smuzhiyun- 24*4882a593Smuzhiyun+#include "opl.h" 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun #include <math.h> 27*4882a593Smuzhiyun+#include <stdbool.h> 28*4882a593Smuzhiyun #include <stdlib.h> // rand() 29*4882a593Smuzhiyun #include <string.h> // memset() 30*4882a593Smuzhiyun-#include "opl.h" 31*4882a593Smuzhiyun+ 32*4882a593Smuzhiyun+#define fltype double 33*4882a593Smuzhiyun+ 34*4882a593Smuzhiyun+ /* 35*4882a593Smuzhiyun+ define attribution that inlines/forces inlining of a function (optional) 36*4882a593Smuzhiyun+ */ 37*4882a593Smuzhiyun+#define OPL_INLINE inline 38*4882a593Smuzhiyun+ 39*4882a593Smuzhiyun+ 40*4882a593Smuzhiyun+#undef NUM_CHANNELS 41*4882a593Smuzhiyun+#if defined(OPLTYPE_IS_OPL3) 42*4882a593Smuzhiyun+#define NUM_CHANNELS 18 43*4882a593Smuzhiyun+#else 44*4882a593Smuzhiyun+#define NUM_CHANNELS 9 45*4882a593Smuzhiyun+#endif 46*4882a593Smuzhiyun+ 47*4882a593Smuzhiyun+#define MAXOPERATORS (NUM_CHANNELS*2) 48*4882a593Smuzhiyun+ 49*4882a593Smuzhiyun+ 50*4882a593Smuzhiyun+#define FL05 ((fltype)0.5) 51*4882a593Smuzhiyun+#define FL2 ((fltype)2.0) 52*4882a593Smuzhiyun+#define PI ((fltype)3.1415926535897932384626433832795) 53*4882a593Smuzhiyun+ 54*4882a593Smuzhiyun+ 55*4882a593Smuzhiyun+#define FIXEDPT 0x10000 // fixed-point calculations using 16+16 56*4882a593Smuzhiyun+#define FIXEDPT_LFO 0x1000000 // fixed-point calculations using 8+24 57*4882a593Smuzhiyun+ 58*4882a593Smuzhiyun+#define WAVEPREC 1024 // waveform precision (10 bits) 59*4882a593Smuzhiyun+ 60*4882a593Smuzhiyun+#define INTFREQU ((fltype)(14318180.0 / 288.0)) // clocking of the chip 61*4882a593Smuzhiyun+ 62*4882a593Smuzhiyun+ 63*4882a593Smuzhiyun+#define OF_TYPE_ATT 0 64*4882a593Smuzhiyun+#define OF_TYPE_DEC 1 65*4882a593Smuzhiyun+#define OF_TYPE_REL 2 66*4882a593Smuzhiyun+#define OF_TYPE_SUS 3 67*4882a593Smuzhiyun+#define OF_TYPE_SUS_NOKEEP 4 68*4882a593Smuzhiyun+#define OF_TYPE_OFF 5 69*4882a593Smuzhiyun+ 70*4882a593Smuzhiyun+#define ARC_CONTROL 0x00 71*4882a593Smuzhiyun+#define ARC_TVS_KSR_MUL 0x20 72*4882a593Smuzhiyun+#define ARC_KSL_OUTLEV 0x40 73*4882a593Smuzhiyun+#define ARC_ATTR_DECR 0x60 74*4882a593Smuzhiyun+#define ARC_SUSL_RELR 0x80 75*4882a593Smuzhiyun+#define ARC_FREQ_NUM 0xa0 76*4882a593Smuzhiyun+#define ARC_KON_BNUM 0xb0 77*4882a593Smuzhiyun+#define ARC_PERC_MODE 0xbd 78*4882a593Smuzhiyun+#define ARC_FEEDBACK 0xc0 79*4882a593Smuzhiyun+#define ARC_WAVE_SEL 0xe0 80*4882a593Smuzhiyun+ 81*4882a593Smuzhiyun+#define ARC_SECONDSET 0x100 // second operator set for OPL3 82*4882a593Smuzhiyun+ 83*4882a593Smuzhiyun+ 84*4882a593Smuzhiyun+#define OP_ACT_OFF 0x00 85*4882a593Smuzhiyun+#define OP_ACT_NORMAL 0x01 // regular channel activated (bitmasked) 86*4882a593Smuzhiyun+#define OP_ACT_PERC 0x02 // percussion channel activated (bitmasked) 87*4882a593Smuzhiyun+ 88*4882a593Smuzhiyun+#define BLOCKBUF_SIZE 512 89*4882a593Smuzhiyun+ 90*4882a593Smuzhiyun+ 91*4882a593Smuzhiyun+ // vibrato constants 92*4882a593Smuzhiyun+#define VIBTAB_SIZE 8 93*4882a593Smuzhiyun+#define VIBFAC 70/50000 // no braces, integer mul/div 94*4882a593Smuzhiyun+ 95*4882a593Smuzhiyun+ // tremolo constants and table 96*4882a593Smuzhiyun+#define TREMTAB_SIZE 53 97*4882a593Smuzhiyun+#define TREM_FREQ ((fltype)(3.7)) // tremolo at 3.7hz 98*4882a593Smuzhiyun+ 99*4882a593Smuzhiyun+ 100*4882a593Smuzhiyun+ /* operator struct definition 101*4882a593Smuzhiyun+ For OPL2 all 9 channels consist of two operators each, carrier and modulator. 102*4882a593Smuzhiyun+ Channel x has operators x as modulator and operators (9+x) as carrier. 103*4882a593Smuzhiyun+ For OPL3 all 18 channels consist either of two operators (2op mode) or four 104*4882a593Smuzhiyun+ operators (4op mode) which is determined through register4 of the second 105*4882a593Smuzhiyun+ adlib register set. 106*4882a593Smuzhiyun+ Only the channels 0,1,2 (first set) and 9,10,11 (second set) can act as 107*4882a593Smuzhiyun+ 4op channels. The two additional operators for a channel y come from the 108*4882a593Smuzhiyun+ 2op channel y+3 so the operatorss y, (9+y), y+3, (9+y)+3 make up a 4op 109*4882a593Smuzhiyun+ channel. 110*4882a593Smuzhiyun+ */ 111*4882a593Smuzhiyun+typedef struct operator_struct { 112*4882a593Smuzhiyun+ Bit32s cval, lastcval; // current output/last output (used for feedback) 113*4882a593Smuzhiyun+ Bit32u tcount, wfpos, tinc; // time (position in waveform) and time increment 114*4882a593Smuzhiyun+ fltype amp, step_amp; // and amplification (envelope) 115*4882a593Smuzhiyun+ fltype vol; // volume 116*4882a593Smuzhiyun+ fltype sustain_level; // sustain level 117*4882a593Smuzhiyun+ Bit32s mfbi; // feedback amount 118*4882a593Smuzhiyun+ fltype a0, a1, a2, a3; // attack rate function coefficients 119*4882a593Smuzhiyun+ fltype decaymul, releasemul; // decay/release rate functions 120*4882a593Smuzhiyun+ Bit32u op_state; // current state of operator (attack/decay/sustain/release/off) 121*4882a593Smuzhiyun+ Bit32u toff; 122*4882a593Smuzhiyun+ Bit32s freq_high; // highest three bits of the frequency, used for vibrato calculations 123*4882a593Smuzhiyun+ Bit16s* cur_wform; // start of selected waveform 124*4882a593Smuzhiyun+ Bit32u cur_wmask; // mask for selected waveform 125*4882a593Smuzhiyun+ Bit32u act_state; // activity state (regular, percussion) 126*4882a593Smuzhiyun+ bool sus_keep; // keep sustain level when decay finished 127*4882a593Smuzhiyun+ bool vibrato,tremolo; // vibrato/tremolo enable bits 128*4882a593Smuzhiyun+ 129*4882a593Smuzhiyun+ // variables used to provide non-continuous envelopes 130*4882a593Smuzhiyun+ Bit32u generator_pos; // for non-standard sample rates we need to determine how many samples have passed 131*4882a593Smuzhiyun+ Bits cur_env_step; // current (standardized) sample position 132*4882a593Smuzhiyun+ Bits env_step_a,env_step_d,env_step_r; // number of std samples of one step (for attack/decay/release mode) 133*4882a593Smuzhiyun+ Bit8u step_skip_pos_a; // position of 8-cyclic step skipping (always 2^x to check against mask) 134*4882a593Smuzhiyun+ Bits env_step_skip_a; // bitmask that determines if a step is skipped (respective bit is zero then) 135*4882a593Smuzhiyun+ 136*4882a593Smuzhiyun+#if defined(OPLTYPE_IS_OPL3) 137*4882a593Smuzhiyun+ bool is_4op,is_4op_attached; // base of a 4op channel/part of a 4op channel 138*4882a593Smuzhiyun+ Bit32s left_pan,right_pan; // opl3 stereo panning amount 139*4882a593Smuzhiyun+#endif 140*4882a593Smuzhiyun+} op_type; 141*4882a593Smuzhiyun+ 142*4882a593Smuzhiyun+// per-chip variables 143*4882a593Smuzhiyun+static op_type op[MAXOPERATORS]; 144*4882a593Smuzhiyun+ 145*4882a593Smuzhiyun+static Bits int_samplerate; 146*4882a593Smuzhiyun+ 147*4882a593Smuzhiyun+static Bit8u status; 148*4882a593Smuzhiyun+static Bit32u opl_index; 149*4882a593Smuzhiyun+#if defined(OPLTYPE_IS_OPL3) 150*4882a593Smuzhiyun+static Bit8u adlibreg[512]; // adlib register set (including second set) 151*4882a593Smuzhiyun+static Bit8u wave_sel[44]; // waveform selection 152*4882a593Smuzhiyun+#else 153*4882a593Smuzhiyun+static Bit8u adlibreg[256]; // adlib register set 154*4882a593Smuzhiyun+static Bit8u wave_sel[22]; // waveform selection 155*4882a593Smuzhiyun+#endif 156*4882a593Smuzhiyun+ 157*4882a593Smuzhiyun+ 158*4882a593Smuzhiyun+ // vibrato/tremolo increment/counter 159*4882a593Smuzhiyun+static Bit32u vibtab_pos; 160*4882a593Smuzhiyun+static Bit32u vibtab_add; 161*4882a593Smuzhiyun+static Bit32u tremtab_pos; 162*4882a593Smuzhiyun+static Bit32u tremtab_add; 163*4882a593Smuzhiyun+ 164*4882a593Smuzhiyun+ 165*4882a593Smuzhiyun+// enable an operator 166*4882a593Smuzhiyun+void enable_operator(Bitu regbase, op_type* op_pt, Bit32u act_type); 167*4882a593Smuzhiyun+ 168*4882a593Smuzhiyun+// functions to change parameters of an operator 169*4882a593Smuzhiyun+void change_frequency(Bitu chanbase, Bitu regbase, op_type* op_pt); 170*4882a593Smuzhiyun+ 171*4882a593Smuzhiyun+void change_attackrate(Bitu regbase, op_type* op_pt); 172*4882a593Smuzhiyun+void change_decayrate(Bitu regbase, op_type* op_pt); 173*4882a593Smuzhiyun+void change_releaserate(Bitu regbase, op_type* op_pt); 174*4882a593Smuzhiyun+void change_sustainlevel(Bitu regbase, op_type* op_pt); 175*4882a593Smuzhiyun+void change_waveform(Bitu regbase, op_type* op_pt); 176*4882a593Smuzhiyun+void change_keepsustain(Bitu regbase, op_type* op_pt); 177*4882a593Smuzhiyun+void change_vibrato(Bitu regbase, op_type* op_pt); 178*4882a593Smuzhiyun+void change_feedback(Bitu chanbase, op_type* op_pt); 179*4882a593Smuzhiyun+ 180*4882a593Smuzhiyun 181*4882a593Smuzhiyun static Bit32u generator_add; // should be a chip parameter 182*4882a593Smuzhiyun 183*4882a593Smuzhiyundiff --git a/src/opl.h b/src/opl.h 184*4882a593Smuzhiyunindex c8e643b..cbb56ad 100644 185*4882a593Smuzhiyun--- a/src/opl.h 186*4882a593Smuzhiyun+++ b/src/opl.h 187*4882a593Smuzhiyun@@ -25,11 +25,8 @@ 188*4882a593Smuzhiyun * Ken Silverman's official web site: "http://www.advsys.net/ken" 189*4882a593Smuzhiyun */ 190*4882a593Smuzhiyun 191*4882a593Smuzhiyun- 192*4882a593Smuzhiyun-#define fltype double 193*4882a593Smuzhiyun- 194*4882a593Smuzhiyun-#include <stdbool.h> 195*4882a593Smuzhiyun #include <stdint.h> 196*4882a593Smuzhiyun+ 197*4882a593Smuzhiyun typedef uintptr_t Bitu; 198*4882a593Smuzhiyun typedef intptr_t Bits; 199*4882a593Smuzhiyun typedef uint32_t Bit32u; 200*4882a593Smuzhiyun@@ -39,154 +36,6 @@ typedef int16_t Bit16s; 201*4882a593Smuzhiyun typedef uint8_t Bit8u; 202*4882a593Smuzhiyun typedef int8_t Bit8s; 203*4882a593Smuzhiyun 204*4882a593Smuzhiyun- 205*4882a593Smuzhiyun-/* 206*4882a593Smuzhiyun- define attribution that inlines/forces inlining of a function (optional) 207*4882a593Smuzhiyun-*/ 208*4882a593Smuzhiyun-#define OPL_INLINE inline 209*4882a593Smuzhiyun- 210*4882a593Smuzhiyun- 211*4882a593Smuzhiyun-#undef NUM_CHANNELS 212*4882a593Smuzhiyun-#if defined(OPLTYPE_IS_OPL3) 213*4882a593Smuzhiyun-#define NUM_CHANNELS 18 214*4882a593Smuzhiyun-#else 215*4882a593Smuzhiyun-#define NUM_CHANNELS 9 216*4882a593Smuzhiyun-#endif 217*4882a593Smuzhiyun- 218*4882a593Smuzhiyun-#define MAXOPERATORS (NUM_CHANNELS*2) 219*4882a593Smuzhiyun- 220*4882a593Smuzhiyun- 221*4882a593Smuzhiyun-#define FL05 ((fltype)0.5) 222*4882a593Smuzhiyun-#define FL2 ((fltype)2.0) 223*4882a593Smuzhiyun-#define PI ((fltype)3.1415926535897932384626433832795) 224*4882a593Smuzhiyun- 225*4882a593Smuzhiyun- 226*4882a593Smuzhiyun-#define FIXEDPT 0x10000 // fixed-point calculations using 16+16 227*4882a593Smuzhiyun-#define FIXEDPT_LFO 0x1000000 // fixed-point calculations using 8+24 228*4882a593Smuzhiyun- 229*4882a593Smuzhiyun-#define WAVEPREC 1024 // waveform precision (10 bits) 230*4882a593Smuzhiyun- 231*4882a593Smuzhiyun-#define INTFREQU ((fltype)(14318180.0 / 288.0)) // clocking of the chip 232*4882a593Smuzhiyun- 233*4882a593Smuzhiyun- 234*4882a593Smuzhiyun-#define OF_TYPE_ATT 0 235*4882a593Smuzhiyun-#define OF_TYPE_DEC 1 236*4882a593Smuzhiyun-#define OF_TYPE_REL 2 237*4882a593Smuzhiyun-#define OF_TYPE_SUS 3 238*4882a593Smuzhiyun-#define OF_TYPE_SUS_NOKEEP 4 239*4882a593Smuzhiyun-#define OF_TYPE_OFF 5 240*4882a593Smuzhiyun- 241*4882a593Smuzhiyun-#define ARC_CONTROL 0x00 242*4882a593Smuzhiyun-#define ARC_TVS_KSR_MUL 0x20 243*4882a593Smuzhiyun-#define ARC_KSL_OUTLEV 0x40 244*4882a593Smuzhiyun-#define ARC_ATTR_DECR 0x60 245*4882a593Smuzhiyun-#define ARC_SUSL_RELR 0x80 246*4882a593Smuzhiyun-#define ARC_FREQ_NUM 0xa0 247*4882a593Smuzhiyun-#define ARC_KON_BNUM 0xb0 248*4882a593Smuzhiyun-#define ARC_PERC_MODE 0xbd 249*4882a593Smuzhiyun-#define ARC_FEEDBACK 0xc0 250*4882a593Smuzhiyun-#define ARC_WAVE_SEL 0xe0 251*4882a593Smuzhiyun- 252*4882a593Smuzhiyun-#define ARC_SECONDSET 0x100 // second operator set for OPL3 253*4882a593Smuzhiyun- 254*4882a593Smuzhiyun- 255*4882a593Smuzhiyun-#define OP_ACT_OFF 0x00 256*4882a593Smuzhiyun-#define OP_ACT_NORMAL 0x01 // regular channel activated (bitmasked) 257*4882a593Smuzhiyun-#define OP_ACT_PERC 0x02 // percussion channel activated (bitmasked) 258*4882a593Smuzhiyun- 259*4882a593Smuzhiyun-#define BLOCKBUF_SIZE 512 260*4882a593Smuzhiyun- 261*4882a593Smuzhiyun- 262*4882a593Smuzhiyun-// vibrato constants 263*4882a593Smuzhiyun-#define VIBTAB_SIZE 8 264*4882a593Smuzhiyun-#define VIBFAC 70/50000 // no braces, integer mul/div 265*4882a593Smuzhiyun- 266*4882a593Smuzhiyun-// tremolo constants and table 267*4882a593Smuzhiyun-#define TREMTAB_SIZE 53 268*4882a593Smuzhiyun-#define TREM_FREQ ((fltype)(3.7)) // tremolo at 3.7hz 269*4882a593Smuzhiyun- 270*4882a593Smuzhiyun- 271*4882a593Smuzhiyun-/* operator struct definition 272*4882a593Smuzhiyun- For OPL2 all 9 channels consist of two operators each, carrier and modulator. 273*4882a593Smuzhiyun- Channel x has operators x as modulator and operators (9+x) as carrier. 274*4882a593Smuzhiyun- For OPL3 all 18 channels consist either of two operators (2op mode) or four 275*4882a593Smuzhiyun- operators (4op mode) which is determined through register4 of the second 276*4882a593Smuzhiyun- adlib register set. 277*4882a593Smuzhiyun- Only the channels 0,1,2 (first set) and 9,10,11 (second set) can act as 278*4882a593Smuzhiyun- 4op channels. The two additional operators for a channel y come from the 279*4882a593Smuzhiyun- 2op channel y+3 so the operatorss y, (9+y), y+3, (9+y)+3 make up a 4op 280*4882a593Smuzhiyun- channel. 281*4882a593Smuzhiyun-*/ 282*4882a593Smuzhiyun-typedef struct operator_struct { 283*4882a593Smuzhiyun- Bit32s cval, lastcval; // current output/last output (used for feedback) 284*4882a593Smuzhiyun- Bit32u tcount, wfpos, tinc; // time (position in waveform) and time increment 285*4882a593Smuzhiyun- fltype amp, step_amp; // and amplification (envelope) 286*4882a593Smuzhiyun- fltype vol; // volume 287*4882a593Smuzhiyun- fltype sustain_level; // sustain level 288*4882a593Smuzhiyun- Bit32s mfbi; // feedback amount 289*4882a593Smuzhiyun- fltype a0, a1, a2, a3; // attack rate function coefficients 290*4882a593Smuzhiyun- fltype decaymul, releasemul; // decay/release rate functions 291*4882a593Smuzhiyun- Bit32u op_state; // current state of operator (attack/decay/sustain/release/off) 292*4882a593Smuzhiyun- Bit32u toff; 293*4882a593Smuzhiyun- Bit32s freq_high; // highest three bits of the frequency, used for vibrato calculations 294*4882a593Smuzhiyun- Bit16s* cur_wform; // start of selected waveform 295*4882a593Smuzhiyun- Bit32u cur_wmask; // mask for selected waveform 296*4882a593Smuzhiyun- Bit32u act_state; // activity state (regular, percussion) 297*4882a593Smuzhiyun- bool sus_keep; // keep sustain level when decay finished 298*4882a593Smuzhiyun- bool vibrato,tremolo; // vibrato/tremolo enable bits 299*4882a593Smuzhiyun- 300*4882a593Smuzhiyun- // variables used to provide non-continuous envelopes 301*4882a593Smuzhiyun- Bit32u generator_pos; // for non-standard sample rates we need to determine how many samples have passed 302*4882a593Smuzhiyun- Bits cur_env_step; // current (standardized) sample position 303*4882a593Smuzhiyun- Bits env_step_a,env_step_d,env_step_r; // number of std samples of one step (for attack/decay/release mode) 304*4882a593Smuzhiyun- Bit8u step_skip_pos_a; // position of 8-cyclic step skipping (always 2^x to check against mask) 305*4882a593Smuzhiyun- Bits env_step_skip_a; // bitmask that determines if a step is skipped (respective bit is zero then) 306*4882a593Smuzhiyun- 307*4882a593Smuzhiyun-#if defined(OPLTYPE_IS_OPL3) 308*4882a593Smuzhiyun- bool is_4op,is_4op_attached; // base of a 4op channel/part of a 4op channel 309*4882a593Smuzhiyun- Bit32s left_pan,right_pan; // opl3 stereo panning amount 310*4882a593Smuzhiyun-#endif 311*4882a593Smuzhiyun-} op_type; 312*4882a593Smuzhiyun- 313*4882a593Smuzhiyun-// per-chip variables 314*4882a593Smuzhiyun-Bitu chip_num; 315*4882a593Smuzhiyun-op_type op[MAXOPERATORS]; 316*4882a593Smuzhiyun- 317*4882a593Smuzhiyun-Bits int_samplerate; 318*4882a593Smuzhiyun- 319*4882a593Smuzhiyun-Bit8u status; 320*4882a593Smuzhiyun-Bit32u opl_index; 321*4882a593Smuzhiyun-#if defined(OPLTYPE_IS_OPL3) 322*4882a593Smuzhiyun-Bit8u adlibreg[512]; // adlib register set (including second set) 323*4882a593Smuzhiyun-Bit8u wave_sel[44]; // waveform selection 324*4882a593Smuzhiyun-#else 325*4882a593Smuzhiyun-Bit8u adlibreg[256]; // adlib register set 326*4882a593Smuzhiyun-Bit8u wave_sel[22]; // waveform selection 327*4882a593Smuzhiyun-#endif 328*4882a593Smuzhiyun- 329*4882a593Smuzhiyun- 330*4882a593Smuzhiyun-// vibrato/tremolo increment/counter 331*4882a593Smuzhiyun-Bit32u vibtab_pos; 332*4882a593Smuzhiyun-Bit32u vibtab_add; 333*4882a593Smuzhiyun-Bit32u tremtab_pos; 334*4882a593Smuzhiyun-Bit32u tremtab_add; 335*4882a593Smuzhiyun- 336*4882a593Smuzhiyun- 337*4882a593Smuzhiyun-// enable an operator 338*4882a593Smuzhiyun-void enable_operator(Bitu regbase, op_type* op_pt, Bit32u act_type); 339*4882a593Smuzhiyun- 340*4882a593Smuzhiyun-// functions to change parameters of an operator 341*4882a593Smuzhiyun-void change_frequency(Bitu chanbase, Bitu regbase, op_type* op_pt); 342*4882a593Smuzhiyun- 343*4882a593Smuzhiyun-void change_attackrate(Bitu regbase, op_type* op_pt); 344*4882a593Smuzhiyun-void change_decayrate(Bitu regbase, op_type* op_pt); 345*4882a593Smuzhiyun-void change_releaserate(Bitu regbase, op_type* op_pt); 346*4882a593Smuzhiyun-void change_sustainlevel(Bitu regbase, op_type* op_pt); 347*4882a593Smuzhiyun-void change_waveform(Bitu regbase, op_type* op_pt); 348*4882a593Smuzhiyun-void change_keepsustain(Bitu regbase, op_type* op_pt); 349*4882a593Smuzhiyun-void change_vibrato(Bitu regbase, op_type* op_pt); 350*4882a593Smuzhiyun-void change_feedback(Bitu chanbase, op_type* op_pt); 351*4882a593Smuzhiyun- 352*4882a593Smuzhiyun // general functions 353*4882a593Smuzhiyun void adlib_init(Bit32u samplerate); 354*4882a593Smuzhiyun void adlib_write(Bitu idx, Bit8u val); 355*4882a593Smuzhiyun@@ -195,8 +44,8 @@ void adlib_getsample(Bit16s* sndptr, Bits numsamples); 356*4882a593Smuzhiyun Bitu adlib_reg_read(Bitu port); 357*4882a593Smuzhiyun void adlib_write_index(Bitu port, Bit8u val); 358*4882a593Smuzhiyun 359*4882a593Smuzhiyun-#endif /* OPL_H */ 360*4882a593Smuzhiyun- 361*4882a593Smuzhiyun #define opl_init() adlib_init(OUTPUT_QUALITY * 11025) 362*4882a593Smuzhiyun #define opl_write(reg, val) adlib_write(reg, val) 363*4882a593Smuzhiyun #define opl_update(buf, num) adlib_getsample(buf, num) 364*4882a593Smuzhiyun+ 365*4882a593Smuzhiyun+#endif /* OPL_H */ 366