1*4882a593SmuzhiyunFrom c505f81e336088b6729a5407a03459f488353288 Mon Sep 17 00:00:00 2001
2*4882a593SmuzhiyunFrom: Fabrice Fontaine <fontaine.fabrice@gmail.com>
3*4882a593SmuzhiyunDate: Mon, 24 May 2021 22:54:01 +0200
4*4882a593SmuzhiyunSubject: [PATCH] codec/common/inc/asmdefs_mmi.h: fix mips32 build
5*4882a593Smuzhiyun
6*4882a593SmuzhiyunFix the following build failure on mips32 which is raised since version
7*4882a593Smuzhiyun2.0.0 and
8*4882a593Smuzhiyunhttps://github.com/cisco/openh264/commit/b13e5bceb18ebb93d0313b46aab4af6f480ca933:
9*4882a593Smuzhiyun
10*4882a593Smuzhiyuncodec/common/mips/copy_mb_mmi.c: In function 'WelsCopy16x16_mmi':
11*4882a593Smuzhiyun./codec/common/inc/asmdefs_mmi.h:293:21: error: '_ABI64' undeclared (first use in this function)
12*4882a593Smuzhiyun  293 |    if (_MIPS_SIM == _ABI64)                                    \
13*4882a593Smuzhiyun      |                     ^~~~~~
14*4882a593Smuzhiyun
15*4882a593SmuzhiyunFixes:
16*4882a593Smuzhiyun - http://autobuild.buildroot.org/results/cba3e9d0fd061cc3a92cb732bcdc2c7b66dbf6cb
17*4882a593Smuzhiyun
18*4882a593SmuzhiyunSigned-off-by: Fabrice Fontaine <fontaine.fabrice@gmail.com>
19*4882a593Smuzhiyun[Upstream status: https://github.com/cisco/openh264/pull/3384]
20*4882a593Smuzhiyun---
21*4882a593Smuzhiyun codec/common/inc/asmdefs_mmi.h | 17 +++++++++++------
22*4882a593Smuzhiyun 1 file changed, 11 insertions(+), 6 deletions(-)
23*4882a593Smuzhiyun
24*4882a593Smuzhiyundiff --git a/codec/common/inc/asmdefs_mmi.h b/codec/common/inc/asmdefs_mmi.h
25*4882a593Smuzhiyunindex 69a7ae39..5d1aed93 100644
26*4882a593Smuzhiyun--- a/codec/common/inc/asmdefs_mmi.h
27*4882a593Smuzhiyun+++ b/codec/common/inc/asmdefs_mmi.h
28*4882a593Smuzhiyun@@ -288,9 +288,9 @@
29*4882a593Smuzhiyun /**
30*4882a593Smuzhiyun  * backup register
31*4882a593Smuzhiyun  */
32*4882a593Smuzhiyun+#if defined(_ABI64) && _MIPS_SIM == _ABI64
33*4882a593Smuzhiyun #define BACKUP_REG \
34*4882a593Smuzhiyun    double __attribute__((aligned(16))) __back_temp[8];         \
35*4882a593Smuzhiyun-   if (_MIPS_SIM == _ABI64)                                    \
36*4882a593Smuzhiyun    __asm__ volatile (                                          \
37*4882a593Smuzhiyun      "gssqc1       $f25,      $f24,       0x00(%[temp])  \n\t" \
38*4882a593Smuzhiyun      "gssqc1       $f27,      $f26,       0x10(%[temp])  \n\t" \
39*4882a593Smuzhiyun@@ -299,8 +299,10 @@
40*4882a593Smuzhiyun      :                                                         \
41*4882a593Smuzhiyun      : [temp]"r"(__back_temp)                                  \
42*4882a593Smuzhiyun      : "memory"                                                \
43*4882a593Smuzhiyun-   );                                                          \
44*4882a593Smuzhiyun-  else                                                         \
45*4882a593Smuzhiyun+   );
46*4882a593Smuzhiyun+#else
47*4882a593Smuzhiyun+#define BACKUP_REG \
48*4882a593Smuzhiyun+   double __attribute__((aligned(16))) __back_temp[8];         \
49*4882a593Smuzhiyun    __asm__ volatile (                                          \
50*4882a593Smuzhiyun      "gssqc1       $f22,      $f20,       0x00(%[temp])  \n\t" \
51*4882a593Smuzhiyun      "gssqc1       $f26,      $f24,       0x10(%[temp])  \n\t" \
52*4882a593Smuzhiyun@@ -309,12 +311,13 @@
53*4882a593Smuzhiyun      : [temp]"r"(__back_temp)                                  \
54*4882a593Smuzhiyun      : "memory"                                                \
55*4882a593Smuzhiyun    );
56*4882a593Smuzhiyun+#endif
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun /**
59*4882a593Smuzhiyun  * recover register
60*4882a593Smuzhiyun  */
61*4882a593Smuzhiyun+#if defined(_ABI64) && _MIPS_SIM == _ABI64
62*4882a593Smuzhiyun #define RECOVER_REG \
63*4882a593Smuzhiyun-   if (_MIPS_SIM == _ABI64)                                    \
64*4882a593Smuzhiyun    __asm__ volatile (                                          \
65*4882a593Smuzhiyun      "gslqc1       $f25,      $f24,       0x00(%[temp])  \n\t" \
66*4882a593Smuzhiyun      "gslqc1       $f27,      $f26,       0x10(%[temp])  \n\t" \
67*4882a593Smuzhiyun@@ -323,8 +326,9 @@
68*4882a593Smuzhiyun      :                                                         \
69*4882a593Smuzhiyun      : [temp]"r"(__back_temp)                                  \
70*4882a593Smuzhiyun      : "memory"                                                \
71*4882a593Smuzhiyun-   );                                                          \
72*4882a593Smuzhiyun-   else                                                        \
73*4882a593Smuzhiyun+   );
74*4882a593Smuzhiyun+#else
75*4882a593Smuzhiyun+#define RECOVER_REG \
76*4882a593Smuzhiyun    __asm__ volatile (                                          \
77*4882a593Smuzhiyun      "gslqc1       $f22,      $f20,       0x00(%[temp])  \n\t" \
78*4882a593Smuzhiyun      "gslqc1       $f26,      $f24,       0x10(%[temp])  \n\t" \
79*4882a593Smuzhiyun@@ -333,6 +337,7 @@
80*4882a593Smuzhiyun      : [temp]"r"(__back_temp)                                  \
81*4882a593Smuzhiyun      : "memory"                                                \
82*4882a593Smuzhiyun    );
83*4882a593Smuzhiyun+#endif
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun # define OK             1
86*4882a593Smuzhiyun # define NOTOK          0
87*4882a593Smuzhiyun--
88*4882a593Smuzhiyun2.30.2
89*4882a593Smuzhiyun
90