1*4882a593SmuzhiyunFix build issue caused by invalid register usage on x86 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunPatch taken from https://github.com/openexr/openexr/issues/128. 4*4882a593Smuzhiyun 5*4882a593SmuzhiyunSigned-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 6*4882a593Smuzhiyun 7*4882a593SmuzhiyunIndex: b/Source/OpenEXR/IlmImf/ImfSystemSpecific.cpp 8*4882a593Smuzhiyun=================================================================== 9*4882a593Smuzhiyun--- a/Source/OpenEXR/IlmImf/ImfSystemSpecific.cpp 10*4882a593Smuzhiyun+++ b/Source/OpenEXR/IlmImf/ImfSystemSpecific.cpp 11*4882a593Smuzhiyun@@ -40,21 +40,19 @@ 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun namespace { 14*4882a593Smuzhiyun #if defined(IMF_HAVE_SSE2) && defined(__GNUC__) 15*4882a593Smuzhiyun- 16*4882a593Smuzhiyun+#include <cpuid.h> 17*4882a593Smuzhiyun // Helper functions for gcc + SSE enabled 18*4882a593Smuzhiyun- void cpuid(int n, int &eax, int &ebx, int &ecx, int &edx) 19*4882a593Smuzhiyun+ void cpuid(unsigned int n, unsigned int &eax, unsigned int &ebx, 20*4882a593Smuzhiyun+ unsigned int &ecx, unsigned int &edx) 21*4882a593Smuzhiyun { 22*4882a593Smuzhiyun- __asm__ __volatile__ ( 23*4882a593Smuzhiyun- "cpuid" 24*4882a593Smuzhiyun- : /* Output */ "=a"(eax), "=b"(ebx), "=c"(ecx), "=d"(edx) 25*4882a593Smuzhiyun- : /* Input */ "a"(n) 26*4882a593Smuzhiyun- : /* Clobber */); 27*4882a593Smuzhiyun+ __get_cpuid(n, &eax, &ebx, &ecx, &edx); 28*4882a593Smuzhiyun } 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun #else // IMF_HAVE_SSE2 && __GNUC__ 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun // Helper functions for generic compiler - all disabled 33*4882a593Smuzhiyun- void cpuid(int n, int &eax, int &ebx, int &ecx, int &edx) 34*4882a593Smuzhiyun+ void cpuid(unsigned int n, unsigned int &eax, unsigned int &ebx, 35*4882a593Smuzhiyun+ unsigned int &ecx, unsigned int &edx) 36*4882a593Smuzhiyun { 37*4882a593Smuzhiyun eax = ebx = ecx = edx = 0; 38*4882a593Smuzhiyun } 39*4882a593Smuzhiyun@@ -64,7 +62,7 @@ 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun #ifdef OPENEXR_IMF_HAVE_GCC_INLINE_ASM_AVX 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun- void xgetbv(int n, int &eax, int &edx) 44*4882a593Smuzhiyun+ void xgetbv(unsigned int n, unsigned int &eax, unsigned int &edx) 45*4882a593Smuzhiyun { 46*4882a593Smuzhiyun __asm__ __volatile__ ( 47*4882a593Smuzhiyun "xgetbv" 48*4882a593Smuzhiyun@@ -75,7 +73,7 @@ 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun #else // OPENEXR_IMF_HAVE_GCC_INLINE_ASM_AVX 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun- void xgetbv(int n, int &eax, int &edx) 53*4882a593Smuzhiyun+ void xgetbv(unsigned int n, unsigned int &eax, unsigned int &edx) 54*4882a593Smuzhiyun { 55*4882a593Smuzhiyun eax = edx = 0; 56*4882a593Smuzhiyun } 57*4882a593Smuzhiyun@@ -94,8 +92,8 @@ 58*4882a593Smuzhiyun f16c(false) 59*4882a593Smuzhiyun { 60*4882a593Smuzhiyun bool osxsave = false; 61*4882a593Smuzhiyun- int max = 0; 62*4882a593Smuzhiyun- int eax, ebx, ecx, edx; 63*4882a593Smuzhiyun+ unsigned int max = 0; 64*4882a593Smuzhiyun+ unsigned int eax, ebx, ecx, edx; 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun cpuid(0, max, ebx, ecx, edx); 67*4882a593Smuzhiyun if (max > 0) 68