1*4882a593SmuzhiyunFrom ca2c3a7d3db7a699c358d3408f820396dd536fc8 Mon Sep 17 00:00:00 2001 2*4882a593SmuzhiyunFrom: Segher Boessenkool <segher@kernel.crashing.org> 3*4882a593SmuzhiyunDate: Tue, 1 Mar 2022 17:04:29 +0000 4*4882a593SmuzhiyunSubject: [PATCH] rs6000: Improve .machine 5*4882a593Smuzhiyun 6*4882a593SmuzhiyunThis adds more correct .machine for most older CPUs. It should be 7*4882a593Smuzhiyunconservative in the sense that everything we handled before we handle at 8*4882a593Smuzhiyunleast as well now. This does not yet revamp the server CPU handling, it 9*4882a593Smuzhiyunis too risky at this point in time. 10*4882a593Smuzhiyun 11*4882a593SmuzhiyunTested on powerpc64-linux {-m32,-m64}. Also manually tested with all 12*4882a593Smuzhiyun-mcpu=, and the output of that passed through the GNU assembler. 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun2022-03-04 Segher Boessenkool <segher@kernel.crashing.org> 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun * config/rs6000/rs6000.c (rs6000_machine_from_flags): Restructure a 17*4882a593Smuzhiyun bit. Handle most older CPUs. 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun(cherry picked from commit 77eccbf39ed55297802bb66dff5f62507a7239e3) 20*4882a593Smuzhiyun(cherry picked from commit fc7e603edc67c66a14f893f3b5a0a34e7d26f77c) 21*4882a593SmuzhiyunSigned-off-by: Romain Naour <romain.naour@gmail.com> 22*4882a593Smuzhiyun--- 23*4882a593Smuzhiyun gcc/config/rs6000/rs6000.c | 81 +++++++++++++++++++++++++------------- 24*4882a593Smuzhiyun 1 file changed, 54 insertions(+), 27 deletions(-) 25*4882a593Smuzhiyun 26*4882a593Smuzhiyundiff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c 27*4882a593Smuzhiyunindex 0421dc7adb3..0a55c979c36 100644 28*4882a593Smuzhiyun--- a/gcc/config/rs6000/rs6000.c 29*4882a593Smuzhiyun+++ b/gcc/config/rs6000/rs6000.c 30*4882a593Smuzhiyun@@ -5742,33 +5742,60 @@ const char *rs6000_machine; 31*4882a593Smuzhiyun const char * 32*4882a593Smuzhiyun rs6000_machine_from_flags (void) 33*4882a593Smuzhiyun { 34*4882a593Smuzhiyun- /* For some CPUs, the machine cannot be determined by ISA flags. We have to 35*4882a593Smuzhiyun- check them first. */ 36*4882a593Smuzhiyun- switch (rs6000_cpu) 37*4882a593Smuzhiyun- { 38*4882a593Smuzhiyun- case PROCESSOR_PPC8540: 39*4882a593Smuzhiyun- case PROCESSOR_PPC8548: 40*4882a593Smuzhiyun- return "e500"; 41*4882a593Smuzhiyun- 42*4882a593Smuzhiyun- case PROCESSOR_PPCE300C2: 43*4882a593Smuzhiyun- case PROCESSOR_PPCE300C3: 44*4882a593Smuzhiyun- return "e300"; 45*4882a593Smuzhiyun- 46*4882a593Smuzhiyun- case PROCESSOR_PPCE500MC: 47*4882a593Smuzhiyun- return "e500mc"; 48*4882a593Smuzhiyun- 49*4882a593Smuzhiyun- case PROCESSOR_PPCE500MC64: 50*4882a593Smuzhiyun- return "e500mc64"; 51*4882a593Smuzhiyun- 52*4882a593Smuzhiyun- case PROCESSOR_PPCE5500: 53*4882a593Smuzhiyun- return "e5500"; 54*4882a593Smuzhiyun- 55*4882a593Smuzhiyun- case PROCESSOR_PPCE6500: 56*4882a593Smuzhiyun- return "e6500"; 57*4882a593Smuzhiyun- 58*4882a593Smuzhiyun- default: 59*4882a593Smuzhiyun- break; 60*4882a593Smuzhiyun- } 61*4882a593Smuzhiyun+ /* e300 and e500 */ 62*4882a593Smuzhiyun+ if (rs6000_cpu == PROCESSOR_PPCE300C2 || rs6000_cpu == PROCESSOR_PPCE300C3) 63*4882a593Smuzhiyun+ return "e300"; 64*4882a593Smuzhiyun+ if (rs6000_cpu == PROCESSOR_PPC8540 || rs6000_cpu == PROCESSOR_PPC8548) 65*4882a593Smuzhiyun+ return "e500"; 66*4882a593Smuzhiyun+ if (rs6000_cpu == PROCESSOR_PPCE500MC) 67*4882a593Smuzhiyun+ return "e500mc"; 68*4882a593Smuzhiyun+ if (rs6000_cpu == PROCESSOR_PPCE500MC64) 69*4882a593Smuzhiyun+ return "e500mc64"; 70*4882a593Smuzhiyun+ if (rs6000_cpu == PROCESSOR_PPCE5500) 71*4882a593Smuzhiyun+ return "e5500"; 72*4882a593Smuzhiyun+ if (rs6000_cpu == PROCESSOR_PPCE6500) 73*4882a593Smuzhiyun+ return "e6500"; 74*4882a593Smuzhiyun+ 75*4882a593Smuzhiyun+ /* 400 series */ 76*4882a593Smuzhiyun+ if (rs6000_cpu == PROCESSOR_PPC403) 77*4882a593Smuzhiyun+ return "\"403\""; 78*4882a593Smuzhiyun+ if (rs6000_cpu == PROCESSOR_PPC405) 79*4882a593Smuzhiyun+ return "\"405\""; 80*4882a593Smuzhiyun+ if (rs6000_cpu == PROCESSOR_PPC440) 81*4882a593Smuzhiyun+ return "\"440\""; 82*4882a593Smuzhiyun+ if (rs6000_cpu == PROCESSOR_PPC476) 83*4882a593Smuzhiyun+ return "\"476\""; 84*4882a593Smuzhiyun+ 85*4882a593Smuzhiyun+ /* A2 */ 86*4882a593Smuzhiyun+ if (rs6000_cpu == PROCESSOR_PPCA2) 87*4882a593Smuzhiyun+ return "a2"; 88*4882a593Smuzhiyun+ 89*4882a593Smuzhiyun+ /* Cell BE */ 90*4882a593Smuzhiyun+ if (rs6000_cpu == PROCESSOR_CELL) 91*4882a593Smuzhiyun+ return "cell"; 92*4882a593Smuzhiyun+ 93*4882a593Smuzhiyun+ /* Titan */ 94*4882a593Smuzhiyun+ if (rs6000_cpu == PROCESSOR_TITAN) 95*4882a593Smuzhiyun+ return "titan"; 96*4882a593Smuzhiyun+ 97*4882a593Smuzhiyun+ /* 500 series and 800 series */ 98*4882a593Smuzhiyun+ if (rs6000_cpu == PROCESSOR_MPCCORE) 99*4882a593Smuzhiyun+ return "\"821\""; 100*4882a593Smuzhiyun+ 101*4882a593Smuzhiyun+ /* 600 series and 700 series, "classic" */ 102*4882a593Smuzhiyun+ if (rs6000_cpu == PROCESSOR_PPC601 || rs6000_cpu == PROCESSOR_PPC603 103*4882a593Smuzhiyun+ || rs6000_cpu == PROCESSOR_PPC604 || rs6000_cpu == PROCESSOR_PPC604e 104*4882a593Smuzhiyun+ || rs6000_cpu == PROCESSOR_PPC750 || rs6000_cpu == PROCESSOR_POWERPC) 105*4882a593Smuzhiyun+ return "ppc"; 106*4882a593Smuzhiyun+ 107*4882a593Smuzhiyun+ /* Classic with AltiVec, "G4" */ 108*4882a593Smuzhiyun+ if (rs6000_cpu == PROCESSOR_PPC7400 || rs6000_cpu == PROCESSOR_PPC7450) 109*4882a593Smuzhiyun+ return "\"7450\""; 110*4882a593Smuzhiyun+ 111*4882a593Smuzhiyun+ /* The older 64-bit CPUs */ 112*4882a593Smuzhiyun+ if (rs6000_cpu == PROCESSOR_PPC620 || rs6000_cpu == PROCESSOR_PPC630 113*4882a593Smuzhiyun+ || rs6000_cpu == PROCESSOR_RS64A || rs6000_cpu == PROCESSOR_POWERPC64) 114*4882a593Smuzhiyun+ return "ppc64"; 115*4882a593Smuzhiyun 116*4882a593Smuzhiyun HOST_WIDE_INT flags = rs6000_isa_flags; 117*4882a593Smuzhiyun 118*4882a593Smuzhiyun-- 119*4882a593Smuzhiyun2.34.3 120*4882a593Smuzhiyun 121