1Remove duplicated files to stop the linker from complaining about duplicate 2symbols 3 4Signed-off-by: Alexandre Belloni <abelloni@adeneo-embedded.com> 5--- 6--- a/csps/lpc32xx/bsps/fdi3250/startup/examples/s1l/sysapi_timer.c 2011-10-05 19:10:37.000000000 +0200 7+++ /dev/null 2012-01-01 16:39:47.918907000 +0100 8@@ -1,212 +0,0 @@ 9-/*********************************************************************** 10- * $Id:: sysapi_timer.c 3394 2010-05-06 17:56:27Z usb10132 $ 11- * 12- * Project: Time support functions 13- * 14- * Description: 15- * Implements the following functions required for the S1L API 16- * time_init 17- * time_reset 18- * time_start 19- * time_stop 20- * time_get 21- * time_get_rate 22- * 23- *********************************************************************** 24- * Software that is described herein is for illustrative purposes only 25- * which provides customers with programming information regarding the 26- * products. This software is supplied "AS IS" without any warranties. 27- * NXP Semiconductors assumes no responsibility or liability for the 28- * use of the software, conveys no license or title under any patent, 29- * copyright, or mask work right to the product. NXP Semiconductors 30- * reserves the right to make changes in the software without 31- * notification. NXP Semiconductors also make no representation or 32- * warranty that such application will be suitable for the specified 33- * use without further testing or modification. 34- **********************************************************************/ 35- 36-#include "s1l_sys_inf.h" 37-#include "lpc32xx_intc_driver.h" 38-#include "lpc32xx_timer_driver.h" 39- 40-static UNS_64 base_rate; 41-static INT_32 tdev = 0; 42- 43-/*********************************************************************** 44- * 45- * Function: time_init 46- * 47- * Purpose: Initializes time system 48- * 49- * Processing: Initializes the system timer. 50- * 51- * Parameters: None 52- * 53- * Outputs: None 54- * 55- * Returns: 0 if the init failed, otherwise non-zero 56- * 57- * Notes: None 58- * 59- **********************************************************************/ 60-INT_32 time_init(void) 61-{ 62- TMR_PSCALE_SETUP_T pscale; 63- 64- /* Open timer driver */ 65- if (tdev == 0) 66- { 67- tdev = timer_open((void *) TIMER_CNTR0, 0); 68- if (tdev != 0) 69- { 70- /* Use a prescale count to 100000 */ 71- pscale.ps_tick_val = 100000; 72- pscale.ps_us_val = 0; /* Not needed when ps_tick_val != 0 */ 73- timer_ioctl(tdev, TMR_SETUP_PSCALE, (INT_32) &pscale); 74- 75- /* Get timer clock rate */ 76- base_rate = (UNS_64) timer_ioctl(tdev, TMR_GET_STATUS, 77- TMR_GET_CLOCK); 78- } 79- } 80- 81- return tdev; 82-} 83- 84-/*********************************************************************** 85- * 86- * Function: time_reset 87- * 88- * Purpose: Resets system timer 89- * 90- * Processing: 91- * See function. 92- * 93- * Parameters: None 94- * 95- * Outputs: None 96- * 97- * Returns: Nothing 98- * 99- * Notes: None 100- * 101- **********************************************************************/ 102-void time_reset(void) 103-{ 104- if (tdev != 0) 105- { 106- timer_ioctl(tdev, TMR_RESET, 1); 107- } 108-} 109- 110-/*********************************************************************** 111- * 112- * Function: time_start 113- * 114- * Purpose: Starts system timer 115- * 116- * Processing: 117- * See function. 118- * 119- * Parameters: None 120- * 121- * Outputs: None 122- * 123- * Returns: Nothing 124- * 125- * Notes: None 126- * 127- **********************************************************************/ 128-void time_start(void) 129-{ 130- if (tdev != 0) 131- { 132- timer_ioctl(tdev, TMR_ENABLE, 1); 133- } 134-} 135- 136-/*********************************************************************** 137- * 138- * Function: time_stop 139- * 140- * Purpose: Stops system timer 141- * 142- * Processing: 143- * See function. 144- * 145- * Parameters: None 146- * 147- * Outputs: None 148- * 149- * Returns: Nothing 150- * 151- * Notes: None 152- * 153- **********************************************************************/ 154-void time_stop(void) 155-{ 156- if (tdev != 0) 157- { 158- timer_ioctl(tdev, TMR_ENABLE, 0); 159- } 160-} 161- 162-/*********************************************************************** 163- * 164- * Function: time_get 165- * 166- * Purpose: Returns current system time value 167- * 168- * Processing: 169- * See function. 170- * 171- * Parameters: None 172- * 173- * Outputs: None 174- * 175- * Returns: The number of ticks of the timer counter 176- * 177- * Notes: None 178- * 179- **********************************************************************/ 180-UNS_64 time_get(void) 181-{ 182- TMR_COUNTS_T tcounts; 183- UNS_64 ticks = 0; 184- 185- if (tdev != 0) 186- { 187- timer_ioctl(tdev, TMR_GET_COUNTS, (INT_32) &tcounts); 188- 189- /* Compute number of timer ticks */ 190- ticks = (UNS_64) tcounts.count_val * 100000; 191- ticks = ticks + (UNS_64) tcounts.ps_count_val; 192- } 193- 194- return ticks; 195-} 196- 197-/*********************************************************************** 198- * 199- * Function: time_get_rate 200- * 201- * Purpose: 202- * Returns base tick rate (ticks per second) of the time counter 203- * 204- * Processing: 205- * See function. 206- * 207- * Parameters: None 208- * 209- * Outputs: None 210- * 211- * Returns: The timer tick rate (in ticks per second) 212- * 213- * Notes: None 214- * 215- **********************************************************************/ 216-UNS_64 time_get_rate(void) 217-{ 218- return base_rate; 219-} 220- 221--- a/csps/lpc32xx/bsps/fdi3250/startup/examples/s1l/sys_mmu_cmd_group.c 2011-10-05 19:10:37.000000000 +0200 222+++ /dev/null 2012-01-01 16:39:47.918907000 +0100 223@@ -1,746 +0,0 @@ 224-/*********************************************************************** 225- * $Id:: sys_mmu_cmd_group.c 3430 2010-05-07 17:39:08Z usb10132 $ 226- * 227- * Project: Command processor for peek, poke, dump, and fill 228- * 229- * Description: 230- * Processes commands from the command prompt 231- * 232- *********************************************************************** 233- * Software that is described herein is for illustrative purposes only 234- * which provides customers with programming information regarding the 235- * products. This software is supplied "AS IS" without any warranties. 236- * NXP Semiconductors assumes no responsibility or liability for the 237- * use of the software, conveys no license or title under any patent, 238- * copyright, or mask work right to the product. NXP Semiconductors 239- * reserves the right to make changes in the software without 240- * notification. NXP Semiconductors also make no representation or 241- * warranty that such application will be suitable for the specified 242- * use without further testing or modification. 243- **********************************************************************/ 244- 245-#include "lpc_arm922t_cp15_driver.h" 246-#include "lpc_string.h" 247-#include "startup.h" 248-#include "s1l_cmds.h" 249-#include "s1l_sys_inf.h" 250- 251-/* dcache command */ 252-BOOL_32 cmd_dcache(void); 253-static UNS_32 cmd_dcache_plist[] = 254-{ 255- (PARSE_TYPE_STR), /* The "dcache" command */ 256- (PARSE_TYPE_DEC | PARSE_TYPE_END) 257-}; 258-static CMD_ROUTE_T core_dcache_cmd = 259-{ 260- (UNS_8 *) "dcache", 261- cmd_dcache, 262- (UNS_8 *) "Enables, disables, or flushes data cache", 263- (UNS_8 *) "dcache [0(disable), 1(enable), 2(flush)]", 264- cmd_dcache_plist, 265- NULL 266-}; 267- 268-/* icache command */ 269-BOOL_32 cmd_icache(void); 270-static UNS_32 cmd_icache_plist[] = 271-{ 272- (PARSE_TYPE_STR), /* The "icache" command */ 273- (PARSE_TYPE_DEC | PARSE_TYPE_END) 274-}; 275-static CMD_ROUTE_T core_icache_cmd = 276-{ 277- (UNS_8 *) "icache", 278- cmd_icache, 279- (UNS_8 *) "Enables or disables instruction cache", 280- (UNS_8 *) "icache [0(disable), 1(enable)]", 281- cmd_icache_plist, 282- NULL 283-}; 284- 285-/* inval command */ 286-BOOL_32 cmd_inval(void); 287-static UNS_32 cmd_inval_plist[] = 288-{ 289- (PARSE_TYPE_STR | PARSE_TYPE_END) /* The "inval" command */ 290-}; 291-static CMD_ROUTE_T core_inval_cmd = 292-{ 293- (UNS_8 *) "inval", 294- cmd_inval, 295- (UNS_8 *) "Flushes data cache and invalidates instruction cache", 296- (UNS_8 *) "inval", 297- cmd_inval_plist, 298- NULL 299-}; 300- 301-/* mmuenab command */ 302-BOOL_32 cmd_mmuenab(void); 303-static UNS_32 cmd_mmuenab_plist[] = 304-{ 305- (PARSE_TYPE_STR), /* The "mmuenab" command */ 306- (PARSE_TYPE_DEC | PARSE_TYPE_END) 307-}; 308-static CMD_ROUTE_T core_mmuenab_cmd = 309-{ 310- (UNS_8 *) "mmuenab", 311- cmd_mmuenab, 312- (UNS_8 *) "Enables or disables the MMU", 313- (UNS_8 *) "mmuenab [0(disable), 1(enable)]", 314- cmd_mmuenab_plist, 315- NULL 316-}; 317- 318-/* map command */ 319-BOOL_32 cmd_map(void); 320-static UNS_32 cmd_map_plist[] = 321-{ 322- (PARSE_TYPE_STR), /* The "map" command */ 323- (PARSE_TYPE_HEX), 324- (PARSE_TYPE_HEX), 325- (PARSE_TYPE_DEC), 326- (PARSE_TYPE_DEC | PARSE_TYPE_END), 327-}; 328-static CMD_ROUTE_T core_map_cmd = 329-{ 330- (UNS_8 *) "map", 331- cmd_map, 332- (UNS_8 *) "Maps a range of physical address sections to virtual addresses", 333- (UNS_8 *) "map [virt hex addr][phy hex addr][sections][0(uncached), 1(cached), 2(unmap)]", 334- cmd_map_plist, 335- NULL 336-}; 337- 338-/* mmuinfo command */ 339-static BOOL_32 cmd_mmuinfo(void); 340-static UNS_32 cmd_mmuinfo_plist[] = 341-{ 342- (PARSE_TYPE_STR | PARSE_TYPE_END) /* The "mmuinfo" command */ 343-}; 344-static CMD_ROUTE_T core_mmuinfo_cmd = 345-{ 346- (UNS_8 *) "mmuinfo", 347- cmd_mmuinfo, 348- (UNS_8 *) "Dumps page table and MMU info", 349- (UNS_8 *) "mmuinfo", 350- cmd_mmuinfo_plist, 351- NULL 352-}; 353- 354-/* MMU group */ 355-static GROUP_LIST_T mmu_group = 356-{ 357- (UNS_8 *) "mmu", /* mmu group */ 358- (UNS_8 *) "MMU command group", 359- NULL, 360- NULL 361-}; 362- 363-static UNS_8 enabled_msg [] =" enabled"; 364-static UNS_8 disabled_msg [] =" disabled"; 365-static UNS_8 dcache_msg[] = "Data cache"; 366-static UNS_8 icache_msg[] = "Instruction cache"; 367-static UNS_8 pagetab_msg[] = "Page table at address: "; 368-static UNS_8 slist_msg[] = "Type Virt Phy fl Size"; 369-static UNS_8 mmu_msg [] ="MMU"; 370-static UNS_8 cpage_msg[] = "Coarse page:"; 371-static UNS_8 fpage_msg[] = "Fine page :"; 372-static UNS_8 sect_msg[] = "Section :"; 373-static UNS_8 mbytes_msg[] = "M"; 374-static UNS_8 map1_err_msg[] = 375- "Error : section addresses must be aligned on a 32-bit boundary"; 376-static UNS_8 map2_err_msg[] = 377- "Error : Number of sections exceeds address range of device"; 378-static UNS_8 phya_msg[] = "Virtual address "; 379-static UNS_8 mapped_msg[] = " mapped to physical address "; 380-static UNS_8 unmapped_msg[] = " unmapped from physical address "; 381-static UNS_8 cached_msg[] = " (cached)"; 382-static UNS_8 inval_msg[] = " invalidated"; 383-static UNS_8 caches_msg [] ="Caches"; 384-static UNS_8 flushed_msg[] = " flushed"; 385- 386-/*********************************************************************** 387- * 388- * Function: show_section 389- * 390- * Purpose: Display section information 391- * 392- * Processing: 393- * See function. 394- * 395- * Parameters: 396- * mmu_reg : MMU settings for this section 397- * virt_addr : Starting virtual address for this section 398- * segs : Number of 1M segments for this section 399- * 400- * Outputs: None 401- * 402- * Returns: Nothing 403- * 404- * Notes: None 405- * 406- **********************************************************************/ 407-static void show_section(UNS_32 mmu_reg, 408- UNS_32 virt_addr, 409- UNS_32 segs) 410-{ 411- UNS_8 straddr [16]; 412- UNS_32 mmu_phy; 413- 414- if ((mmu_reg & ARM922T_L1D_TYPE_PG_SN_MASK) != 415- ARM922T_L1D_TYPE_FAULT) 416- { 417- if ((mmu_reg & ARM922T_L1D_TYPE_PG_SN_MASK) == 418- ARM922T_L1D_TYPE_CPAGE) 419- { 420- term_dat_out(cpage_msg); 421- } 422- else if ((mmu_reg & ARM922T_L1D_TYPE_PG_SN_MASK) == 423- ARM922T_L1D_TYPE_FPAGE) 424- { 425- term_dat_out(fpage_msg); 426- } 427- else 428- { 429- term_dat_out(sect_msg); 430- } 431- 432- /* Compute virtual address */ 433- str_makehex(straddr, virt_addr, 8); 434- term_dat_out(straddr); 435- term_dat_out((UNS_8 *) " "); 436- 437- /* Compute mapped physical address */ 438- if ((mmu_reg & ARM922T_L1D_TYPE_PG_SN_MASK) == 439- ARM922T_L1D_TYPE_SECTION) 440- { 441- mmu_phy = mmu_reg & 0xFFF00000; 442- } 443- else 444- { 445- /* Don't compute addresses for non-sections */ 446- mmu_phy = 0; 447- } 448- str_makehex(straddr, mmu_phy, 8); 449- term_dat_out(straddr); 450- term_dat_out((UNS_8 *) " "); 451- 452- /* MMU flags */ 453- if ((mmu_reg & ARM922T_L1D_BUFFERABLE) != 0) 454- { 455- term_dat_out((UNS_8 *) "b"); 456- } 457- else 458- { 459- term_dat_out((UNS_8 *) " "); 460- } 461- if ((mmu_reg & ARM922T_L1D_CACHEABLE) != 0) 462- { 463- term_dat_out((UNS_8 *) "c"); 464- } 465- else 466- { 467- term_dat_out((UNS_8 *) " "); 468- } 469- term_dat_out((UNS_8 *) " "); 470- 471- /* Displays used megabytes */ 472- str_makedec(straddr, segs); 473- term_dat_out(straddr); 474- term_dat_out_crlf(mbytes_msg); 475- } 476-} 477- 478-/*********************************************************************** 479- * 480- * Function: mmu_dumpinfo 481- * 482- * Purpose: Display MMU info 483- * 484- * Processing: 485- * Display the MMU information, including enable status, cache 486- * status, and page table. 487- * 488- * Parameters: None 489- * 490- * Outputs: None 491- * 492- * Returns: TRUE if the command was processed, otherwise FALSE 493- * 494- * Notes: None 495- * 496- **********************************************************************/ 497-static BOOL_32 mmu_dumpinfo(void) 498-{ 499- UNS_32 segsz, last_mmu_reg, mmu_vrt, mmu_reg, mmu_vrtsav = 0, *pt; 500- UNS_32 mlast_mmu_reg, mmmu_reg; 501- int idx; 502- UNS_8 hexaddr [16]; 503- 504- term_dat_out(mmu_msg); 505- if (cp15_mmu_enabled() == FALSE) 506- { 507- term_dat_out_crlf(disabled_msg); 508- } 509- else 510- { 511- term_dat_out_crlf(enabled_msg); 512- 513- /* Get MMU control register word */ 514- mmu_reg = cp15_get_mmu_control_reg(); 515- 516- /* Instruction cache status */ 517- term_dat_out(icache_msg); 518- if ((mmu_reg & ARM922T_MMU_CONTROL_I) == 0) 519- { 520- term_dat_out_crlf(disabled_msg); 521- } 522- else 523- { 524- term_dat_out_crlf(enabled_msg); 525- } 526- 527- /* Data cache status */ 528- term_dat_out(dcache_msg); 529- if ((mmu_reg & ARM922T_MMU_CONTROL_C) == 0) 530- { 531- term_dat_out_crlf(disabled_msg); 532- } 533- else 534- { 535- term_dat_out_crlf(enabled_msg); 536- } 537- 538- term_dat_out(pagetab_msg); 539- mmu_reg = (UNS_32) cp15_get_ttb(); 540- str_makehex(hexaddr, mmu_reg, 8); 541- term_dat_out_crlf(hexaddr); 542- term_dat_out_crlf(slist_msg); 543- 544- /* Process MMU table - assume that the physical and 545- virtual locations of table are the same */ 546- pt = (UNS_32 *) mmu_reg; 547- mmu_vrt = 0x0; 548- segsz = 0xFFFFFFFF; 549- last_mmu_reg = mlast_mmu_reg = 0xFFFFFFFF; 550- for (idx = 0; idx < 4096; idx++) 551- { 552- mmu_reg = *pt; 553- mmmu_reg = (mmu_reg & (ARM922T_L1D_TYPE_PG_SN_MASK | 554- ARM922T_L1D_BUFFERABLE | ARM922T_L1D_CACHEABLE)); 555- segsz = segsz + 1; 556- 557- if ((last_mmu_reg != 0xFFFFFFFF) && 558- (mlast_mmu_reg != mmmu_reg)) 559- { 560- show_section(last_mmu_reg, mmu_vrtsav, segsz); 561- segsz = 0; 562- } 563- 564- if (mlast_mmu_reg != mmmu_reg) 565- { 566- mmu_vrtsav = mmu_vrt; 567- last_mmu_reg = mmu_reg; 568- mlast_mmu_reg = mmmu_reg; 569- } 570- 571- pt++; 572- mmu_vrt += 0x00100000; 573- } 574- } 575- 576- return TRUE; 577-} 578- 579-/*********************************************************************** 580- * 581- * Function: mmu_dumpmap 582- * 583- * Purpose: Map a virtual address range to a physical range 584- * 585- * Processing: 586- * From the input addresses and number of sections, generate the 587- * appropriate entries in the page table. 588- * 589- * Parameters: None 590- * 591- * Outputs: None 592- * 593- * Returns: TRUE if the command was processed, otherwise FALSE 594- * 595- * Notes: None 596- * 597- **********************************************************************/ 598-static BOOL_32 mmu_dumpmap(UNS_32 vrt, 599- UNS_32 phy, 600- UNS_32 sections, 601- UNS_32 cache) 602-{ 603- BOOL_32 processed = FALSE; 604- UNS_32 mmu_phy, mmu_vrt, tmp1 = 0, tmp2, *pt; 605- UNS_8 hexaddr [16]; 606- 607- /* Verify address boundaries are sectional */ 608- mmu_vrt = vrt & ~ARM922T_L2D_SN_BASE_MASK; 609- mmu_phy = phy & ~ARM922T_L2D_SN_BASE_MASK; 610- if ((mmu_vrt != 0) || (mmu_phy != 0)) 611- { 612- term_dat_out_crlf(map1_err_msg); 613- } 614- else 615- { 616- /* Verify that address range and section count will not 617- exceed address range of device */ 618- tmp1 = vrt >> 20; 619- tmp1 = (tmp1 + sections) - 1; 620- tmp2 = phy >> 20; 621- tmp2 = (tmp2 + sections) - 1; 622- if ((tmp1 < 4096) && (tmp2 < 4096)) 623- { 624- /* Good address range and good section count */ 625- processed = TRUE; 626- } 627- else 628- { 629- term_dat_out_crlf(map2_err_msg); 630- } 631- } 632- 633- /* Generate static part of MMU word */ 634- if (cache == 0) 635- { 636- /* Section mapped with cache disabled */ 637- tmp1 = ARM922T_L1D_TYPE_SECTION; 638- } 639- else if (cache == 1) 640- { 641- /* Section mapped with cache enabled */ 642- tmp1 = (ARM922T_L1D_BUFFERABLE | ARM922T_L1D_CACHEABLE | 643- ARM922T_L1D_TYPE_SECTION); 644- } 645- else if (cache == 2) 646- { 647- /* Section unmapped */ 648- tmp1 = ARM922T_L1D_TYPE_FAULT; 649- } 650- tmp1 |= ARM922T_L1D_AP_ALL; 651- 652- /* Offset into page table for virtual address */ 653- tmp2 = (vrt >> 20); 654- pt = cp15_get_ttb() + tmp2; 655- 656- /* Loop until all sections are complete */ 657- while ((sections > 0) && (processed == TRUE)) 658- { 659- /* Add in physical address */ 660- tmp2 = tmp1 | (phy & ARM922T_L2D_SN_BASE_MASK); 661- 662- /* Save new section descriptor for virtual address */ 663- *pt = tmp2; 664- 665- /* Output message shown the map */ 666- term_dat_out(phya_msg); 667- str_makehex(hexaddr, phy, 8); 668- term_dat_out(hexaddr); 669- if (cache == 2) 670- { 671- term_dat_out(unmapped_msg); 672- } 673- else 674- { 675- term_dat_out(mapped_msg); 676- } 677- str_makehex(hexaddr, vrt, 8); 678- term_dat_out(hexaddr); 679- if (cache == 1) 680- { 681- term_dat_out(cached_msg); 682- } 683- term_dat_out_crlf((UNS_8 *) ""); 684- 685- /* Next section and page table entry*/ 686- phy += 0x00100000; 687- vrt += 0x00100000; 688- pt++; 689- sections--; 690- } 691- 692- return processed; 693-} 694- 695-/*********************************************************************** 696- * 697- * Function: cmd_mmuinfo 698- * 699- * Purpose: Display MMU information 700- * 701- * Processing: 702- * See function. 703- * 704- * Parameters: None 705- * 706- * Outputs: None 707- * 708- * Returns: TRUE if the command was processed, otherwise FALSE 709- * 710- * Notes: None 711- * 712- **********************************************************************/ 713-static BOOL_32 cmd_mmuinfo(void) 714-{ 715- mmu_dumpinfo(); 716- 717- return TRUE; 718-} 719- 720-/*********************************************************************** 721- * 722- * Function: cmd_map 723- * 724- * Purpose: Map a physical address region to a virtual region 725- * 726- * Processing: 727- * See function. 728- * 729- * Parameters: None 730- * 731- * Outputs: None 732- * 733- * Returns: TRUE if the command was processed, otherwise FALSE 734- * 735- * Notes: None 736- * 737- **********************************************************************/ 738-BOOL_32 cmd_map(void) 739-{ 740- UNS_32 phy, virt, sects, ce = 0; 741- 742- /* Get arguments */ 743- virt = cmd_get_field_val(1); 744- phy = cmd_get_field_val(2); 745- sects = cmd_get_field_val(3); 746- ce = cmd_get_field_val(4); 747- 748- if (ce <= 2) 749- { 750- mmu_dumpmap(virt, phy, sects, ce); 751- } 752- 753- return TRUE; 754-} 755- 756-/*********************************************************************** 757- * 758- * Function: cmd_inval 759- * 760- * Purpose: MMU cache flush and invalidate 761- * 762- * Processing: 763- * See function. 764- * 765- * Parameters: None 766- * 767- * Outputs: None 768- * 769- * Returns: TRUE if the command was processed, otherwise FALSE 770- * 771- * Notes: None 772- * 773- **********************************************************************/ 774-BOOL_32 cmd_inval(void) 775-{ 776- dcache_flush(); 777- icache_inval(); 778- term_dat_out(caches_msg); 779- term_dat_out(inval_msg); 780- 781- return TRUE; 782-} 783- 784-/*********************************************************************** 785- * 786- * Function: cmd_dcache 787- * 788- * Purpose: MMU data cache enable and disable 789- * 790- * Processing: 791- * If the value passed in the parser is 1, enable the data cache, 792- * otherwise disable the data cache. 793- * 794- * Parameters: None 795- * 796- * Outputs: None 797- * 798- * Returns: TRUE if the command was processed, otherwise FALSE 799- * 800- * Notes: None 801- * 802- **********************************************************************/ 803-BOOL_32 cmd_dcache(void) 804-{ 805- UNS_32 cenable; 806- UNS_8 *ppar; 807- 808- /* Get argument */ 809- cenable = cmd_get_field_val(1); 810- 811- switch (cenable) 812- { 813- case 0: 814- dcache_flush(); 815- cp15_set_dcache(0); 816- ppar = disabled_msg; 817- break; 818- 819- case 1: 820- cp15_invalidate_cache(); 821- cp15_set_dcache(1); 822- ppar = enabled_msg; 823- break; 824- 825- case 2: 826- default: 827- dcache_flush(); 828- ppar = flushed_msg; 829- break; 830- } 831- 832- term_dat_out(dcache_msg); 833- term_dat_out_crlf(ppar); 834- 835- return TRUE; 836-} 837- 838-/*********************************************************************** 839- * 840- * Function: cmd_icache 841- * 842- * Purpose: MMU instruction cache enable and disable 843- * 844- * Processing: 845- * If the value passed in the parser is 1, enable the instruction 846- * cache, otherwise disable the instruction cache. 847- * 848- * Parameters: None 849- * 850- * Outputs: None 851- * 852- * Returns: TRUE if the command was processed, otherwise FALSE 853- * 854- * Notes: None 855- * 856- **********************************************************************/ 857-BOOL_32 cmd_icache(void) 858-{ 859- UNS_32 cenable; 860- UNS_8 *ppar; 861- 862- /* Get argument */ 863- cenable = cmd_get_field_val(1); 864- 865- if (cenable == 1) 866- { 867- dcache_flush(); 868- cp15_invalidate_cache(); 869- cp15_set_icache(1); 870- ppar = enabled_msg; 871- } 872- else 873- { 874- cp15_set_icache(0); 875- ppar = disabled_msg; 876- } 877- 878- term_dat_out(icache_msg); 879- term_dat_out_crlf(ppar); 880- 881- return TRUE; 882-} 883- 884- 885-/*********************************************************************** 886- * 887- * Function: cmd_mmuenab 888- * 889- * Purpose: Enable or disable MMU 890- * 891- * Processing: 892- * See function. 893- * 894- * Parameters: None 895- * 896- * Outputs: None 897- * 898- * Returns: TRUE if the command was processed, otherwise FALSE 899- * 900- * Notes: None 901- * 902- **********************************************************************/ 903-BOOL_32 cmd_mmuenab(void) 904-{ 905- UNS_8 *ppar; 906- UNS_32 cenable; 907- 908- term_dat_out_crlf((UNS_8 *) "Warning: Changing MMU status on " 909- " cached and buffered code can cause system crashes."); 910- 911- /* Get argument */ 912- cenable = cmd_get_field_val(1); 913- 914- if (cenable == 1) 915- { 916- if ((cp15_get_mmu_control_reg() & ARM922T_MMU_CONTROL_C) != 0) 917- { 918- cp15_invalidate_cache(); 919- } 920- 921- cp15_set_mmu(1); 922- ppar = enabled_msg; 923- } 924- else 925- { 926- cp15_dcache_flush(); 927- cp15_write_buffer_flush(); 928- cp15_invalidate_cache(); 929- cp15_set_mmu(0); 930- ppar = disabled_msg; 931- } 932- 933- term_dat_out(mmu_msg); 934- term_dat_out_crlf(ppar); 935- 936- return TRUE; 937-} 938- 939-/*********************************************************************** 940- * 941- * Function: mmu_cmd_group_init 942- * 943- * Purpose: Initialize MMU command group 944- * 945- * Processing: 946- * See function. 947- * 948- * Parameters: None 949- * 950- * Outputs: None 951- * 952- * Returns: Nothin 953- * 954- * Notes: None 955- * 956- **********************************************************************/ 957-void mmu_cmd_group_init(void) 958-{ 959- /* Add MMU group */ 960- cmd_add_group(&mmu_group); 961- 962- /* Add commands to the MMU group */ 963- cmd_add_new_command(&mmu_group, &core_dcache_cmd); 964- cmd_add_new_command(&mmu_group, &core_icache_cmd); 965- cmd_add_new_command(&mmu_group, &core_inval_cmd); 966- cmd_add_new_command(&mmu_group, &core_mmuenab_cmd); 967- cmd_add_new_command(&mmu_group, &core_map_cmd); 968- cmd_add_new_command(&mmu_group, &core_mmuinfo_cmd); 969-} 970