1*4882a593SmuzhiyunRemove duplicated files to stop the linker from complaining about duplicate 2*4882a593Smuzhiyunsymbols 3*4882a593Smuzhiyun 4*4882a593SmuzhiyunSigned-off-by: Alexandre Belloni <abelloni@adeneo-embedded.com> 5*4882a593Smuzhiyun--- 6*4882a593Smuzhiyun--- a/csps/lpc32xx/bsps/fdi3250/startup/examples/s1l/sysapi_timer.c 2011-10-05 19:10:37.000000000 +0200 7*4882a593Smuzhiyun+++ /dev/null 2012-01-01 16:39:47.918907000 +0100 8*4882a593Smuzhiyun@@ -1,212 +0,0 @@ 9*4882a593Smuzhiyun-/*********************************************************************** 10*4882a593Smuzhiyun- * $Id:: sysapi_timer.c 3394 2010-05-06 17:56:27Z usb10132 $ 11*4882a593Smuzhiyun- * 12*4882a593Smuzhiyun- * Project: Time support functions 13*4882a593Smuzhiyun- * 14*4882a593Smuzhiyun- * Description: 15*4882a593Smuzhiyun- * Implements the following functions required for the S1L API 16*4882a593Smuzhiyun- * time_init 17*4882a593Smuzhiyun- * time_reset 18*4882a593Smuzhiyun- * time_start 19*4882a593Smuzhiyun- * time_stop 20*4882a593Smuzhiyun- * time_get 21*4882a593Smuzhiyun- * time_get_rate 22*4882a593Smuzhiyun- * 23*4882a593Smuzhiyun- *********************************************************************** 24*4882a593Smuzhiyun- * Software that is described herein is for illustrative purposes only 25*4882a593Smuzhiyun- * which provides customers with programming information regarding the 26*4882a593Smuzhiyun- * products. This software is supplied "AS IS" without any warranties. 27*4882a593Smuzhiyun- * NXP Semiconductors assumes no responsibility or liability for the 28*4882a593Smuzhiyun- * use of the software, conveys no license or title under any patent, 29*4882a593Smuzhiyun- * copyright, or mask work right to the product. NXP Semiconductors 30*4882a593Smuzhiyun- * reserves the right to make changes in the software without 31*4882a593Smuzhiyun- * notification. NXP Semiconductors also make no representation or 32*4882a593Smuzhiyun- * warranty that such application will be suitable for the specified 33*4882a593Smuzhiyun- * use without further testing or modification. 34*4882a593Smuzhiyun- **********************************************************************/ 35*4882a593Smuzhiyun- 36*4882a593Smuzhiyun-#include "s1l_sys_inf.h" 37*4882a593Smuzhiyun-#include "lpc32xx_intc_driver.h" 38*4882a593Smuzhiyun-#include "lpc32xx_timer_driver.h" 39*4882a593Smuzhiyun- 40*4882a593Smuzhiyun-static UNS_64 base_rate; 41*4882a593Smuzhiyun-static INT_32 tdev = 0; 42*4882a593Smuzhiyun- 43*4882a593Smuzhiyun-/*********************************************************************** 44*4882a593Smuzhiyun- * 45*4882a593Smuzhiyun- * Function: time_init 46*4882a593Smuzhiyun- * 47*4882a593Smuzhiyun- * Purpose: Initializes time system 48*4882a593Smuzhiyun- * 49*4882a593Smuzhiyun- * Processing: Initializes the system timer. 50*4882a593Smuzhiyun- * 51*4882a593Smuzhiyun- * Parameters: None 52*4882a593Smuzhiyun- * 53*4882a593Smuzhiyun- * Outputs: None 54*4882a593Smuzhiyun- * 55*4882a593Smuzhiyun- * Returns: 0 if the init failed, otherwise non-zero 56*4882a593Smuzhiyun- * 57*4882a593Smuzhiyun- * Notes: None 58*4882a593Smuzhiyun- * 59*4882a593Smuzhiyun- **********************************************************************/ 60*4882a593Smuzhiyun-INT_32 time_init(void) 61*4882a593Smuzhiyun-{ 62*4882a593Smuzhiyun- TMR_PSCALE_SETUP_T pscale; 63*4882a593Smuzhiyun- 64*4882a593Smuzhiyun- /* Open timer driver */ 65*4882a593Smuzhiyun- if (tdev == 0) 66*4882a593Smuzhiyun- { 67*4882a593Smuzhiyun- tdev = timer_open((void *) TIMER_CNTR0, 0); 68*4882a593Smuzhiyun- if (tdev != 0) 69*4882a593Smuzhiyun- { 70*4882a593Smuzhiyun- /* Use a prescale count to 100000 */ 71*4882a593Smuzhiyun- pscale.ps_tick_val = 100000; 72*4882a593Smuzhiyun- pscale.ps_us_val = 0; /* Not needed when ps_tick_val != 0 */ 73*4882a593Smuzhiyun- timer_ioctl(tdev, TMR_SETUP_PSCALE, (INT_32) &pscale); 74*4882a593Smuzhiyun- 75*4882a593Smuzhiyun- /* Get timer clock rate */ 76*4882a593Smuzhiyun- base_rate = (UNS_64) timer_ioctl(tdev, TMR_GET_STATUS, 77*4882a593Smuzhiyun- TMR_GET_CLOCK); 78*4882a593Smuzhiyun- } 79*4882a593Smuzhiyun- } 80*4882a593Smuzhiyun- 81*4882a593Smuzhiyun- return tdev; 82*4882a593Smuzhiyun-} 83*4882a593Smuzhiyun- 84*4882a593Smuzhiyun-/*********************************************************************** 85*4882a593Smuzhiyun- * 86*4882a593Smuzhiyun- * Function: time_reset 87*4882a593Smuzhiyun- * 88*4882a593Smuzhiyun- * Purpose: Resets system timer 89*4882a593Smuzhiyun- * 90*4882a593Smuzhiyun- * Processing: 91*4882a593Smuzhiyun- * See function. 92*4882a593Smuzhiyun- * 93*4882a593Smuzhiyun- * Parameters: None 94*4882a593Smuzhiyun- * 95*4882a593Smuzhiyun- * Outputs: None 96*4882a593Smuzhiyun- * 97*4882a593Smuzhiyun- * Returns: Nothing 98*4882a593Smuzhiyun- * 99*4882a593Smuzhiyun- * Notes: None 100*4882a593Smuzhiyun- * 101*4882a593Smuzhiyun- **********************************************************************/ 102*4882a593Smuzhiyun-void time_reset(void) 103*4882a593Smuzhiyun-{ 104*4882a593Smuzhiyun- if (tdev != 0) 105*4882a593Smuzhiyun- { 106*4882a593Smuzhiyun- timer_ioctl(tdev, TMR_RESET, 1); 107*4882a593Smuzhiyun- } 108*4882a593Smuzhiyun-} 109*4882a593Smuzhiyun- 110*4882a593Smuzhiyun-/*********************************************************************** 111*4882a593Smuzhiyun- * 112*4882a593Smuzhiyun- * Function: time_start 113*4882a593Smuzhiyun- * 114*4882a593Smuzhiyun- * Purpose: Starts system timer 115*4882a593Smuzhiyun- * 116*4882a593Smuzhiyun- * Processing: 117*4882a593Smuzhiyun- * See function. 118*4882a593Smuzhiyun- * 119*4882a593Smuzhiyun- * Parameters: None 120*4882a593Smuzhiyun- * 121*4882a593Smuzhiyun- * Outputs: None 122*4882a593Smuzhiyun- * 123*4882a593Smuzhiyun- * Returns: Nothing 124*4882a593Smuzhiyun- * 125*4882a593Smuzhiyun- * Notes: None 126*4882a593Smuzhiyun- * 127*4882a593Smuzhiyun- **********************************************************************/ 128*4882a593Smuzhiyun-void time_start(void) 129*4882a593Smuzhiyun-{ 130*4882a593Smuzhiyun- if (tdev != 0) 131*4882a593Smuzhiyun- { 132*4882a593Smuzhiyun- timer_ioctl(tdev, TMR_ENABLE, 1); 133*4882a593Smuzhiyun- } 134*4882a593Smuzhiyun-} 135*4882a593Smuzhiyun- 136*4882a593Smuzhiyun-/*********************************************************************** 137*4882a593Smuzhiyun- * 138*4882a593Smuzhiyun- * Function: time_stop 139*4882a593Smuzhiyun- * 140*4882a593Smuzhiyun- * Purpose: Stops system timer 141*4882a593Smuzhiyun- * 142*4882a593Smuzhiyun- * Processing: 143*4882a593Smuzhiyun- * See function. 144*4882a593Smuzhiyun- * 145*4882a593Smuzhiyun- * Parameters: None 146*4882a593Smuzhiyun- * 147*4882a593Smuzhiyun- * Outputs: None 148*4882a593Smuzhiyun- * 149*4882a593Smuzhiyun- * Returns: Nothing 150*4882a593Smuzhiyun- * 151*4882a593Smuzhiyun- * Notes: None 152*4882a593Smuzhiyun- * 153*4882a593Smuzhiyun- **********************************************************************/ 154*4882a593Smuzhiyun-void time_stop(void) 155*4882a593Smuzhiyun-{ 156*4882a593Smuzhiyun- if (tdev != 0) 157*4882a593Smuzhiyun- { 158*4882a593Smuzhiyun- timer_ioctl(tdev, TMR_ENABLE, 0); 159*4882a593Smuzhiyun- } 160*4882a593Smuzhiyun-} 161*4882a593Smuzhiyun- 162*4882a593Smuzhiyun-/*********************************************************************** 163*4882a593Smuzhiyun- * 164*4882a593Smuzhiyun- * Function: time_get 165*4882a593Smuzhiyun- * 166*4882a593Smuzhiyun- * Purpose: Returns current system time value 167*4882a593Smuzhiyun- * 168*4882a593Smuzhiyun- * Processing: 169*4882a593Smuzhiyun- * See function. 170*4882a593Smuzhiyun- * 171*4882a593Smuzhiyun- * Parameters: None 172*4882a593Smuzhiyun- * 173*4882a593Smuzhiyun- * Outputs: None 174*4882a593Smuzhiyun- * 175*4882a593Smuzhiyun- * Returns: The number of ticks of the timer counter 176*4882a593Smuzhiyun- * 177*4882a593Smuzhiyun- * Notes: None 178*4882a593Smuzhiyun- * 179*4882a593Smuzhiyun- **********************************************************************/ 180*4882a593Smuzhiyun-UNS_64 time_get(void) 181*4882a593Smuzhiyun-{ 182*4882a593Smuzhiyun- TMR_COUNTS_T tcounts; 183*4882a593Smuzhiyun- UNS_64 ticks = 0; 184*4882a593Smuzhiyun- 185*4882a593Smuzhiyun- if (tdev != 0) 186*4882a593Smuzhiyun- { 187*4882a593Smuzhiyun- timer_ioctl(tdev, TMR_GET_COUNTS, (INT_32) &tcounts); 188*4882a593Smuzhiyun- 189*4882a593Smuzhiyun- /* Compute number of timer ticks */ 190*4882a593Smuzhiyun- ticks = (UNS_64) tcounts.count_val * 100000; 191*4882a593Smuzhiyun- ticks = ticks + (UNS_64) tcounts.ps_count_val; 192*4882a593Smuzhiyun- } 193*4882a593Smuzhiyun- 194*4882a593Smuzhiyun- return ticks; 195*4882a593Smuzhiyun-} 196*4882a593Smuzhiyun- 197*4882a593Smuzhiyun-/*********************************************************************** 198*4882a593Smuzhiyun- * 199*4882a593Smuzhiyun- * Function: time_get_rate 200*4882a593Smuzhiyun- * 201*4882a593Smuzhiyun- * Purpose: 202*4882a593Smuzhiyun- * Returns base tick rate (ticks per second) of the time counter 203*4882a593Smuzhiyun- * 204*4882a593Smuzhiyun- * Processing: 205*4882a593Smuzhiyun- * See function. 206*4882a593Smuzhiyun- * 207*4882a593Smuzhiyun- * Parameters: None 208*4882a593Smuzhiyun- * 209*4882a593Smuzhiyun- * Outputs: None 210*4882a593Smuzhiyun- * 211*4882a593Smuzhiyun- * Returns: The timer tick rate (in ticks per second) 212*4882a593Smuzhiyun- * 213*4882a593Smuzhiyun- * Notes: None 214*4882a593Smuzhiyun- * 215*4882a593Smuzhiyun- **********************************************************************/ 216*4882a593Smuzhiyun-UNS_64 time_get_rate(void) 217*4882a593Smuzhiyun-{ 218*4882a593Smuzhiyun- return base_rate; 219*4882a593Smuzhiyun-} 220*4882a593Smuzhiyun- 221*4882a593Smuzhiyun--- a/csps/lpc32xx/bsps/fdi3250/startup/examples/s1l/sys_mmu_cmd_group.c 2011-10-05 19:10:37.000000000 +0200 222*4882a593Smuzhiyun+++ /dev/null 2012-01-01 16:39:47.918907000 +0100 223*4882a593Smuzhiyun@@ -1,746 +0,0 @@ 224*4882a593Smuzhiyun-/*********************************************************************** 225*4882a593Smuzhiyun- * $Id:: sys_mmu_cmd_group.c 3430 2010-05-07 17:39:08Z usb10132 $ 226*4882a593Smuzhiyun- * 227*4882a593Smuzhiyun- * Project: Command processor for peek, poke, dump, and fill 228*4882a593Smuzhiyun- * 229*4882a593Smuzhiyun- * Description: 230*4882a593Smuzhiyun- * Processes commands from the command prompt 231*4882a593Smuzhiyun- * 232*4882a593Smuzhiyun- *********************************************************************** 233*4882a593Smuzhiyun- * Software that is described herein is for illustrative purposes only 234*4882a593Smuzhiyun- * which provides customers with programming information regarding the 235*4882a593Smuzhiyun- * products. This software is supplied "AS IS" without any warranties. 236*4882a593Smuzhiyun- * NXP Semiconductors assumes no responsibility or liability for the 237*4882a593Smuzhiyun- * use of the software, conveys no license or title under any patent, 238*4882a593Smuzhiyun- * copyright, or mask work right to the product. NXP Semiconductors 239*4882a593Smuzhiyun- * reserves the right to make changes in the software without 240*4882a593Smuzhiyun- * notification. NXP Semiconductors also make no representation or 241*4882a593Smuzhiyun- * warranty that such application will be suitable for the specified 242*4882a593Smuzhiyun- * use without further testing or modification. 243*4882a593Smuzhiyun- **********************************************************************/ 244*4882a593Smuzhiyun- 245*4882a593Smuzhiyun-#include "lpc_arm922t_cp15_driver.h" 246*4882a593Smuzhiyun-#include "lpc_string.h" 247*4882a593Smuzhiyun-#include "startup.h" 248*4882a593Smuzhiyun-#include "s1l_cmds.h" 249*4882a593Smuzhiyun-#include "s1l_sys_inf.h" 250*4882a593Smuzhiyun- 251*4882a593Smuzhiyun-/* dcache command */ 252*4882a593Smuzhiyun-BOOL_32 cmd_dcache(void); 253*4882a593Smuzhiyun-static UNS_32 cmd_dcache_plist[] = 254*4882a593Smuzhiyun-{ 255*4882a593Smuzhiyun- (PARSE_TYPE_STR), /* The "dcache" command */ 256*4882a593Smuzhiyun- (PARSE_TYPE_DEC | PARSE_TYPE_END) 257*4882a593Smuzhiyun-}; 258*4882a593Smuzhiyun-static CMD_ROUTE_T core_dcache_cmd = 259*4882a593Smuzhiyun-{ 260*4882a593Smuzhiyun- (UNS_8 *) "dcache", 261*4882a593Smuzhiyun- cmd_dcache, 262*4882a593Smuzhiyun- (UNS_8 *) "Enables, disables, or flushes data cache", 263*4882a593Smuzhiyun- (UNS_8 *) "dcache [0(disable), 1(enable), 2(flush)]", 264*4882a593Smuzhiyun- cmd_dcache_plist, 265*4882a593Smuzhiyun- NULL 266*4882a593Smuzhiyun-}; 267*4882a593Smuzhiyun- 268*4882a593Smuzhiyun-/* icache command */ 269*4882a593Smuzhiyun-BOOL_32 cmd_icache(void); 270*4882a593Smuzhiyun-static UNS_32 cmd_icache_plist[] = 271*4882a593Smuzhiyun-{ 272*4882a593Smuzhiyun- (PARSE_TYPE_STR), /* The "icache" command */ 273*4882a593Smuzhiyun- (PARSE_TYPE_DEC | PARSE_TYPE_END) 274*4882a593Smuzhiyun-}; 275*4882a593Smuzhiyun-static CMD_ROUTE_T core_icache_cmd = 276*4882a593Smuzhiyun-{ 277*4882a593Smuzhiyun- (UNS_8 *) "icache", 278*4882a593Smuzhiyun- cmd_icache, 279*4882a593Smuzhiyun- (UNS_8 *) "Enables or disables instruction cache", 280*4882a593Smuzhiyun- (UNS_8 *) "icache [0(disable), 1(enable)]", 281*4882a593Smuzhiyun- cmd_icache_plist, 282*4882a593Smuzhiyun- NULL 283*4882a593Smuzhiyun-}; 284*4882a593Smuzhiyun- 285*4882a593Smuzhiyun-/* inval command */ 286*4882a593Smuzhiyun-BOOL_32 cmd_inval(void); 287*4882a593Smuzhiyun-static UNS_32 cmd_inval_plist[] = 288*4882a593Smuzhiyun-{ 289*4882a593Smuzhiyun- (PARSE_TYPE_STR | PARSE_TYPE_END) /* The "inval" command */ 290*4882a593Smuzhiyun-}; 291*4882a593Smuzhiyun-static CMD_ROUTE_T core_inval_cmd = 292*4882a593Smuzhiyun-{ 293*4882a593Smuzhiyun- (UNS_8 *) "inval", 294*4882a593Smuzhiyun- cmd_inval, 295*4882a593Smuzhiyun- (UNS_8 *) "Flushes data cache and invalidates instruction cache", 296*4882a593Smuzhiyun- (UNS_8 *) "inval", 297*4882a593Smuzhiyun- cmd_inval_plist, 298*4882a593Smuzhiyun- NULL 299*4882a593Smuzhiyun-}; 300*4882a593Smuzhiyun- 301*4882a593Smuzhiyun-/* mmuenab command */ 302*4882a593Smuzhiyun-BOOL_32 cmd_mmuenab(void); 303*4882a593Smuzhiyun-static UNS_32 cmd_mmuenab_plist[] = 304*4882a593Smuzhiyun-{ 305*4882a593Smuzhiyun- (PARSE_TYPE_STR), /* The "mmuenab" command */ 306*4882a593Smuzhiyun- (PARSE_TYPE_DEC | PARSE_TYPE_END) 307*4882a593Smuzhiyun-}; 308*4882a593Smuzhiyun-static CMD_ROUTE_T core_mmuenab_cmd = 309*4882a593Smuzhiyun-{ 310*4882a593Smuzhiyun- (UNS_8 *) "mmuenab", 311*4882a593Smuzhiyun- cmd_mmuenab, 312*4882a593Smuzhiyun- (UNS_8 *) "Enables or disables the MMU", 313*4882a593Smuzhiyun- (UNS_8 *) "mmuenab [0(disable), 1(enable)]", 314*4882a593Smuzhiyun- cmd_mmuenab_plist, 315*4882a593Smuzhiyun- NULL 316*4882a593Smuzhiyun-}; 317*4882a593Smuzhiyun- 318*4882a593Smuzhiyun-/* map command */ 319*4882a593Smuzhiyun-BOOL_32 cmd_map(void); 320*4882a593Smuzhiyun-static UNS_32 cmd_map_plist[] = 321*4882a593Smuzhiyun-{ 322*4882a593Smuzhiyun- (PARSE_TYPE_STR), /* The "map" command */ 323*4882a593Smuzhiyun- (PARSE_TYPE_HEX), 324*4882a593Smuzhiyun- (PARSE_TYPE_HEX), 325*4882a593Smuzhiyun- (PARSE_TYPE_DEC), 326*4882a593Smuzhiyun- (PARSE_TYPE_DEC | PARSE_TYPE_END), 327*4882a593Smuzhiyun-}; 328*4882a593Smuzhiyun-static CMD_ROUTE_T core_map_cmd = 329*4882a593Smuzhiyun-{ 330*4882a593Smuzhiyun- (UNS_8 *) "map", 331*4882a593Smuzhiyun- cmd_map, 332*4882a593Smuzhiyun- (UNS_8 *) "Maps a range of physical address sections to virtual addresses", 333*4882a593Smuzhiyun- (UNS_8 *) "map [virt hex addr][phy hex addr][sections][0(uncached), 1(cached), 2(unmap)]", 334*4882a593Smuzhiyun- cmd_map_plist, 335*4882a593Smuzhiyun- NULL 336*4882a593Smuzhiyun-}; 337*4882a593Smuzhiyun- 338*4882a593Smuzhiyun-/* mmuinfo command */ 339*4882a593Smuzhiyun-static BOOL_32 cmd_mmuinfo(void); 340*4882a593Smuzhiyun-static UNS_32 cmd_mmuinfo_plist[] = 341*4882a593Smuzhiyun-{ 342*4882a593Smuzhiyun- (PARSE_TYPE_STR | PARSE_TYPE_END) /* The "mmuinfo" command */ 343*4882a593Smuzhiyun-}; 344*4882a593Smuzhiyun-static CMD_ROUTE_T core_mmuinfo_cmd = 345*4882a593Smuzhiyun-{ 346*4882a593Smuzhiyun- (UNS_8 *) "mmuinfo", 347*4882a593Smuzhiyun- cmd_mmuinfo, 348*4882a593Smuzhiyun- (UNS_8 *) "Dumps page table and MMU info", 349*4882a593Smuzhiyun- (UNS_8 *) "mmuinfo", 350*4882a593Smuzhiyun- cmd_mmuinfo_plist, 351*4882a593Smuzhiyun- NULL 352*4882a593Smuzhiyun-}; 353*4882a593Smuzhiyun- 354*4882a593Smuzhiyun-/* MMU group */ 355*4882a593Smuzhiyun-static GROUP_LIST_T mmu_group = 356*4882a593Smuzhiyun-{ 357*4882a593Smuzhiyun- (UNS_8 *) "mmu", /* mmu group */ 358*4882a593Smuzhiyun- (UNS_8 *) "MMU command group", 359*4882a593Smuzhiyun- NULL, 360*4882a593Smuzhiyun- NULL 361*4882a593Smuzhiyun-}; 362*4882a593Smuzhiyun- 363*4882a593Smuzhiyun-static UNS_8 enabled_msg [] =" enabled"; 364*4882a593Smuzhiyun-static UNS_8 disabled_msg [] =" disabled"; 365*4882a593Smuzhiyun-static UNS_8 dcache_msg[] = "Data cache"; 366*4882a593Smuzhiyun-static UNS_8 icache_msg[] = "Instruction cache"; 367*4882a593Smuzhiyun-static UNS_8 pagetab_msg[] = "Page table at address: "; 368*4882a593Smuzhiyun-static UNS_8 slist_msg[] = "Type Virt Phy fl Size"; 369*4882a593Smuzhiyun-static UNS_8 mmu_msg [] ="MMU"; 370*4882a593Smuzhiyun-static UNS_8 cpage_msg[] = "Coarse page:"; 371*4882a593Smuzhiyun-static UNS_8 fpage_msg[] = "Fine page :"; 372*4882a593Smuzhiyun-static UNS_8 sect_msg[] = "Section :"; 373*4882a593Smuzhiyun-static UNS_8 mbytes_msg[] = "M"; 374*4882a593Smuzhiyun-static UNS_8 map1_err_msg[] = 375*4882a593Smuzhiyun- "Error : section addresses must be aligned on a 32-bit boundary"; 376*4882a593Smuzhiyun-static UNS_8 map2_err_msg[] = 377*4882a593Smuzhiyun- "Error : Number of sections exceeds address range of device"; 378*4882a593Smuzhiyun-static UNS_8 phya_msg[] = "Virtual address "; 379*4882a593Smuzhiyun-static UNS_8 mapped_msg[] = " mapped to physical address "; 380*4882a593Smuzhiyun-static UNS_8 unmapped_msg[] = " unmapped from physical address "; 381*4882a593Smuzhiyun-static UNS_8 cached_msg[] = " (cached)"; 382*4882a593Smuzhiyun-static UNS_8 inval_msg[] = " invalidated"; 383*4882a593Smuzhiyun-static UNS_8 caches_msg [] ="Caches"; 384*4882a593Smuzhiyun-static UNS_8 flushed_msg[] = " flushed"; 385*4882a593Smuzhiyun- 386*4882a593Smuzhiyun-/*********************************************************************** 387*4882a593Smuzhiyun- * 388*4882a593Smuzhiyun- * Function: show_section 389*4882a593Smuzhiyun- * 390*4882a593Smuzhiyun- * Purpose: Display section information 391*4882a593Smuzhiyun- * 392*4882a593Smuzhiyun- * Processing: 393*4882a593Smuzhiyun- * See function. 394*4882a593Smuzhiyun- * 395*4882a593Smuzhiyun- * Parameters: 396*4882a593Smuzhiyun- * mmu_reg : MMU settings for this section 397*4882a593Smuzhiyun- * virt_addr : Starting virtual address for this section 398*4882a593Smuzhiyun- * segs : Number of 1M segments for this section 399*4882a593Smuzhiyun- * 400*4882a593Smuzhiyun- * Outputs: None 401*4882a593Smuzhiyun- * 402*4882a593Smuzhiyun- * Returns: Nothing 403*4882a593Smuzhiyun- * 404*4882a593Smuzhiyun- * Notes: None 405*4882a593Smuzhiyun- * 406*4882a593Smuzhiyun- **********************************************************************/ 407*4882a593Smuzhiyun-static void show_section(UNS_32 mmu_reg, 408*4882a593Smuzhiyun- UNS_32 virt_addr, 409*4882a593Smuzhiyun- UNS_32 segs) 410*4882a593Smuzhiyun-{ 411*4882a593Smuzhiyun- UNS_8 straddr [16]; 412*4882a593Smuzhiyun- UNS_32 mmu_phy; 413*4882a593Smuzhiyun- 414*4882a593Smuzhiyun- if ((mmu_reg & ARM922T_L1D_TYPE_PG_SN_MASK) != 415*4882a593Smuzhiyun- ARM922T_L1D_TYPE_FAULT) 416*4882a593Smuzhiyun- { 417*4882a593Smuzhiyun- if ((mmu_reg & ARM922T_L1D_TYPE_PG_SN_MASK) == 418*4882a593Smuzhiyun- ARM922T_L1D_TYPE_CPAGE) 419*4882a593Smuzhiyun- { 420*4882a593Smuzhiyun- term_dat_out(cpage_msg); 421*4882a593Smuzhiyun- } 422*4882a593Smuzhiyun- else if ((mmu_reg & ARM922T_L1D_TYPE_PG_SN_MASK) == 423*4882a593Smuzhiyun- ARM922T_L1D_TYPE_FPAGE) 424*4882a593Smuzhiyun- { 425*4882a593Smuzhiyun- term_dat_out(fpage_msg); 426*4882a593Smuzhiyun- } 427*4882a593Smuzhiyun- else 428*4882a593Smuzhiyun- { 429*4882a593Smuzhiyun- term_dat_out(sect_msg); 430*4882a593Smuzhiyun- } 431*4882a593Smuzhiyun- 432*4882a593Smuzhiyun- /* Compute virtual address */ 433*4882a593Smuzhiyun- str_makehex(straddr, virt_addr, 8); 434*4882a593Smuzhiyun- term_dat_out(straddr); 435*4882a593Smuzhiyun- term_dat_out((UNS_8 *) " "); 436*4882a593Smuzhiyun- 437*4882a593Smuzhiyun- /* Compute mapped physical address */ 438*4882a593Smuzhiyun- if ((mmu_reg & ARM922T_L1D_TYPE_PG_SN_MASK) == 439*4882a593Smuzhiyun- ARM922T_L1D_TYPE_SECTION) 440*4882a593Smuzhiyun- { 441*4882a593Smuzhiyun- mmu_phy = mmu_reg & 0xFFF00000; 442*4882a593Smuzhiyun- } 443*4882a593Smuzhiyun- else 444*4882a593Smuzhiyun- { 445*4882a593Smuzhiyun- /* Don't compute addresses for non-sections */ 446*4882a593Smuzhiyun- mmu_phy = 0; 447*4882a593Smuzhiyun- } 448*4882a593Smuzhiyun- str_makehex(straddr, mmu_phy, 8); 449*4882a593Smuzhiyun- term_dat_out(straddr); 450*4882a593Smuzhiyun- term_dat_out((UNS_8 *) " "); 451*4882a593Smuzhiyun- 452*4882a593Smuzhiyun- /* MMU flags */ 453*4882a593Smuzhiyun- if ((mmu_reg & ARM922T_L1D_BUFFERABLE) != 0) 454*4882a593Smuzhiyun- { 455*4882a593Smuzhiyun- term_dat_out((UNS_8 *) "b"); 456*4882a593Smuzhiyun- } 457*4882a593Smuzhiyun- else 458*4882a593Smuzhiyun- { 459*4882a593Smuzhiyun- term_dat_out((UNS_8 *) " "); 460*4882a593Smuzhiyun- } 461*4882a593Smuzhiyun- if ((mmu_reg & ARM922T_L1D_CACHEABLE) != 0) 462*4882a593Smuzhiyun- { 463*4882a593Smuzhiyun- term_dat_out((UNS_8 *) "c"); 464*4882a593Smuzhiyun- } 465*4882a593Smuzhiyun- else 466*4882a593Smuzhiyun- { 467*4882a593Smuzhiyun- term_dat_out((UNS_8 *) " "); 468*4882a593Smuzhiyun- } 469*4882a593Smuzhiyun- term_dat_out((UNS_8 *) " "); 470*4882a593Smuzhiyun- 471*4882a593Smuzhiyun- /* Displays used megabytes */ 472*4882a593Smuzhiyun- str_makedec(straddr, segs); 473*4882a593Smuzhiyun- term_dat_out(straddr); 474*4882a593Smuzhiyun- term_dat_out_crlf(mbytes_msg); 475*4882a593Smuzhiyun- } 476*4882a593Smuzhiyun-} 477*4882a593Smuzhiyun- 478*4882a593Smuzhiyun-/*********************************************************************** 479*4882a593Smuzhiyun- * 480*4882a593Smuzhiyun- * Function: mmu_dumpinfo 481*4882a593Smuzhiyun- * 482*4882a593Smuzhiyun- * Purpose: Display MMU info 483*4882a593Smuzhiyun- * 484*4882a593Smuzhiyun- * Processing: 485*4882a593Smuzhiyun- * Display the MMU information, including enable status, cache 486*4882a593Smuzhiyun- * status, and page table. 487*4882a593Smuzhiyun- * 488*4882a593Smuzhiyun- * Parameters: None 489*4882a593Smuzhiyun- * 490*4882a593Smuzhiyun- * Outputs: None 491*4882a593Smuzhiyun- * 492*4882a593Smuzhiyun- * Returns: TRUE if the command was processed, otherwise FALSE 493*4882a593Smuzhiyun- * 494*4882a593Smuzhiyun- * Notes: None 495*4882a593Smuzhiyun- * 496*4882a593Smuzhiyun- **********************************************************************/ 497*4882a593Smuzhiyun-static BOOL_32 mmu_dumpinfo(void) 498*4882a593Smuzhiyun-{ 499*4882a593Smuzhiyun- UNS_32 segsz, last_mmu_reg, mmu_vrt, mmu_reg, mmu_vrtsav = 0, *pt; 500*4882a593Smuzhiyun- UNS_32 mlast_mmu_reg, mmmu_reg; 501*4882a593Smuzhiyun- int idx; 502*4882a593Smuzhiyun- UNS_8 hexaddr [16]; 503*4882a593Smuzhiyun- 504*4882a593Smuzhiyun- term_dat_out(mmu_msg); 505*4882a593Smuzhiyun- if (cp15_mmu_enabled() == FALSE) 506*4882a593Smuzhiyun- { 507*4882a593Smuzhiyun- term_dat_out_crlf(disabled_msg); 508*4882a593Smuzhiyun- } 509*4882a593Smuzhiyun- else 510*4882a593Smuzhiyun- { 511*4882a593Smuzhiyun- term_dat_out_crlf(enabled_msg); 512*4882a593Smuzhiyun- 513*4882a593Smuzhiyun- /* Get MMU control register word */ 514*4882a593Smuzhiyun- mmu_reg = cp15_get_mmu_control_reg(); 515*4882a593Smuzhiyun- 516*4882a593Smuzhiyun- /* Instruction cache status */ 517*4882a593Smuzhiyun- term_dat_out(icache_msg); 518*4882a593Smuzhiyun- if ((mmu_reg & ARM922T_MMU_CONTROL_I) == 0) 519*4882a593Smuzhiyun- { 520*4882a593Smuzhiyun- term_dat_out_crlf(disabled_msg); 521*4882a593Smuzhiyun- } 522*4882a593Smuzhiyun- else 523*4882a593Smuzhiyun- { 524*4882a593Smuzhiyun- term_dat_out_crlf(enabled_msg); 525*4882a593Smuzhiyun- } 526*4882a593Smuzhiyun- 527*4882a593Smuzhiyun- /* Data cache status */ 528*4882a593Smuzhiyun- term_dat_out(dcache_msg); 529*4882a593Smuzhiyun- if ((mmu_reg & ARM922T_MMU_CONTROL_C) == 0) 530*4882a593Smuzhiyun- { 531*4882a593Smuzhiyun- term_dat_out_crlf(disabled_msg); 532*4882a593Smuzhiyun- } 533*4882a593Smuzhiyun- else 534*4882a593Smuzhiyun- { 535*4882a593Smuzhiyun- term_dat_out_crlf(enabled_msg); 536*4882a593Smuzhiyun- } 537*4882a593Smuzhiyun- 538*4882a593Smuzhiyun- term_dat_out(pagetab_msg); 539*4882a593Smuzhiyun- mmu_reg = (UNS_32) cp15_get_ttb(); 540*4882a593Smuzhiyun- str_makehex(hexaddr, mmu_reg, 8); 541*4882a593Smuzhiyun- term_dat_out_crlf(hexaddr); 542*4882a593Smuzhiyun- term_dat_out_crlf(slist_msg); 543*4882a593Smuzhiyun- 544*4882a593Smuzhiyun- /* Process MMU table - assume that the physical and 545*4882a593Smuzhiyun- virtual locations of table are the same */ 546*4882a593Smuzhiyun- pt = (UNS_32 *) mmu_reg; 547*4882a593Smuzhiyun- mmu_vrt = 0x0; 548*4882a593Smuzhiyun- segsz = 0xFFFFFFFF; 549*4882a593Smuzhiyun- last_mmu_reg = mlast_mmu_reg = 0xFFFFFFFF; 550*4882a593Smuzhiyun- for (idx = 0; idx < 4096; idx++) 551*4882a593Smuzhiyun- { 552*4882a593Smuzhiyun- mmu_reg = *pt; 553*4882a593Smuzhiyun- mmmu_reg = (mmu_reg & (ARM922T_L1D_TYPE_PG_SN_MASK | 554*4882a593Smuzhiyun- ARM922T_L1D_BUFFERABLE | ARM922T_L1D_CACHEABLE)); 555*4882a593Smuzhiyun- segsz = segsz + 1; 556*4882a593Smuzhiyun- 557*4882a593Smuzhiyun- if ((last_mmu_reg != 0xFFFFFFFF) && 558*4882a593Smuzhiyun- (mlast_mmu_reg != mmmu_reg)) 559*4882a593Smuzhiyun- { 560*4882a593Smuzhiyun- show_section(last_mmu_reg, mmu_vrtsav, segsz); 561*4882a593Smuzhiyun- segsz = 0; 562*4882a593Smuzhiyun- } 563*4882a593Smuzhiyun- 564*4882a593Smuzhiyun- if (mlast_mmu_reg != mmmu_reg) 565*4882a593Smuzhiyun- { 566*4882a593Smuzhiyun- mmu_vrtsav = mmu_vrt; 567*4882a593Smuzhiyun- last_mmu_reg = mmu_reg; 568*4882a593Smuzhiyun- mlast_mmu_reg = mmmu_reg; 569*4882a593Smuzhiyun- } 570*4882a593Smuzhiyun- 571*4882a593Smuzhiyun- pt++; 572*4882a593Smuzhiyun- mmu_vrt += 0x00100000; 573*4882a593Smuzhiyun- } 574*4882a593Smuzhiyun- } 575*4882a593Smuzhiyun- 576*4882a593Smuzhiyun- return TRUE; 577*4882a593Smuzhiyun-} 578*4882a593Smuzhiyun- 579*4882a593Smuzhiyun-/*********************************************************************** 580*4882a593Smuzhiyun- * 581*4882a593Smuzhiyun- * Function: mmu_dumpmap 582*4882a593Smuzhiyun- * 583*4882a593Smuzhiyun- * Purpose: Map a virtual address range to a physical range 584*4882a593Smuzhiyun- * 585*4882a593Smuzhiyun- * Processing: 586*4882a593Smuzhiyun- * From the input addresses and number of sections, generate the 587*4882a593Smuzhiyun- * appropriate entries in the page table. 588*4882a593Smuzhiyun- * 589*4882a593Smuzhiyun- * Parameters: None 590*4882a593Smuzhiyun- * 591*4882a593Smuzhiyun- * Outputs: None 592*4882a593Smuzhiyun- * 593*4882a593Smuzhiyun- * Returns: TRUE if the command was processed, otherwise FALSE 594*4882a593Smuzhiyun- * 595*4882a593Smuzhiyun- * Notes: None 596*4882a593Smuzhiyun- * 597*4882a593Smuzhiyun- **********************************************************************/ 598*4882a593Smuzhiyun-static BOOL_32 mmu_dumpmap(UNS_32 vrt, 599*4882a593Smuzhiyun- UNS_32 phy, 600*4882a593Smuzhiyun- UNS_32 sections, 601*4882a593Smuzhiyun- UNS_32 cache) 602*4882a593Smuzhiyun-{ 603*4882a593Smuzhiyun- BOOL_32 processed = FALSE; 604*4882a593Smuzhiyun- UNS_32 mmu_phy, mmu_vrt, tmp1 = 0, tmp2, *pt; 605*4882a593Smuzhiyun- UNS_8 hexaddr [16]; 606*4882a593Smuzhiyun- 607*4882a593Smuzhiyun- /* Verify address boundaries are sectional */ 608*4882a593Smuzhiyun- mmu_vrt = vrt & ~ARM922T_L2D_SN_BASE_MASK; 609*4882a593Smuzhiyun- mmu_phy = phy & ~ARM922T_L2D_SN_BASE_MASK; 610*4882a593Smuzhiyun- if ((mmu_vrt != 0) || (mmu_phy != 0)) 611*4882a593Smuzhiyun- { 612*4882a593Smuzhiyun- term_dat_out_crlf(map1_err_msg); 613*4882a593Smuzhiyun- } 614*4882a593Smuzhiyun- else 615*4882a593Smuzhiyun- { 616*4882a593Smuzhiyun- /* Verify that address range and section count will not 617*4882a593Smuzhiyun- exceed address range of device */ 618*4882a593Smuzhiyun- tmp1 = vrt >> 20; 619*4882a593Smuzhiyun- tmp1 = (tmp1 + sections) - 1; 620*4882a593Smuzhiyun- tmp2 = phy >> 20; 621*4882a593Smuzhiyun- tmp2 = (tmp2 + sections) - 1; 622*4882a593Smuzhiyun- if ((tmp1 < 4096) && (tmp2 < 4096)) 623*4882a593Smuzhiyun- { 624*4882a593Smuzhiyun- /* Good address range and good section count */ 625*4882a593Smuzhiyun- processed = TRUE; 626*4882a593Smuzhiyun- } 627*4882a593Smuzhiyun- else 628*4882a593Smuzhiyun- { 629*4882a593Smuzhiyun- term_dat_out_crlf(map2_err_msg); 630*4882a593Smuzhiyun- } 631*4882a593Smuzhiyun- } 632*4882a593Smuzhiyun- 633*4882a593Smuzhiyun- /* Generate static part of MMU word */ 634*4882a593Smuzhiyun- if (cache == 0) 635*4882a593Smuzhiyun- { 636*4882a593Smuzhiyun- /* Section mapped with cache disabled */ 637*4882a593Smuzhiyun- tmp1 = ARM922T_L1D_TYPE_SECTION; 638*4882a593Smuzhiyun- } 639*4882a593Smuzhiyun- else if (cache == 1) 640*4882a593Smuzhiyun- { 641*4882a593Smuzhiyun- /* Section mapped with cache enabled */ 642*4882a593Smuzhiyun- tmp1 = (ARM922T_L1D_BUFFERABLE | ARM922T_L1D_CACHEABLE | 643*4882a593Smuzhiyun- ARM922T_L1D_TYPE_SECTION); 644*4882a593Smuzhiyun- } 645*4882a593Smuzhiyun- else if (cache == 2) 646*4882a593Smuzhiyun- { 647*4882a593Smuzhiyun- /* Section unmapped */ 648*4882a593Smuzhiyun- tmp1 = ARM922T_L1D_TYPE_FAULT; 649*4882a593Smuzhiyun- } 650*4882a593Smuzhiyun- tmp1 |= ARM922T_L1D_AP_ALL; 651*4882a593Smuzhiyun- 652*4882a593Smuzhiyun- /* Offset into page table for virtual address */ 653*4882a593Smuzhiyun- tmp2 = (vrt >> 20); 654*4882a593Smuzhiyun- pt = cp15_get_ttb() + tmp2; 655*4882a593Smuzhiyun- 656*4882a593Smuzhiyun- /* Loop until all sections are complete */ 657*4882a593Smuzhiyun- while ((sections > 0) && (processed == TRUE)) 658*4882a593Smuzhiyun- { 659*4882a593Smuzhiyun- /* Add in physical address */ 660*4882a593Smuzhiyun- tmp2 = tmp1 | (phy & ARM922T_L2D_SN_BASE_MASK); 661*4882a593Smuzhiyun- 662*4882a593Smuzhiyun- /* Save new section descriptor for virtual address */ 663*4882a593Smuzhiyun- *pt = tmp2; 664*4882a593Smuzhiyun- 665*4882a593Smuzhiyun- /* Output message shown the map */ 666*4882a593Smuzhiyun- term_dat_out(phya_msg); 667*4882a593Smuzhiyun- str_makehex(hexaddr, phy, 8); 668*4882a593Smuzhiyun- term_dat_out(hexaddr); 669*4882a593Smuzhiyun- if (cache == 2) 670*4882a593Smuzhiyun- { 671*4882a593Smuzhiyun- term_dat_out(unmapped_msg); 672*4882a593Smuzhiyun- } 673*4882a593Smuzhiyun- else 674*4882a593Smuzhiyun- { 675*4882a593Smuzhiyun- term_dat_out(mapped_msg); 676*4882a593Smuzhiyun- } 677*4882a593Smuzhiyun- str_makehex(hexaddr, vrt, 8); 678*4882a593Smuzhiyun- term_dat_out(hexaddr); 679*4882a593Smuzhiyun- if (cache == 1) 680*4882a593Smuzhiyun- { 681*4882a593Smuzhiyun- term_dat_out(cached_msg); 682*4882a593Smuzhiyun- } 683*4882a593Smuzhiyun- term_dat_out_crlf((UNS_8 *) ""); 684*4882a593Smuzhiyun- 685*4882a593Smuzhiyun- /* Next section and page table entry*/ 686*4882a593Smuzhiyun- phy += 0x00100000; 687*4882a593Smuzhiyun- vrt += 0x00100000; 688*4882a593Smuzhiyun- pt++; 689*4882a593Smuzhiyun- sections--; 690*4882a593Smuzhiyun- } 691*4882a593Smuzhiyun- 692*4882a593Smuzhiyun- return processed; 693*4882a593Smuzhiyun-} 694*4882a593Smuzhiyun- 695*4882a593Smuzhiyun-/*********************************************************************** 696*4882a593Smuzhiyun- * 697*4882a593Smuzhiyun- * Function: cmd_mmuinfo 698*4882a593Smuzhiyun- * 699*4882a593Smuzhiyun- * Purpose: Display MMU information 700*4882a593Smuzhiyun- * 701*4882a593Smuzhiyun- * Processing: 702*4882a593Smuzhiyun- * See function. 703*4882a593Smuzhiyun- * 704*4882a593Smuzhiyun- * Parameters: None 705*4882a593Smuzhiyun- * 706*4882a593Smuzhiyun- * Outputs: None 707*4882a593Smuzhiyun- * 708*4882a593Smuzhiyun- * Returns: TRUE if the command was processed, otherwise FALSE 709*4882a593Smuzhiyun- * 710*4882a593Smuzhiyun- * Notes: None 711*4882a593Smuzhiyun- * 712*4882a593Smuzhiyun- **********************************************************************/ 713*4882a593Smuzhiyun-static BOOL_32 cmd_mmuinfo(void) 714*4882a593Smuzhiyun-{ 715*4882a593Smuzhiyun- mmu_dumpinfo(); 716*4882a593Smuzhiyun- 717*4882a593Smuzhiyun- return TRUE; 718*4882a593Smuzhiyun-} 719*4882a593Smuzhiyun- 720*4882a593Smuzhiyun-/*********************************************************************** 721*4882a593Smuzhiyun- * 722*4882a593Smuzhiyun- * Function: cmd_map 723*4882a593Smuzhiyun- * 724*4882a593Smuzhiyun- * Purpose: Map a physical address region to a virtual region 725*4882a593Smuzhiyun- * 726*4882a593Smuzhiyun- * Processing: 727*4882a593Smuzhiyun- * See function. 728*4882a593Smuzhiyun- * 729*4882a593Smuzhiyun- * Parameters: None 730*4882a593Smuzhiyun- * 731*4882a593Smuzhiyun- * Outputs: None 732*4882a593Smuzhiyun- * 733*4882a593Smuzhiyun- * Returns: TRUE if the command was processed, otherwise FALSE 734*4882a593Smuzhiyun- * 735*4882a593Smuzhiyun- * Notes: None 736*4882a593Smuzhiyun- * 737*4882a593Smuzhiyun- **********************************************************************/ 738*4882a593Smuzhiyun-BOOL_32 cmd_map(void) 739*4882a593Smuzhiyun-{ 740*4882a593Smuzhiyun- UNS_32 phy, virt, sects, ce = 0; 741*4882a593Smuzhiyun- 742*4882a593Smuzhiyun- /* Get arguments */ 743*4882a593Smuzhiyun- virt = cmd_get_field_val(1); 744*4882a593Smuzhiyun- phy = cmd_get_field_val(2); 745*4882a593Smuzhiyun- sects = cmd_get_field_val(3); 746*4882a593Smuzhiyun- ce = cmd_get_field_val(4); 747*4882a593Smuzhiyun- 748*4882a593Smuzhiyun- if (ce <= 2) 749*4882a593Smuzhiyun- { 750*4882a593Smuzhiyun- mmu_dumpmap(virt, phy, sects, ce); 751*4882a593Smuzhiyun- } 752*4882a593Smuzhiyun- 753*4882a593Smuzhiyun- return TRUE; 754*4882a593Smuzhiyun-} 755*4882a593Smuzhiyun- 756*4882a593Smuzhiyun-/*********************************************************************** 757*4882a593Smuzhiyun- * 758*4882a593Smuzhiyun- * Function: cmd_inval 759*4882a593Smuzhiyun- * 760*4882a593Smuzhiyun- * Purpose: MMU cache flush and invalidate 761*4882a593Smuzhiyun- * 762*4882a593Smuzhiyun- * Processing: 763*4882a593Smuzhiyun- * See function. 764*4882a593Smuzhiyun- * 765*4882a593Smuzhiyun- * Parameters: None 766*4882a593Smuzhiyun- * 767*4882a593Smuzhiyun- * Outputs: None 768*4882a593Smuzhiyun- * 769*4882a593Smuzhiyun- * Returns: TRUE if the command was processed, otherwise FALSE 770*4882a593Smuzhiyun- * 771*4882a593Smuzhiyun- * Notes: None 772*4882a593Smuzhiyun- * 773*4882a593Smuzhiyun- **********************************************************************/ 774*4882a593Smuzhiyun-BOOL_32 cmd_inval(void) 775*4882a593Smuzhiyun-{ 776*4882a593Smuzhiyun- dcache_flush(); 777*4882a593Smuzhiyun- icache_inval(); 778*4882a593Smuzhiyun- term_dat_out(caches_msg); 779*4882a593Smuzhiyun- term_dat_out(inval_msg); 780*4882a593Smuzhiyun- 781*4882a593Smuzhiyun- return TRUE; 782*4882a593Smuzhiyun-} 783*4882a593Smuzhiyun- 784*4882a593Smuzhiyun-/*********************************************************************** 785*4882a593Smuzhiyun- * 786*4882a593Smuzhiyun- * Function: cmd_dcache 787*4882a593Smuzhiyun- * 788*4882a593Smuzhiyun- * Purpose: MMU data cache enable and disable 789*4882a593Smuzhiyun- * 790*4882a593Smuzhiyun- * Processing: 791*4882a593Smuzhiyun- * If the value passed in the parser is 1, enable the data cache, 792*4882a593Smuzhiyun- * otherwise disable the data cache. 793*4882a593Smuzhiyun- * 794*4882a593Smuzhiyun- * Parameters: None 795*4882a593Smuzhiyun- * 796*4882a593Smuzhiyun- * Outputs: None 797*4882a593Smuzhiyun- * 798*4882a593Smuzhiyun- * Returns: TRUE if the command was processed, otherwise FALSE 799*4882a593Smuzhiyun- * 800*4882a593Smuzhiyun- * Notes: None 801*4882a593Smuzhiyun- * 802*4882a593Smuzhiyun- **********************************************************************/ 803*4882a593Smuzhiyun-BOOL_32 cmd_dcache(void) 804*4882a593Smuzhiyun-{ 805*4882a593Smuzhiyun- UNS_32 cenable; 806*4882a593Smuzhiyun- UNS_8 *ppar; 807*4882a593Smuzhiyun- 808*4882a593Smuzhiyun- /* Get argument */ 809*4882a593Smuzhiyun- cenable = cmd_get_field_val(1); 810*4882a593Smuzhiyun- 811*4882a593Smuzhiyun- switch (cenable) 812*4882a593Smuzhiyun- { 813*4882a593Smuzhiyun- case 0: 814*4882a593Smuzhiyun- dcache_flush(); 815*4882a593Smuzhiyun- cp15_set_dcache(0); 816*4882a593Smuzhiyun- ppar = disabled_msg; 817*4882a593Smuzhiyun- break; 818*4882a593Smuzhiyun- 819*4882a593Smuzhiyun- case 1: 820*4882a593Smuzhiyun- cp15_invalidate_cache(); 821*4882a593Smuzhiyun- cp15_set_dcache(1); 822*4882a593Smuzhiyun- ppar = enabled_msg; 823*4882a593Smuzhiyun- break; 824*4882a593Smuzhiyun- 825*4882a593Smuzhiyun- case 2: 826*4882a593Smuzhiyun- default: 827*4882a593Smuzhiyun- dcache_flush(); 828*4882a593Smuzhiyun- ppar = flushed_msg; 829*4882a593Smuzhiyun- break; 830*4882a593Smuzhiyun- } 831*4882a593Smuzhiyun- 832*4882a593Smuzhiyun- term_dat_out(dcache_msg); 833*4882a593Smuzhiyun- term_dat_out_crlf(ppar); 834*4882a593Smuzhiyun- 835*4882a593Smuzhiyun- return TRUE; 836*4882a593Smuzhiyun-} 837*4882a593Smuzhiyun- 838*4882a593Smuzhiyun-/*********************************************************************** 839*4882a593Smuzhiyun- * 840*4882a593Smuzhiyun- * Function: cmd_icache 841*4882a593Smuzhiyun- * 842*4882a593Smuzhiyun- * Purpose: MMU instruction cache enable and disable 843*4882a593Smuzhiyun- * 844*4882a593Smuzhiyun- * Processing: 845*4882a593Smuzhiyun- * If the value passed in the parser is 1, enable the instruction 846*4882a593Smuzhiyun- * cache, otherwise disable the instruction cache. 847*4882a593Smuzhiyun- * 848*4882a593Smuzhiyun- * Parameters: None 849*4882a593Smuzhiyun- * 850*4882a593Smuzhiyun- * Outputs: None 851*4882a593Smuzhiyun- * 852*4882a593Smuzhiyun- * Returns: TRUE if the command was processed, otherwise FALSE 853*4882a593Smuzhiyun- * 854*4882a593Smuzhiyun- * Notes: None 855*4882a593Smuzhiyun- * 856*4882a593Smuzhiyun- **********************************************************************/ 857*4882a593Smuzhiyun-BOOL_32 cmd_icache(void) 858*4882a593Smuzhiyun-{ 859*4882a593Smuzhiyun- UNS_32 cenable; 860*4882a593Smuzhiyun- UNS_8 *ppar; 861*4882a593Smuzhiyun- 862*4882a593Smuzhiyun- /* Get argument */ 863*4882a593Smuzhiyun- cenable = cmd_get_field_val(1); 864*4882a593Smuzhiyun- 865*4882a593Smuzhiyun- if (cenable == 1) 866*4882a593Smuzhiyun- { 867*4882a593Smuzhiyun- dcache_flush(); 868*4882a593Smuzhiyun- cp15_invalidate_cache(); 869*4882a593Smuzhiyun- cp15_set_icache(1); 870*4882a593Smuzhiyun- ppar = enabled_msg; 871*4882a593Smuzhiyun- } 872*4882a593Smuzhiyun- else 873*4882a593Smuzhiyun- { 874*4882a593Smuzhiyun- cp15_set_icache(0); 875*4882a593Smuzhiyun- ppar = disabled_msg; 876*4882a593Smuzhiyun- } 877*4882a593Smuzhiyun- 878*4882a593Smuzhiyun- term_dat_out(icache_msg); 879*4882a593Smuzhiyun- term_dat_out_crlf(ppar); 880*4882a593Smuzhiyun- 881*4882a593Smuzhiyun- return TRUE; 882*4882a593Smuzhiyun-} 883*4882a593Smuzhiyun- 884*4882a593Smuzhiyun- 885*4882a593Smuzhiyun-/*********************************************************************** 886*4882a593Smuzhiyun- * 887*4882a593Smuzhiyun- * Function: cmd_mmuenab 888*4882a593Smuzhiyun- * 889*4882a593Smuzhiyun- * Purpose: Enable or disable MMU 890*4882a593Smuzhiyun- * 891*4882a593Smuzhiyun- * Processing: 892*4882a593Smuzhiyun- * See function. 893*4882a593Smuzhiyun- * 894*4882a593Smuzhiyun- * Parameters: None 895*4882a593Smuzhiyun- * 896*4882a593Smuzhiyun- * Outputs: None 897*4882a593Smuzhiyun- * 898*4882a593Smuzhiyun- * Returns: TRUE if the command was processed, otherwise FALSE 899*4882a593Smuzhiyun- * 900*4882a593Smuzhiyun- * Notes: None 901*4882a593Smuzhiyun- * 902*4882a593Smuzhiyun- **********************************************************************/ 903*4882a593Smuzhiyun-BOOL_32 cmd_mmuenab(void) 904*4882a593Smuzhiyun-{ 905*4882a593Smuzhiyun- UNS_8 *ppar; 906*4882a593Smuzhiyun- UNS_32 cenable; 907*4882a593Smuzhiyun- 908*4882a593Smuzhiyun- term_dat_out_crlf((UNS_8 *) "Warning: Changing MMU status on " 909*4882a593Smuzhiyun- " cached and buffered code can cause system crashes."); 910*4882a593Smuzhiyun- 911*4882a593Smuzhiyun- /* Get argument */ 912*4882a593Smuzhiyun- cenable = cmd_get_field_val(1); 913*4882a593Smuzhiyun- 914*4882a593Smuzhiyun- if (cenable == 1) 915*4882a593Smuzhiyun- { 916*4882a593Smuzhiyun- if ((cp15_get_mmu_control_reg() & ARM922T_MMU_CONTROL_C) != 0) 917*4882a593Smuzhiyun- { 918*4882a593Smuzhiyun- cp15_invalidate_cache(); 919*4882a593Smuzhiyun- } 920*4882a593Smuzhiyun- 921*4882a593Smuzhiyun- cp15_set_mmu(1); 922*4882a593Smuzhiyun- ppar = enabled_msg; 923*4882a593Smuzhiyun- } 924*4882a593Smuzhiyun- else 925*4882a593Smuzhiyun- { 926*4882a593Smuzhiyun- cp15_dcache_flush(); 927*4882a593Smuzhiyun- cp15_write_buffer_flush(); 928*4882a593Smuzhiyun- cp15_invalidate_cache(); 929*4882a593Smuzhiyun- cp15_set_mmu(0); 930*4882a593Smuzhiyun- ppar = disabled_msg; 931*4882a593Smuzhiyun- } 932*4882a593Smuzhiyun- 933*4882a593Smuzhiyun- term_dat_out(mmu_msg); 934*4882a593Smuzhiyun- term_dat_out_crlf(ppar); 935*4882a593Smuzhiyun- 936*4882a593Smuzhiyun- return TRUE; 937*4882a593Smuzhiyun-} 938*4882a593Smuzhiyun- 939*4882a593Smuzhiyun-/*********************************************************************** 940*4882a593Smuzhiyun- * 941*4882a593Smuzhiyun- * Function: mmu_cmd_group_init 942*4882a593Smuzhiyun- * 943*4882a593Smuzhiyun- * Purpose: Initialize MMU command group 944*4882a593Smuzhiyun- * 945*4882a593Smuzhiyun- * Processing: 946*4882a593Smuzhiyun- * See function. 947*4882a593Smuzhiyun- * 948*4882a593Smuzhiyun- * Parameters: None 949*4882a593Smuzhiyun- * 950*4882a593Smuzhiyun- * Outputs: None 951*4882a593Smuzhiyun- * 952*4882a593Smuzhiyun- * Returns: Nothin 953*4882a593Smuzhiyun- * 954*4882a593Smuzhiyun- * Notes: None 955*4882a593Smuzhiyun- * 956*4882a593Smuzhiyun- **********************************************************************/ 957*4882a593Smuzhiyun-void mmu_cmd_group_init(void) 958*4882a593Smuzhiyun-{ 959*4882a593Smuzhiyun- /* Add MMU group */ 960*4882a593Smuzhiyun- cmd_add_group(&mmu_group); 961*4882a593Smuzhiyun- 962*4882a593Smuzhiyun- /* Add commands to the MMU group */ 963*4882a593Smuzhiyun- cmd_add_new_command(&mmu_group, &core_dcache_cmd); 964*4882a593Smuzhiyun- cmd_add_new_command(&mmu_group, &core_icache_cmd); 965*4882a593Smuzhiyun- cmd_add_new_command(&mmu_group, &core_inval_cmd); 966*4882a593Smuzhiyun- cmd_add_new_command(&mmu_group, &core_mmuenab_cmd); 967*4882a593Smuzhiyun- cmd_add_new_command(&mmu_group, &core_map_cmd); 968*4882a593Smuzhiyun- cmd_add_new_command(&mmu_group, &core_mmuinfo_cmd); 969*4882a593Smuzhiyun-} 970