1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * acme-acqua.dts - Device Tree file for Acqua A5 Board 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Copyright (C) 2014 Atmel, 5*4882a593Smuzhiyun * 2014 Nicolas Ferre <nicolas.ferre@atmel.com> 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * 2020 Sergio Tanzilli <tanzilli@acmesystems.it> 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * Licensed under GPLv2 or later. 10*4882a593Smuzhiyun */ 11*4882a593Smuzhiyun/dts-v1/; 12*4882a593Smuzhiyun#include "sama5d31.dtsi" 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun/ { 15*4882a593Smuzhiyun model = "Acme Systems Acqua SOM"; 16*4882a593Smuzhiyun compatible = "acme,acqua", "atmel,sama5d3", "atmel,sama5"; 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun chosen { 19*4882a593Smuzhiyun stdout-path = "serial0:115200n8"; 20*4882a593Smuzhiyun bootargs = "mem=256M console=ttyS0,115200 root=/dev/mmcblk0p2 rootfstype=ext4 rw rootwait consoleblank=0"; 21*4882a593Smuzhiyun }; 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun memory { 24*4882a593Smuzhiyun reg = <0x20000000 0x10000000>; 25*4882a593Smuzhiyun }; 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun clocks { 28*4882a593Smuzhiyun slow_xtal { 29*4882a593Smuzhiyun clock-frequency = <32768>; 30*4882a593Smuzhiyun }; 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun main_xtal { 33*4882a593Smuzhiyun clock-frequency = <12000000>; 34*4882a593Smuzhiyun }; 35*4882a593Smuzhiyun }; 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun ahb { 38*4882a593Smuzhiyun apb { 39*4882a593Smuzhiyun hlcdc: hlcdc@f0030000 { 40*4882a593Smuzhiyun status = "disabled"; 41*4882a593Smuzhiyun hlcdc-display-controller { 42*4882a593Smuzhiyun pinctrl-names = "default"; 43*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_rgb888_alt>; 44*4882a593Smuzhiyun port@0 { 45*4882a593Smuzhiyun hlcdc_panel_output: endpoint@0 { 46*4882a593Smuzhiyun remote-endpoint = <&panel_input>; 47*4882a593Smuzhiyun }; 48*4882a593Smuzhiyun }; 49*4882a593Smuzhiyun }; 50*4882a593Smuzhiyun }; 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun /* MicroSD mounted on the SOM */ 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun mmc0: mmc@f0000000 { 55*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_cd>; 56*4882a593Smuzhiyun status = "okay"; 57*4882a593Smuzhiyun slot@0 { 58*4882a593Smuzhiyun reg = <0>; 59*4882a593Smuzhiyun bus-width = <4>; 60*4882a593Smuzhiyun }; 61*4882a593Smuzhiyun }; 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun /* Optional MicroSD to mount on the carrier board */ 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun mmc1: mmc@f8000000 { 66*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3 &pinctrl_mmc1_cd>; 67*4882a593Smuzhiyun status = "disabled"; 68*4882a593Smuzhiyun slot@0 { 69*4882a593Smuzhiyun reg = <0>; 70*4882a593Smuzhiyun bus-width = <4>; 71*4882a593Smuzhiyun cd-gpios = <&pioE 1 GPIO_ACTIVE_LOW>; 72*4882a593Smuzhiyun }; 73*4882a593Smuzhiyun }; 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun spi0: spi@f0004000 { 76*4882a593Smuzhiyun cs-gpios = <&pioD 13 0>, <0>, <0>, <&pioD 16 0>; 77*4882a593Smuzhiyun status = "disabled"; 78*4882a593Smuzhiyun }; 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun can0: can@f000c000 { 81*4882a593Smuzhiyun status = "disabled"; 82*4882a593Smuzhiyun }; 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun tcb0: timer@f0010000 { 85*4882a593Smuzhiyun timer0: timer@0 { 86*4882a593Smuzhiyun compatible = "atmel,tcb-timer"; 87*4882a593Smuzhiyun reg = <0>; 88*4882a593Smuzhiyun }; 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun timer1: timer@1 { 91*4882a593Smuzhiyun compatible = "atmel,tcb-timer"; 92*4882a593Smuzhiyun reg = <1>; 93*4882a593Smuzhiyun }; 94*4882a593Smuzhiyun }; 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun i2c0: i2c@f0014000 { 97*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_i2c0_pu>; 98*4882a593Smuzhiyun status = "disabled"; 99*4882a593Smuzhiyun }; 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun i2c1: i2c@f0018000 { 102*4882a593Smuzhiyun status = "disabled"; 103*4882a593Smuzhiyun }; 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun macb1: ethernet@f802c000 { 106*4882a593Smuzhiyun compatible = "atmel,sama5d3-macb", "cdns,at91sam9260-macb", "cdns,macb"; 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun status = "okay"; 109*4882a593Smuzhiyun phy-mode = "rmii"; 110*4882a593Smuzhiyun #address-cells = <1>; 111*4882a593Smuzhiyun #size-cells = <0>; 112*4882a593Smuzhiyun 113*4882a593Smuzhiyun nvmem-cells = <ð0_addr>; 114*4882a593Smuzhiyun nvmem-cell-names = "mac-address"; 115*4882a593Smuzhiyun 116*4882a593Smuzhiyun phy0: ethernet-phy@1 { 117*4882a593Smuzhiyun interrupt-parent = <&pioE>; 118*4882a593Smuzhiyun interrupts = <30 IRQ_TYPE_EDGE_FALLING>; 119*4882a593Smuzhiyun reg = <1>; 120*4882a593Smuzhiyun }; 121*4882a593Smuzhiyun 122*4882a593Smuzhiyun /*ethernet-phy@1 { 123*4882a593Smuzhiyun reg = <0x1>; 124*4882a593Smuzhiyun };*/ 125*4882a593Smuzhiyun }; 126*4882a593Smuzhiyun 127*4882a593Smuzhiyun /* Bit banging internal I2C to manage the AT24MAC402 chip */ 128*4882a593Smuzhiyun 129*4882a593Smuzhiyun i2c3@ { 130*4882a593Smuzhiyun compatible = "i2c-gpio"; 131*4882a593Smuzhiyun gpios = <&pioE 1 0 /* SDA */ 132*4882a593Smuzhiyun &pioE 2 0 /* SCK */ 133*4882a593Smuzhiyun >; 134*4882a593Smuzhiyun i2c-gpio,delay-us = <4>; /* ~178 kHz */ 135*4882a593Smuzhiyun #address-cells = <1>; 136*4882a593Smuzhiyun #size-cells = <0>; 137*4882a593Smuzhiyun 138*4882a593Smuzhiyun /* EEPROM contains the eth0 MAC address */ 139*4882a593Smuzhiyun 140*4882a593Smuzhiyun eeprom@58 { 141*4882a593Smuzhiyun compatible = "atmel,24mac402"; 142*4882a593Smuzhiyun pagesize = <256>; 143*4882a593Smuzhiyun read-only; 144*4882a593Smuzhiyun reg = <0x58>; 145*4882a593Smuzhiyun #address-cells = <1>; 146*4882a593Smuzhiyun #size-cells = <1>; 147*4882a593Smuzhiyun 148*4882a593Smuzhiyun eth0_addr: eth-mac-addr@9A { 149*4882a593Smuzhiyun reg = <0x0 0x06>; 150*4882a593Smuzhiyun }; 151*4882a593Smuzhiyun }; 152*4882a593Smuzhiyun }; 153*4882a593Smuzhiyun 154*4882a593Smuzhiyun pwm0: pwm@f002c000 { 155*4882a593Smuzhiyun pinctrl-names = "default"; 156*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_pwm0_pwmh0_0 &pinctrl_pwm0_pwmh1_0>; 157*4882a593Smuzhiyun status = "disabled"; 158*4882a593Smuzhiyun }; 159*4882a593Smuzhiyun 160*4882a593Smuzhiyun usart0: serial@f001c000 { 161*4882a593Smuzhiyun status = "okay"; 162*4882a593Smuzhiyun }; 163*4882a593Smuzhiyun 164*4882a593Smuzhiyun usart1: serial@f0020000 { 165*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_usart1 &pinctrl_usart1_rts_cts>; 166*4882a593Smuzhiyun status = "disabled"; 167*4882a593Smuzhiyun }; 168*4882a593Smuzhiyun 169*4882a593Smuzhiyun uart0: serial@f0024000 { 170*4882a593Smuzhiyun status = "disabled"; 171*4882a593Smuzhiyun }; 172*4882a593Smuzhiyun 173*4882a593Smuzhiyun 174*4882a593Smuzhiyun spi1: spi@f8008000 { 175*4882a593Smuzhiyun cs-gpios = <&pioC 25 0>; 176*4882a593Smuzhiyun status = "disabled"; 177*4882a593Smuzhiyun }; 178*4882a593Smuzhiyun 179*4882a593Smuzhiyun adc0: adc@f8018000 { 180*4882a593Smuzhiyun atmel,adc-vref = <3300>; 181*4882a593Smuzhiyun atmel,adc-channels-used = <0xfe>; 182*4882a593Smuzhiyun pinctrl-0 = < 183*4882a593Smuzhiyun &pinctrl_adc0_adtrg 184*4882a593Smuzhiyun &pinctrl_adc0_ad1 185*4882a593Smuzhiyun &pinctrl_adc0_ad2 186*4882a593Smuzhiyun &pinctrl_adc0_ad3 187*4882a593Smuzhiyun &pinctrl_adc0_ad4 188*4882a593Smuzhiyun &pinctrl_adc0_ad5 189*4882a593Smuzhiyun &pinctrl_adc0_ad6 190*4882a593Smuzhiyun &pinctrl_adc0_ad7 191*4882a593Smuzhiyun >; 192*4882a593Smuzhiyun status = "disabled"; 193*4882a593Smuzhiyun }; 194*4882a593Smuzhiyun 195*4882a593Smuzhiyun i2c2: i2c@f801c000 { 196*4882a593Smuzhiyun dmas = <0>, <0>; /* Do not use DMA for i2c2 */ 197*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_i2c2_pu>; 198*4882a593Smuzhiyun status = "disabled"; 199*4882a593Smuzhiyun }; 200*4882a593Smuzhiyun 201*4882a593Smuzhiyun 202*4882a593Smuzhiyun dbgu: serial@ffffee00 { 203*4882a593Smuzhiyun status = "okay"; 204*4882a593Smuzhiyun }; 205*4882a593Smuzhiyun 206*4882a593Smuzhiyun pinctrl@fffff200 { 207*4882a593Smuzhiyun board { 208*4882a593Smuzhiyun pinctrl_i2c0_pu: i2c0_pu { 209*4882a593Smuzhiyun atmel,pins = 210*4882a593Smuzhiyun <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, 211*4882a593Smuzhiyun <AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; 212*4882a593Smuzhiyun }; 213*4882a593Smuzhiyun 214*4882a593Smuzhiyun pinctrl_i2c2_pu: i2c2_pu { 215*4882a593Smuzhiyun atmel,pins = 216*4882a593Smuzhiyun <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>, 217*4882a593Smuzhiyun <AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; 218*4882a593Smuzhiyun }; 219*4882a593Smuzhiyun 220*4882a593Smuzhiyun pinctrl_key_gpio: key_gpio_0 { 221*4882a593Smuzhiyun atmel,pins = 222*4882a593Smuzhiyun <AT91_PIOE 29 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; 223*4882a593Smuzhiyun }; 224*4882a593Smuzhiyun 225*4882a593Smuzhiyun pinctrl_mmc0_cd: mmc0_cd { 226*4882a593Smuzhiyun atmel,pins = 227*4882a593Smuzhiyun <AT91_PIOE 0 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; 228*4882a593Smuzhiyun }; 229*4882a593Smuzhiyun 230*4882a593Smuzhiyun pinctrl_mmc1_cd: mmc1_cd { 231*4882a593Smuzhiyun atmel,pins = 232*4882a593Smuzhiyun <AT91_PIOE 1 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; 233*4882a593Smuzhiyun }; 234*4882a593Smuzhiyun 235*4882a593Smuzhiyun pinctrl_usba_vbus: usba_vbus { 236*4882a593Smuzhiyun atmel,pins = 237*4882a593Smuzhiyun <AT91_PIOE 9 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>; /* PE9, conflicts with A9 */ 238*4882a593Smuzhiyun }; 239*4882a593Smuzhiyun }; 240*4882a593Smuzhiyun }; 241*4882a593Smuzhiyun }; 242*4882a593Smuzhiyun 243*4882a593Smuzhiyun usb0: gadget@500000 { 244*4882a593Smuzhiyun status = "okay"; 245*4882a593Smuzhiyun }; 246*4882a593Smuzhiyun 247*4882a593Smuzhiyun usb1: ohci@600000 { 248*4882a593Smuzhiyun status = "okay"; 249*4882a593Smuzhiyun }; 250*4882a593Smuzhiyun 251*4882a593Smuzhiyun usb2: ehci@700000 { 252*4882a593Smuzhiyun status = "okay"; 253*4882a593Smuzhiyun }; 254*4882a593Smuzhiyun 255*4882a593Smuzhiyun }; 256*4882a593Smuzhiyun 257*4882a593Smuzhiyun 258*4882a593Smuzhiyun panel: panel { 259*4882a593Smuzhiyun /* compatible = "acme,43inch", "simple-panel"; */ 260*4882a593Smuzhiyun compatible = "acme,50inch", "simple-panel"; 261*4882a593Smuzhiyun /* compatible = "acme,70inch", "simple-panel"; */ 262*4882a593Smuzhiyun 263*4882a593Smuzhiyun status = "disable"; 264*4882a593Smuzhiyun 265*4882a593Smuzhiyun port@0 { 266*4882a593Smuzhiyun panel_input: endpoint@0 { 267*4882a593Smuzhiyun remote-endpoint = <&hlcdc_panel_output>; 268*4882a593Smuzhiyun }; 269*4882a593Smuzhiyun }; 270*4882a593Smuzhiyun }; 271*4882a593Smuzhiyun 272*4882a593Smuzhiyun 273*4882a593Smuzhiyun leds { 274*4882a593Smuzhiyun compatible = "gpio-leds"; 275*4882a593Smuzhiyun 276*4882a593Smuzhiyun led0 { 277*4882a593Smuzhiyun label = "led0"; 278*4882a593Smuzhiyun gpios = <&pioE 3 GPIO_ACTIVE_LOW>; 279*4882a593Smuzhiyun default-state = "off"; 280*4882a593Smuzhiyun }; 281*4882a593Smuzhiyun 282*4882a593Smuzhiyun led1 { 283*4882a593Smuzhiyun label = "led1"; 284*4882a593Smuzhiyun gpios = <&pioE 4 GPIO_ACTIVE_LOW>; 285*4882a593Smuzhiyun default-state = "off"; 286*4882a593Smuzhiyun }; 287*4882a593Smuzhiyun 288*4882a593Smuzhiyun led2 { 289*4882a593Smuzhiyun label = "led2"; 290*4882a593Smuzhiyun gpios = <&pioE 5 GPIO_ACTIVE_LOW>; 291*4882a593Smuzhiyun linux,default-trigger = "heartbeat"; 292*4882a593Smuzhiyun }; 293*4882a593Smuzhiyun 294*4882a593Smuzhiyun led3 { 295*4882a593Smuzhiyun label = "led3"; 296*4882a593Smuzhiyun gpios = <&pioE 6 GPIO_ACTIVE_LOW>; 297*4882a593Smuzhiyun linux,default-trigger = "mmc0"; 298*4882a593Smuzhiyun default-state = "off"; 299*4882a593Smuzhiyun }; 300*4882a593Smuzhiyun }; 301*4882a593Smuzhiyun}; 302