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Searched refs:msSetOutDClk (Results 1 – 12 of 12) sorted by relevance

/utopia/UTPA2-700.0.x/modules/mfc/hal/maserati/mfc/
H A Dmdrv_mfc_scalerop.c487 void msSetOutDClk(U8 u8Inputfreq, U8 ucVHzFrmT2/*Set panel frequence from T2*/, BOOL enableFPLL) in msSetOutDClk() function
980 msSetOutDClk(60, 0, TRUE); in MDrv_MFC_InitializeDispTgen()
H A Dmdrv_mfc_scalerop.h96 void msSetOutDClk(U8 ucVfreq, U8 ucVHzFrmT2, BOOL enableFPLL);
/utopia/UTPA2-700.0.x/modules/mfc/hal/macan/mfc/
H A Dmdrv_mfc_scalerop.c487 void msSetOutDClk(U8 u8Inputfreq, U8 ucVHzFrmT2/*Set panel frequence from T2*/, BOOL enableFPLL) in msSetOutDClk() function
980 msSetOutDClk(60, 0, TRUE); in MDrv_MFC_InitializeDispTgen()
H A Dmdrv_mfc_scalerop.h96 void msSetOutDClk(U8 ucVfreq, U8 ucVHzFrmT2, BOOL enableFPLL);
/utopia/UTPA2-700.0.x/modules/mfc/hal/M7821/mfc/
H A Dmdrv_mfc_scalerop.c487 void msSetOutDClk(U8 u8Inputfreq, U8 ucVHzFrmT2/*Set panel frequence from T2*/, BOOL enableFPLL) in msSetOutDClk() function
980 msSetOutDClk(60, 0, TRUE); in MDrv_MFC_InitializeDispTgen()
H A Dmdrv_mfc_scalerop.h96 void msSetOutDClk(U8 ucVfreq, U8 ucVHzFrmT2, BOOL enableFPLL);
/utopia/UTPA2-700.0.x/modules/mfc/hal/maxim/mfc/
H A Dmdrv_mfc_scalerop.c487 void msSetOutDClk(U8 u8Inputfreq, U8 ucVHzFrmT2/*Set panel frequence from T2*/, BOOL enableFPLL) in msSetOutDClk() function
980 msSetOutDClk(60, 0, TRUE); in MDrv_MFC_InitializeDispTgen()
H A Dmdrv_mfc_scalerop.h96 void msSetOutDClk(U8 ucVfreq, U8 ucVHzFrmT2, BOOL enableFPLL);
/utopia/UTPA2-700.0.x/modules/mfc/hal/manhattan/mfc/
H A Dmdrv_mfc_scalerop.c487 void msSetOutDClk(U8 u8Inputfreq, U8 ucVHzFrmT2/*Set panel frequence from T2*/, BOOL enableFPLL) in msSetOutDClk() function
980 msSetOutDClk(60, 0, TRUE); in MDrv_MFC_InitializeDispTgen()
H A Dmdrv_mfc_scalerop.h96 void msSetOutDClk(U8 ucVfreq, U8 ucVHzFrmT2, BOOL enableFPLL);
/utopia/UTPA2-700.0.x/modules/mfc/hal/M7621/mfc/
H A Dmdrv_mfc_scalerop.c487 void msSetOutDClk(U8 u8Inputfreq, U8 ucVHzFrmT2/*Set panel frequence from T2*/, BOOL enableFPLL) in msSetOutDClk() function
980 msSetOutDClk(60, 0, TRUE); in MDrv_MFC_InitializeDispTgen()
H A Dmdrv_mfc_scalerop.h96 void msSetOutDClk(U8 ucVfreq, U8 ucVHzFrmT2, BOOL enableFPLL);