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Searched refs:cont4 (Results 1 – 11 of 11) sorted by relevance

/utopia/UTPA2-700.0.x/modules/pq/hal/manhattan/pq/
H A Dmhal_pq.c594 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_sram_icc_crd_table() local
626 SRAM4_ICC[cont4] = (u32Addr[u16Index]); in Hal_PQ_set_sram_icc_crd_table()
628 cont4++; in Hal_PQ_set_sram_icc_crd_table()
730 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_sram_ihc_crd_table() local
762 SRAM4_IHC[cont4] = (u32Addr[u16Index]); in Hal_PQ_set_sram_ihc_crd_table()
764 cont4++; in Hal_PQ_set_sram_ihc_crd_table()
1360 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_UFSC_sram_icc_crd_table() local
1392 UFSC_SRAM4_ICC[cont4] = (u32Addr[u16Index]); in Hal_PQ_set_UFSC_sram_icc_crd_table()
1394 cont4++; in Hal_PQ_set_UFSC_sram_icc_crd_table()
1453 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_UFSC_sram_ihc_crd_table() local
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/utopia/UTPA2-700.0.x/modules/pq/hal/k6lite/pq/
H A Dmhal_pq.c659 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_sram_ihc_crd_table() local
682 SRAM4_IHC[cont4++] = u32Addr[u16Index]; in Hal_PQ_set_sram_ihc_crd_table()
700 MS_U16 cont1, cont2, cont3, cont4; in Hal_PQ_set_sram_ihc_crd_table()
713 cont1 = cont2 = cont3 = cont4 = 0; in Hal_PQ_set_sram_ihc_crd_table()
743 SRAM4_IHC[cont4]=data; in Hal_PQ_set_sram_ihc_crd_table()
744 cont4 = cont4 < MAX_SRAM_SIZE-1 ? cont4+1 : MAX_SRAM_SIZE-1; in Hal_PQ_set_sram_ihc_crd_table()
771 _Hal_PQ_set_sram_ihc_crd_table(&SRAM4_IHC[0], 3, cont4); in Hal_PQ_set_sram_ihc_crd_table()
/utopia/UTPA2-700.0.x/modules/pq/hal/kano/pq/
H A Dmhal_pq.c661 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_sram_ihc_crd_table() local
684 SRAM4_IHC[cont4++] = u32Addr[u16Index]; in Hal_PQ_set_sram_ihc_crd_table()
702 MS_U16 cont1, cont2, cont3, cont4; in Hal_PQ_set_sram_ihc_crd_table()
715 cont1 = cont2 = cont3 = cont4 = 0; in Hal_PQ_set_sram_ihc_crd_table()
745 SRAM4_IHC[cont4]=data; in Hal_PQ_set_sram_ihc_crd_table()
746 cont4 = cont4 < MAX_SRAM_SIZE-1 ? cont4+1 : MAX_SRAM_SIZE-1; in Hal_PQ_set_sram_ihc_crd_table()
773 _Hal_PQ_set_sram_ihc_crd_table(&SRAM4_IHC[0], 3, cont4); in Hal_PQ_set_sram_ihc_crd_table()
/utopia/UTPA2-700.0.x/modules/pq/hal/k6/pq/
H A Dmhal_pq.c659 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_sram_ihc_crd_table() local
682 SRAM4_IHC[cont4++] = u32Addr[u16Index]; in Hal_PQ_set_sram_ihc_crd_table()
700 MS_U16 cont1, cont2, cont3, cont4; in Hal_PQ_set_sram_ihc_crd_table()
713 cont1 = cont2 = cont3 = cont4 = 0; in Hal_PQ_set_sram_ihc_crd_table()
743 SRAM4_IHC[cont4]=data; in Hal_PQ_set_sram_ihc_crd_table()
744 cont4 = cont4 < MAX_SRAM_SIZE-1 ? cont4+1 : MAX_SRAM_SIZE-1; in Hal_PQ_set_sram_ihc_crd_table()
771 _Hal_PQ_set_sram_ihc_crd_table(&SRAM4_IHC[0], 3, cont4); in Hal_PQ_set_sram_ihc_crd_table()
/utopia/UTPA2-700.0.x/modules/pq/hal/curry/pq/
H A Dmhal_pq.c659 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_sram_ihc_crd_table() local
682 SRAM4_IHC[cont4++] = u32Addr[u16Index]; in Hal_PQ_set_sram_ihc_crd_table()
700 MS_U16 cont1, cont2, cont3, cont4; in Hal_PQ_set_sram_ihc_crd_table()
713 cont1 = cont2 = cont3 = cont4 = 0; in Hal_PQ_set_sram_ihc_crd_table()
743 SRAM4_IHC[cont4]=data; in Hal_PQ_set_sram_ihc_crd_table()
744 cont4 = cont4 < MAX_SRAM_SIZE-1 ? cont4+1 : MAX_SRAM_SIZE-1; in Hal_PQ_set_sram_ihc_crd_table()
771 _Hal_PQ_set_sram_ihc_crd_table(&SRAM4_IHC[0], 3, cont4); in Hal_PQ_set_sram_ihc_crd_table()
/utopia/UTPA2-700.0.x/modules/pq/hal/M7821/pq/
H A Dmhal_pq.c1029 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_sram_icc_crd_table() local
1061 SRAM4_ICC[cont4] = (u32Addr[u16Index]); in Hal_PQ_set_sram_icc_crd_table()
1063 cont4++; in Hal_PQ_set_sram_icc_crd_table()
1165 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_sram_ihc_crd_table() local
1197 SRAM4_IHC[cont4] = (u32Addr[u16Index]); in Hal_PQ_set_sram_ihc_crd_table()
1199 cont4++; in Hal_PQ_set_sram_ihc_crd_table()
1796 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_UFSC_sram_icc_crd_table() local
1828 UFSC_SRAM4_ICC[cont4] = (u32Addr[u16Index]); in Hal_PQ_set_UFSC_sram_icc_crd_table()
1830 cont4++; in Hal_PQ_set_UFSC_sram_icc_crd_table()
1889 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_UFSC_sram_ihc_crd_table() local
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/utopia/UTPA2-700.0.x/modules/pq/hal/M7621/pq/
H A Dmhal_pq.c1029 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_sram_icc_crd_table() local
1061 SRAM4_ICC[cont4] = (u32Addr[u16Index]); in Hal_PQ_set_sram_icc_crd_table()
1063 cont4++; in Hal_PQ_set_sram_icc_crd_table()
1165 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_sram_ihc_crd_table() local
1197 SRAM4_IHC[cont4] = (u32Addr[u16Index]); in Hal_PQ_set_sram_ihc_crd_table()
1199 cont4++; in Hal_PQ_set_sram_ihc_crd_table()
1796 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_UFSC_sram_icc_crd_table() local
1828 UFSC_SRAM4_ICC[cont4] = (u32Addr[u16Index]); in Hal_PQ_set_UFSC_sram_icc_crd_table()
1830 cont4++; in Hal_PQ_set_UFSC_sram_icc_crd_table()
1889 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_UFSC_sram_ihc_crd_table() local
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/utopia/UTPA2-700.0.x/modules/pq/hal/maserati/pq/
H A Dmhal_pq.c1029 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_sram_icc_crd_table() local
1061 SRAM4_ICC[cont4] = (u32Addr[u16Index]); in Hal_PQ_set_sram_icc_crd_table()
1063 cont4++; in Hal_PQ_set_sram_icc_crd_table()
1165 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_sram_ihc_crd_table() local
1197 SRAM4_IHC[cont4] = (u32Addr[u16Index]); in Hal_PQ_set_sram_ihc_crd_table()
1199 cont4++; in Hal_PQ_set_sram_ihc_crd_table()
1796 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_UFSC_sram_icc_crd_table() local
1828 UFSC_SRAM4_ICC[cont4] = (u32Addr[u16Index]); in Hal_PQ_set_UFSC_sram_icc_crd_table()
1830 cont4++; in Hal_PQ_set_UFSC_sram_icc_crd_table()
1889 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_UFSC_sram_ihc_crd_table() local
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/utopia/UTPA2-700.0.x/modules/pq/hal/maxim/pq/
H A Dmhal_pq.c1029 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_sram_icc_crd_table() local
1061 SRAM4_ICC[cont4] = (u32Addr[u16Index]); in Hal_PQ_set_sram_icc_crd_table()
1063 cont4++; in Hal_PQ_set_sram_icc_crd_table()
1165 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_sram_ihc_crd_table() local
1197 SRAM4_IHC[cont4] = (u32Addr[u16Index]); in Hal_PQ_set_sram_ihc_crd_table()
1199 cont4++; in Hal_PQ_set_sram_ihc_crd_table()
1796 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_UFSC_sram_icc_crd_table() local
1828 UFSC_SRAM4_ICC[cont4] = (u32Addr[u16Index]); in Hal_PQ_set_UFSC_sram_icc_crd_table()
1830 cont4++; in Hal_PQ_set_UFSC_sram_icc_crd_table()
1889 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_UFSC_sram_ihc_crd_table() local
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/utopia/UTPA2-700.0.x/modules/xc/drv/ace/
H A DdrvACE.c954 MS_U16 cont1, cont2, cont3, cont4; in MDrv_XC_ACE_Set_IHC_SRAM() local
968 cont1 = cont2 = cont3 = cont4 = 0; in MDrv_XC_ACE_Set_IHC_SRAM()
998 SRAM4_IHC[cont4]=data; in MDrv_XC_ACE_Set_IHC_SRAM()
999 cont4 = cont4 < MAX_SRAM_SIZE-1 ? cont4+1 : MAX_SRAM_SIZE-1; in MDrv_XC_ACE_Set_IHC_SRAM()
1025 Hal_ACE_Set_IHC_SRAM(pInstance, &SRAM4_IHC[0], 3, cont4); in MDrv_XC_ACE_Set_IHC_SRAM()
/utopia/UTPA2-700.0.x/modules/pq/hal/mooney/pq/
H A Dmhal_pq.c846 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_sram_ihc_crd_table() local
878 SRAM4_IHC[cont4] = (u32Addr[u16Index]); in Hal_PQ_set_sram_ihc_crd_table()
880 cont4++; in Hal_PQ_set_sram_ihc_crd_table()