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Searched refs:XC_DBGLEVEL_SETTIMING_ISR (Results 1 – 7 of 7) sorted by relevance

/utopia/UTPA2-700.0.x/modules/xc/drv/xc/
H A Dmdrv_sc_display.c4751 XC_LOG_TRACE(XC_DBGLEVEL_SETTIMING_ISR,"ISR pParam is NULL\n"); in _MApi_XC_FPLL_FSM_ISR()
4776 XC_LOG_TRACE(XC_DBGLEVEL_SETTIMING_ISR, "[FPLL INIT->PRD]\n") in _MApi_XC_FPLL_FSM_ISR()
4865 XC_LOG_TRACE(XC_DBGLEVEL_SETTIMING_ISR, "[WAIT IP STABLE] -> [WAIT LPLL OFS]\n") in _MApi_XC_FPLL_FSM_ISR()
4942 … XC_LOG_TRACE(XC_DBGLEVEL_SETTIMING_ISR, "Phase offs go into limit~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n") in _MApi_XC_FPLL_FSM_ISR()
4943 XC_LOG_TRACE(XC_DBGLEVEL_SETTIMING_ISR, "[WAIT LPLL OFS] -> [VD LOCKED]\n") in _MApi_XC_FPLL_FSM_ISR()
4950 …XC_LOG_TRACE(XC_DBGLEVEL_SETTIMING_ISR, "===> Phase Diff=0x%tx, Limit=0x%x\n", (ptrdiff_t)u32Ofs, … in _MApi_XC_FPLL_FSM_ISR()
4959 … XC_LOG_TRACE(XC_DBGLEVEL_SETTIMING_ISR, "Phase offs go into limit~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n") in _MApi_XC_FPLL_FSM_ISR()
4960 XC_LOG_TRACE(XC_DBGLEVEL_SETTIMING_ISR, "[WAIT LPLL OFS] -> [VD LOCKED]\n") in _MApi_XC_FPLL_FSM_ISR()
4967 …XC_LOG_TRACE(XC_DBGLEVEL_SETTIMING_ISR, "===> Phase Diff=0x%tx, Limit=0x%x\n", (ptrdiff_t)u32Ofs, … in _MApi_XC_FPLL_FSM_ISR()
4974 … XC_LOG_TRACE(XC_DBGLEVEL_SETTIMING_ISR, "Phase offs go into limit~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n") in _MApi_XC_FPLL_FSM_ISR()
[all …]
H A Dmdrv_sc_display.c.04749 XC_LOG_TRACE(XC_DBGLEVEL_SETTIMING_ISR,"ISR pParam is NULL\n");
4774 XC_LOG_TRACE(XC_DBGLEVEL_SETTIMING_ISR, "[FPLL INIT->PRD]\n")
4863 XC_LOG_TRACE(XC_DBGLEVEL_SETTIMING_ISR, "[WAIT IP STABLE] -> [WAIT LPLL OFS]\n")
4940 … XC_LOG_TRACE(XC_DBGLEVEL_SETTIMING_ISR, "Phase offs go into limit~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n")
4941 XC_LOG_TRACE(XC_DBGLEVEL_SETTIMING_ISR, "[WAIT LPLL OFS] -> [VD LOCKED]\n")
4948 …XC_LOG_TRACE(XC_DBGLEVEL_SETTIMING_ISR, "===> Phase Diff=0x%tx, Limit=0x%x\n", (ptrdiff_t)u32Ofs, …
4957 … XC_LOG_TRACE(XC_DBGLEVEL_SETTIMING_ISR, "Phase offs go into limit~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n")
4958 XC_LOG_TRACE(XC_DBGLEVEL_SETTIMING_ISR, "[WAIT LPLL OFS] -> [VD LOCKED]\n")
4965 …XC_LOG_TRACE(XC_DBGLEVEL_SETTIMING_ISR, "===> Phase Diff=0x%tx, Limit=0x%x\n", (ptrdiff_t)u32Ofs, …
4972 … XC_LOG_TRACE(XC_DBGLEVEL_SETTIMING_ISR, "Phase offs go into limit~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n")
[all …]
H A Dmvideo_context.c1770 else if (u16LogSwitch & XC_DBGLEVEL_SETTIMING_ISR) in MDrv_XC_ShowTrace_Header()
/utopia/UTPA2-700.0.x/modules/xc/drv/xc/include/
H A Dmvideo_context.h232 else if (_dbgSwitch_ & XC_DBGLEVEL_SETTIMING_ISR) \
/utopia/UTPA2-700.0.x/projects/tmplib/include/
H A DapiXC.h326 #define XC_DBGLEVEL_SETTIMING_ISR (0x0100) ///< ISR / SetPanelTiming macro
/utopia/UTPA2-700.0.x/mxlib/include/
H A DapiXC.h347 #define XC_DBGLEVEL_SETTIMING_ISR (0x0100) ///< ISR / SetPanelTiming macro
/utopia/UTPA2-700.0.x/projects/build/
H A Dpreprocess.txt356 #define XC_DBGLEVEL_SETTIMING_ISR (0x0100)