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Searched refs:UART_LCR_DLAB (Results 1 – 25 of 48) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/uart/hal/k6lite/uart/
H A DhalUART.c743 AEON_REG8(UART_LCR) |= UART_LCR_DLAB; in HAL_UART_Aeon_Set_Baudrate()
746 AEON_REG8(UART_LCR) &= ~(UART_LCR_DLAB); in HAL_UART_Aeon_Set_Baudrate()
1200 UART_REG8(UART_LCR) |= UART_LCR_DLAB; in HAL_UART_PIU_Set_Baudrate()
1203 UART_REG8(UART_LCR) &= ~(UART_LCR_DLAB); in HAL_UART_PIU_Set_Baudrate()
/utopia/UTPA2-700.0.x/modules/uart/hal/curry/uart/
H A DhalUART.c743 AEON_REG8(UART_LCR) |= UART_LCR_DLAB; in HAL_UART_Aeon_Set_Baudrate()
746 AEON_REG8(UART_LCR) &= ~(UART_LCR_DLAB); in HAL_UART_Aeon_Set_Baudrate()
1170 UART_REG8(UART_LCR) |= UART_LCR_DLAB; in HAL_UART_PIU_Set_Baudrate()
1173 UART_REG8(UART_LCR) &= ~(UART_LCR_DLAB); in HAL_UART_PIU_Set_Baudrate()
H A DregUART.h243 #define UART_LCR_DLAB 0x80 // Divisor latch access bit macro
/utopia/UTPA2-700.0.x/modules/uart/hal/kano/uart/
H A DhalUART.c743 AEON_REG8(UART_LCR) |= UART_LCR_DLAB; in HAL_UART_Aeon_Set_Baudrate()
746 AEON_REG8(UART_LCR) &= ~(UART_LCR_DLAB); in HAL_UART_Aeon_Set_Baudrate()
1170 UART_REG8(UART_LCR) |= UART_LCR_DLAB; in HAL_UART_PIU_Set_Baudrate()
1173 UART_REG8(UART_LCR) &= ~(UART_LCR_DLAB); in HAL_UART_PIU_Set_Baudrate()
H A DregUART.h243 #define UART_LCR_DLAB 0x80 // Divisor latch access bit macro
/utopia/UTPA2-700.0.x/modules/uart/hal/k6/uart/
H A DhalUART.c743 AEON_REG8(UART_LCR) |= UART_LCR_DLAB; in HAL_UART_Aeon_Set_Baudrate()
746 AEON_REG8(UART_LCR) &= ~(UART_LCR_DLAB); in HAL_UART_Aeon_Set_Baudrate()
1219 UART_REG8(UART_LCR) |= UART_LCR_DLAB; in HAL_UART_PIU_Set_Baudrate()
1222 UART_REG8(UART_LCR) &= ~(UART_LCR_DLAB); in HAL_UART_PIU_Set_Baudrate()
/utopia/UTPA2-700.0.x/modules/uart/hal/mooney/uart/
H A DhalUART.c764 AEON_REG8(UART_LCR) |= UART_LCR_DLAB; in HAL_UART_Aeon_Set_Baudrate()
767 AEON_REG8(UART_LCR) &= ~(UART_LCR_DLAB); in HAL_UART_Aeon_Set_Baudrate()
1189 UART_REG8(UART_LCR) |= UART_LCR_DLAB; in HAL_UART_PIU_Set_Baudrate()
1192 UART_REG8(UART_LCR) &= ~(UART_LCR_DLAB); in HAL_UART_PIU_Set_Baudrate()
H A DregUART.h242 #define UART_LCR_DLAB 0x80 // Divisor latch access bit macro
/utopia/UTPA2-700.0.x/modules/uart/hal/mustang/uart/
H A DhalUART.c760 AEON_REG8(UART_LCR) |= UART_LCR_DLAB; in HAL_UART_Aeon_Set_Baudrate()
763 AEON_REG8(UART_LCR) &= ~(UART_LCR_DLAB); in HAL_UART_Aeon_Set_Baudrate()
1198 UART_REG8(UART_LCR) |= UART_LCR_DLAB; in HAL_UART_PIU_Set_Baudrate()
1203 UART_REG8(UART_LCR) &= ~(UART_LCR_DLAB); in HAL_UART_PIU_Set_Baudrate()
H A DregUART.h249 #define UART_LCR_DLAB 0x80 // Divisor latch access bit macro
/utopia/UTPA2-700.0.x/modules/uart/hal/maldives/uart/
H A DhalUART.c760 AEON_REG8(UART_LCR) |= UART_LCR_DLAB; in HAL_UART_Aeon_Set_Baudrate()
763 AEON_REG8(UART_LCR) &= ~(UART_LCR_DLAB); in HAL_UART_Aeon_Set_Baudrate()
1198 UART_REG8(UART_LCR) |= UART_LCR_DLAB; in HAL_UART_PIU_Set_Baudrate()
1203 UART_REG8(UART_LCR) &= ~(UART_LCR_DLAB); in HAL_UART_PIU_Set_Baudrate()
H A DregUART.h244 #define UART_LCR_DLAB 0x80 // Divisor latch access bit macro
/utopia/UTPA2-700.0.x/modules/uart/hal/macan/uart/
H A DhalUART.c789 AEON_REG8(UART_LCR) |= UART_LCR_DLAB; in HAL_UART_Aeon_Set_Baudrate()
792 AEON_REG8(UART_LCR) &= ~(UART_LCR_DLAB); in HAL_UART_Aeon_Set_Baudrate()
1217 UART_REG8(UART_LCR) |= UART_LCR_DLAB; in HAL_UART_PIU_Set_Baudrate()
1220 UART_REG8(UART_LCR) &= ~(UART_LCR_DLAB); in HAL_UART_PIU_Set_Baudrate()
H A DregUART.h264 #define UART_LCR_DLAB 0x80 // Divisor latch access bit macro
/utopia/UTPA2-700.0.x/modules/uart/hal/messi/uart/
H A DhalUART.c788 AEON_REG8(UART_LCR) |= UART_LCR_DLAB; in HAL_UART_Aeon_Set_Baudrate()
791 AEON_REG8(UART_LCR) &= ~(UART_LCR_DLAB); in HAL_UART_Aeon_Set_Baudrate()
1216 UART_REG8(UART_LCR) |= UART_LCR_DLAB; in HAL_UART_PIU_Set_Baudrate()
1219 UART_REG8(UART_LCR) &= ~(UART_LCR_DLAB); in HAL_UART_PIU_Set_Baudrate()
H A DregUART.h242 #define UART_LCR_DLAB 0x80 // Divisor latch access bit macro
/utopia/UTPA2-700.0.x/modules/uart/hal/M7621/uart/
H A DhalUART.c792 AEON_REG8(UART_LCR) |= UART_LCR_DLAB; in HAL_UART_Aeon_Set_Baudrate()
795 AEON_REG8(UART_LCR) &= ~(UART_LCR_DLAB); in HAL_UART_Aeon_Set_Baudrate()
1271 UART_REG8(UART_LCR) |= UART_LCR_DLAB; in HAL_UART_PIU_Set_Baudrate()
1274 UART_REG8(UART_LCR) &= ~(UART_LCR_DLAB); in HAL_UART_PIU_Set_Baudrate()
/utopia/UTPA2-700.0.x/modules/uart/hal/maserati/uart/
H A DhalUART.c792 AEON_REG8(UART_LCR) |= UART_LCR_DLAB; in HAL_UART_Aeon_Set_Baudrate()
795 AEON_REG8(UART_LCR) &= ~(UART_LCR_DLAB); in HAL_UART_Aeon_Set_Baudrate()
1271 UART_REG8(UART_LCR) |= UART_LCR_DLAB; in HAL_UART_PIU_Set_Baudrate()
1274 UART_REG8(UART_LCR) &= ~(UART_LCR_DLAB); in HAL_UART_PIU_Set_Baudrate()
/utopia/UTPA2-700.0.x/modules/uart/hal/maxim/uart/
H A DhalUART.c792 AEON_REG8(UART_LCR) |= UART_LCR_DLAB; in HAL_UART_Aeon_Set_Baudrate()
795 AEON_REG8(UART_LCR) &= ~(UART_LCR_DLAB); in HAL_UART_Aeon_Set_Baudrate()
1271 UART_REG8(UART_LCR) |= UART_LCR_DLAB; in HAL_UART_PIU_Set_Baudrate()
1274 UART_REG8(UART_LCR) &= ~(UART_LCR_DLAB); in HAL_UART_PIU_Set_Baudrate()
/utopia/UTPA2-700.0.x/modules/sc/hal/k6/sc/
H A DhalSC.c184 SC_OR(u8SCID,UART_LCR, UART_LCR_DLAB); in _HAL_SC_GetLsr()
186 SC_AND(u8SCID,UART_LCR, ~(UART_LCR_DLAB)); in _HAL_SC_GetLsr()
896 …SC_OR(u8SCID,UART_LCR, UART_LCR_DLAB); // Line Control Register in HAL_SC_SetUartDiv()
899 SC_AND(u8SCID,UART_LCR, ~(UART_LCR_DLAB)); // Line Control Register in HAL_SC_SetUartDiv()
/utopia/UTPA2-700.0.x/modules/uart/hal/manhattan/uart/
H A DhalUART.c791 AEON_REG8(UART_LCR) |= UART_LCR_DLAB; in HAL_UART_Aeon_Set_Baudrate()
794 AEON_REG8(UART_LCR) &= ~(UART_LCR_DLAB); in HAL_UART_Aeon_Set_Baudrate()
1270 UART_REG8(UART_LCR) |= UART_LCR_DLAB; in HAL_UART_PIU_Set_Baudrate()
1273 UART_REG8(UART_LCR) &= ~(UART_LCR_DLAB); in HAL_UART_PIU_Set_Baudrate()
/utopia/UTPA2-700.0.x/modules/uart/hal/M7821/uart/
H A DhalUART.c792 AEON_REG8(UART_LCR) |= UART_LCR_DLAB; in HAL_UART_Aeon_Set_Baudrate()
795 AEON_REG8(UART_LCR) &= ~(UART_LCR_DLAB); in HAL_UART_Aeon_Set_Baudrate()
1274 UART_REG8(UART_LCR) |= UART_LCR_DLAB; in HAL_UART_PIU_Set_Baudrate()
1277 UART_REG8(UART_LCR) &= ~(UART_LCR_DLAB); in HAL_UART_PIU_Set_Baudrate()
/utopia/UTPA2-700.0.x/modules/uart/hal/mainz/uart/
H A DhalUART.c834 AEON_REG8(UART_LCR) |= UART_LCR_DLAB; in HAL_UART_Aeon_Set_Baudrate()
837 AEON_REG8(UART_LCR) &= ~(UART_LCR_DLAB); in HAL_UART_Aeon_Set_Baudrate()
1262 UART_REG8(UART_LCR) |= UART_LCR_DLAB; in HAL_UART_PIU_Set_Baudrate()
1265 UART_REG8(UART_LCR) &= ~(UART_LCR_DLAB); in HAL_UART_PIU_Set_Baudrate()
/utopia/UTPA2-700.0.x/modules/sc/hal/k6lite/sc/
H A DhalSC.c887 …SC_OR(u8SCID,UART_LCR, UART_LCR_DLAB); // Line Control Register in HAL_SC_SetUartDiv()
890 SC_AND(u8SCID,UART_LCR, ~(UART_LCR_DLAB)); // Line Control Register in HAL_SC_SetUartDiv()
/utopia/UTPA2-700.0.x/projects/tools/lint/mips-linux-gnu_include/linux/
H A Dserial_reg.h91 #define UART_LCR_DLAB 0x80 /* Divisor latch access bit */ macro

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