Home
last modified time | relevance | path

Searched refs:REG_TC_SC_OP1_BK20_1A_L (Results 1 – 23 of 23) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c184 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
719 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
1250 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
1785 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
2316 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
2847 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
3378 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
3913 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
4448 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
4980 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c176 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
705 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
1230 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
1759 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
2284 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
2809 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
3334 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
3863 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
4392 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
4917 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c184 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
719 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
1250 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
1785 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
2316 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
2847 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
3378 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
3913 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
4448 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
4979 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c180 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
694 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
1204 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
1718 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
2228 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
2738 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
3248 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
3762 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
4276 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
4786 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h4994 #define REG_TC_SC_OP1_BK20_1A_L _PK_L_(0x20, 0x1A) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c180 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
694 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
1204 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
1718 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
2228 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
2738 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
3248 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
3762 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
4276 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
4786 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h4994 #define REG_TC_SC_OP1_BK20_1A_L _PK_L_(0x20, 0x1A) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c176 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
705 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
1230 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
1759 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
2284 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
2809 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
3334 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
3863 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
4392 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
4917 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c180 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
694 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
1204 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
1718 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
2228 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
2738 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
3248 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
3762 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
4276 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
4786 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h4994 #define REG_TC_SC_OP1_BK20_1A_L _PK_L_(0x20, 0x1A) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c180 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
694 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
1204 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
1718 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
2228 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
2738 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
3248 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
3762 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
4276 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
4786 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1A_L), 0xFF, 0x13/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h4994 #define REG_TC_SC_OP1_BK20_1A_L _PK_L_(0x20, 0x1A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dmdrv_dac_tbl.h1826 #define REG_TC_SC_OP1_BK20_1A_L _PK_L_(0x20, 0x1A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dmdrv_dac_tbl.h1826 #define REG_TC_SC_OP1_BK20_1A_L _PK_L_(0x20, 0x1A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dmdrv_dac_tbl.h1826 #define REG_TC_SC_OP1_BK20_1A_L _PK_L_(0x20, 0x1A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dmdrv_dac_tbl.h1826 #define REG_TC_SC_OP1_BK20_1A_L _PK_L_(0x20, 0x1A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dmdrv_dac_tbl.h1826 #define REG_TC_SC_OP1_BK20_1A_L _PK_L_(0x20, 0x1A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dmdrv_dac_tbl.h1826 #define REG_TC_SC_OP1_BK20_1A_L _PK_L_(0x20, 0x1A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dmdrv_dac_tbl.h1826 #define REG_TC_SC_OP1_BK20_1A_L _PK_L_(0x20, 0x1A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dmdrv_dac_tbl.h1826 #define REG_TC_SC_OP1_BK20_1A_L _PK_L_(0x20, 0x1A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dmdrv_dac_tbl.h1826 #define REG_TC_SC_OP1_BK20_1A_L _PK_L_(0x20, 0x1A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dmdrv_dac_tbl.h1826 #define REG_TC_SC_OP1_BK20_1A_L _PK_L_(0x20, 0x1A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dmdrv_dac_tbl.h1826 #define REG_TC_SC_OP1_BK20_1A_L _PK_L_(0x20, 0x1A) macro