Home
last modified time | relevance | path

Searched refs:REG_TC_LPLL_07_L (Results 1 – 25 of 38) sorted by relevance

12

/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c9181 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
9729 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
10277 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
10825 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
11373 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
11921 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
12467 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
13013 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
13559 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
14105 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c9078 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
9620 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
10162 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
10704 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
11246 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
11788 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
12328 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
12868 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
13408 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
13948 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c9180 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
9728 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
10276 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
10824 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
11372 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
11920 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
12466 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
13012 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
13558 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
14104 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c8747 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
9272 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
9797 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
10322 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
10847 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
11372 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
11897 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
12422 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
12947 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
13472 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c8747 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
9272 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
9797 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
10322 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
10847 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
11372 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
11897 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
12422 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
12947 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
13472 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c9078 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
9620 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
10162 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
10704 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
11246 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
11788 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
12328 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
12868 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
13408 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
13948 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c8747 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
9272 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
9797 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
10322 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
10847 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
11372 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
11897 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
12422 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
12947 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
13472 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c8747 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
9272 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
9797 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
10322 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
10847 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
11372 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
11897 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
12422 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
12947 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
13472 { DRV_DAC_REG(REG_TC_LPLL_07_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dpnl_tcon_tbl.h1156 #define REG_TC_LPLL_07_L (REG_TC_LPLL_BASE + 0x0E) macro
H A Dmdrv_dac_tbl.h1274 #define REG_TC_LPLL_07_L (REG_TC_LPLL_BASE + 0x0E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/pnl/
H A Dpnl_tcon_tbl.h1154 #define REG_TC_LPLL_07_L (REG_TC_LPLL_BASE + 0x0E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dpnl_tcon_tbl.h1156 #define REG_TC_LPLL_07_L (REG_TC_LPLL_BASE + 0x0E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/pnl/
H A Dpnl_tcon_tbl.h1154 #define REG_TC_LPLL_07_L (REG_TC_LPLL_BASE + 0x0E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dpnl_tcon_tbl.h1156 #define REG_TC_LPLL_07_L (REG_TC_LPLL_BASE + 0x0E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/pnl/
H A Dpnl_tcon_tbl.h1154 #define REG_TC_LPLL_07_L (REG_TC_LPLL_BASE + 0x0E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dpnl_tcon_tbl.h1156 #define REG_TC_LPLL_07_L (REG_TC_LPLL_BASE + 0x0E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dpnl_tcon_tbl.h1156 #define REG_TC_LPLL_07_L (REG_TC_LPLL_BASE + 0x0E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dpnl_tcon_tbl.h1156 #define REG_TC_LPLL_07_L (REG_TC_LPLL_BASE + 0x0E) macro
H A Dmdrv_dac_tbl.h1274 #define REG_TC_LPLL_07_L (REG_TC_LPLL_BASE + 0x0E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dpnl_tcon_tbl.h1156 #define REG_TC_LPLL_07_L (REG_TC_LPLL_BASE + 0x0E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dpnl_tcon_tbl.h1156 #define REG_TC_LPLL_07_L (REG_TC_LPLL_BASE + 0x0E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dpnl_tcon_tbl.h1156 #define REG_TC_LPLL_07_L (REG_TC_LPLL_BASE + 0x0E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dpnl_tcon_tbl.h1156 #define REG_TC_LPLL_07_L (REG_TC_LPLL_BASE + 0x0E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/pnl/
H A Dpnl_tcon_tbl.h1154 #define REG_TC_LPLL_07_L (REG_TC_LPLL_BASE + 0x0E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dpnl_tcon_tbl.h1156 #define REG_TC_LPLL_07_L (REG_TC_LPLL_BASE + 0x0E) macro

12