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Searched refs:REG_TC_LPLL_06_L (Results 1 – 25 of 38) sorted by relevance

12

/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c9179 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
9727 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
10275 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
10823 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
11371 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
11919 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
12465 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
13011 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
13557 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
14103 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c9076 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
9618 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
10160 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
10702 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
11244 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
11786 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
12326 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
12866 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
13406 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
13946 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c9178 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
9726 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
10274 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
10822 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
11370 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
11918 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
12464 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
13010 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
13556 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
14102 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c8745 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
9270 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
9795 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
10320 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
10845 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
11370 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
11895 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
12420 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
12945 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
13470 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c8745 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
9270 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
9795 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
10320 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
10845 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
11370 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
11895 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
12420 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
12945 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
13470 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c9076 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
9618 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
10160 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
10702 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
11244 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
11786 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
12326 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
12866 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
13406 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
13946 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c8745 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
9270 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
9795 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
10320 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
10845 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
11370 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
11895 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
12420 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
12945 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
13470 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c8745 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
9270 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
9795 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
10320 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
10845 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
11370 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
11895 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
12420 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
12945 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
13470 { DRV_DAC_REG(REG_TC_LPLL_06_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dpnl_tcon_tbl.h1154 #define REG_TC_LPLL_06_L (REG_TC_LPLL_BASE + 0x0C) macro
H A Dmdrv_dac_tbl.h1272 #define REG_TC_LPLL_06_L (REG_TC_LPLL_BASE + 0x0C) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/pnl/
H A Dpnl_tcon_tbl.h1152 #define REG_TC_LPLL_06_L (REG_TC_LPLL_BASE + 0x0C) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dpnl_tcon_tbl.h1154 #define REG_TC_LPLL_06_L (REG_TC_LPLL_BASE + 0x0C) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/pnl/
H A Dpnl_tcon_tbl.h1152 #define REG_TC_LPLL_06_L (REG_TC_LPLL_BASE + 0x0C) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dpnl_tcon_tbl.h1154 #define REG_TC_LPLL_06_L (REG_TC_LPLL_BASE + 0x0C) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/pnl/
H A Dpnl_tcon_tbl.h1152 #define REG_TC_LPLL_06_L (REG_TC_LPLL_BASE + 0x0C) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dpnl_tcon_tbl.h1154 #define REG_TC_LPLL_06_L (REG_TC_LPLL_BASE + 0x0C) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dpnl_tcon_tbl.h1154 #define REG_TC_LPLL_06_L (REG_TC_LPLL_BASE + 0x0C) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dpnl_tcon_tbl.h1154 #define REG_TC_LPLL_06_L (REG_TC_LPLL_BASE + 0x0C) macro
H A Dmdrv_dac_tbl.h1272 #define REG_TC_LPLL_06_L (REG_TC_LPLL_BASE + 0x0C) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dpnl_tcon_tbl.h1154 #define REG_TC_LPLL_06_L (REG_TC_LPLL_BASE + 0x0C) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dpnl_tcon_tbl.h1154 #define REG_TC_LPLL_06_L (REG_TC_LPLL_BASE + 0x0C) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dpnl_tcon_tbl.h1154 #define REG_TC_LPLL_06_L (REG_TC_LPLL_BASE + 0x0C) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dpnl_tcon_tbl.h1154 #define REG_TC_LPLL_06_L (REG_TC_LPLL_BASE + 0x0C) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/pnl/
H A Dpnl_tcon_tbl.h1152 #define REG_TC_LPLL_06_L (REG_TC_LPLL_BASE + 0x0C) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dpnl_tcon_tbl.h1154 #define REG_TC_LPLL_06_L (REG_TC_LPLL_BASE + 0x0C) macro

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