Home
last modified time | relevance | path

Searched refs:REG_TC_HDGEN_BK1_65_L (Results 1 – 23 of 23) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c415 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xd0/*ALL*/, },
946 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xd0/*ALL*/, },
1481 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xd0/*ALL*/, },
2012 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xd0/*ALL*/, },
2543 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xdc/*ALL*/, },
3074 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xdc/*ALL*/, },
3609 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xdc/*ALL*/, },
4144 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xdc/*ALL*/, },
4675 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xd0/*ALL*/, },
5207 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xd0/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c407 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xd0/*ALL*/, },
932 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xd0/*ALL*/, },
1461 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xd0/*ALL*/, },
1986 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xd0/*ALL*/, },
2511 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xdc/*ALL*/, },
3036 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xdc/*ALL*/, },
3565 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xdc/*ALL*/, },
4094 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xdc/*ALL*/, },
4619 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xd0/*ALL*/, },
5144 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xd0/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c415 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xd0/*ALL*/, },
946 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xd0/*ALL*/, },
1481 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xd0/*ALL*/, },
2012 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xd0/*ALL*/, },
2543 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xdc/*ALL*/, },
3074 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xdc/*ALL*/, },
3609 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xdc/*ALL*/, },
4144 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xdc/*ALL*/, },
4675 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xd0/*ALL*/, },
5206 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xd0/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c410 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xd0/*ALL*/, },
920 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xd0/*ALL*/, },
1434 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xd0/*ALL*/, },
1944 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xd0/*ALL*/, },
2454 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xdc/*ALL*/, },
2964 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xdc/*ALL*/, },
3478 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xdc/*ALL*/, },
3992 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xdc/*ALL*/, },
4502 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xd0/*ALL*/, },
5012 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xd0/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6943 #define REG_TC_HDGEN_BK1_65_L _PK_L_(0x1, 0x65) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c410 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xd0/*ALL*/, },
920 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xd0/*ALL*/, },
1434 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xd0/*ALL*/, },
1944 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xd0/*ALL*/, },
2454 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xdc/*ALL*/, },
2964 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xdc/*ALL*/, },
3478 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xdc/*ALL*/, },
3992 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xdc/*ALL*/, },
4502 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xd0/*ALL*/, },
5012 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xd0/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6943 #define REG_TC_HDGEN_BK1_65_L _PK_L_(0x1, 0x65) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c407 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xd0/*ALL*/, },
932 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xd0/*ALL*/, },
1461 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xd0/*ALL*/, },
1986 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xd0/*ALL*/, },
2511 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xdc/*ALL*/, },
3036 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xdc/*ALL*/, },
3565 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xdc/*ALL*/, },
4094 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xdc/*ALL*/, },
4619 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xd0/*ALL*/, },
5144 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xd0/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c410 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xd0/*ALL*/, },
920 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xd0/*ALL*/, },
1434 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xd0/*ALL*/, },
1944 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xd0/*ALL*/, },
2454 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xdc/*ALL*/, },
2964 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xdc/*ALL*/, },
3478 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xdc/*ALL*/, },
3992 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xdc/*ALL*/, },
4502 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xd0/*ALL*/, },
5012 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xd0/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6943 #define REG_TC_HDGEN_BK1_65_L _PK_L_(0x1, 0x65) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c410 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xd0/*ALL*/, },
920 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xd0/*ALL*/, },
1434 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xd0/*ALL*/, },
1944 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xd0/*ALL*/, },
2454 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xdc/*ALL*/, },
2964 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xdc/*ALL*/, },
3478 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xdc/*ALL*/, },
3992 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xdc/*ALL*/, },
4502 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xd0/*ALL*/, },
5012 { DRV_DAC_REG(REG_TC_HDGEN_BK1_65_L), 0xFF, 0xd0/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6943 #define REG_TC_HDGEN_BK1_65_L _PK_L_(0x1, 0x65) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dmdrv_dac_tbl.h3261 #define REG_TC_HDGEN_BK1_65_L _PK_L_(0x1, 0x65) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dmdrv_dac_tbl.h3261 #define REG_TC_HDGEN_BK1_65_L _PK_L_(0x1, 0x65) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dmdrv_dac_tbl.h3261 #define REG_TC_HDGEN_BK1_65_L _PK_L_(0x1, 0x65) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dmdrv_dac_tbl.h3261 #define REG_TC_HDGEN_BK1_65_L _PK_L_(0x1, 0x65) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dmdrv_dac_tbl.h3261 #define REG_TC_HDGEN_BK1_65_L _PK_L_(0x1, 0x65) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dmdrv_dac_tbl.h3261 #define REG_TC_HDGEN_BK1_65_L _PK_L_(0x1, 0x65) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dmdrv_dac_tbl.h3261 #define REG_TC_HDGEN_BK1_65_L _PK_L_(0x1, 0x65) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dmdrv_dac_tbl.h3261 #define REG_TC_HDGEN_BK1_65_L _PK_L_(0x1, 0x65) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dmdrv_dac_tbl.h3261 #define REG_TC_HDGEN_BK1_65_L _PK_L_(0x1, 0x65) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dmdrv_dac_tbl.h3261 #define REG_TC_HDGEN_BK1_65_L _PK_L_(0x1, 0x65) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dmdrv_dac_tbl.h3261 #define REG_TC_HDGEN_BK1_65_L _PK_L_(0x1, 0x65) macro