Home
last modified time | relevance | path

Searched refs:REG_TC_HDGEN_BK1_62_H (Results 1 – 23 of 23) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c410 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x01/*ALL*/, },
941 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x01/*ALL*/, },
1476 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x01/*ALL*/, },
2007 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x01/*ALL*/, },
2538 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x00/*ALL*/, },
3069 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x00/*ALL*/, },
3604 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x00/*ALL*/, },
4139 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x00/*ALL*/, },
4670 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x01/*ALL*/, },
5202 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x01/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c402 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x01/*ALL*/, },
927 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x01/*ALL*/, },
1456 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x01/*ALL*/, },
1981 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x01/*ALL*/, },
2506 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x00/*ALL*/, },
3031 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x00/*ALL*/, },
3560 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x00/*ALL*/, },
4089 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x00/*ALL*/, },
4614 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x01/*ALL*/, },
5139 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x01/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c410 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x01/*ALL*/, },
941 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x01/*ALL*/, },
1476 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x01/*ALL*/, },
2007 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x01/*ALL*/, },
2538 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x00/*ALL*/, },
3069 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x00/*ALL*/, },
3604 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x00/*ALL*/, },
4139 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x00/*ALL*/, },
4670 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x01/*ALL*/, },
5201 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x01/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c405 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x01/*ALL*/, },
915 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x01/*ALL*/, },
1429 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x01/*ALL*/, },
1939 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x01/*ALL*/, },
2449 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x00/*ALL*/, },
2959 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x00/*ALL*/, },
3473 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x00/*ALL*/, },
3987 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x00/*ALL*/, },
4497 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x01/*ALL*/, },
5007 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x01/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6938 #define REG_TC_HDGEN_BK1_62_H _PK_H_(0x1, 0x62) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c405 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x01/*ALL*/, },
915 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x01/*ALL*/, },
1429 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x01/*ALL*/, },
1939 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x01/*ALL*/, },
2449 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x00/*ALL*/, },
2959 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x00/*ALL*/, },
3473 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x00/*ALL*/, },
3987 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x00/*ALL*/, },
4497 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x01/*ALL*/, },
5007 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x01/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6938 #define REG_TC_HDGEN_BK1_62_H _PK_H_(0x1, 0x62) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c402 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x01/*ALL*/, },
927 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x01/*ALL*/, },
1456 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x01/*ALL*/, },
1981 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x01/*ALL*/, },
2506 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x00/*ALL*/, },
3031 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x00/*ALL*/, },
3560 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x00/*ALL*/, },
4089 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x00/*ALL*/, },
4614 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x01/*ALL*/, },
5139 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x01/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c405 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x01/*ALL*/, },
915 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x01/*ALL*/, },
1429 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x01/*ALL*/, },
1939 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x01/*ALL*/, },
2449 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x00/*ALL*/, },
2959 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x00/*ALL*/, },
3473 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x00/*ALL*/, },
3987 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x00/*ALL*/, },
4497 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x01/*ALL*/, },
5007 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x01/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6938 #define REG_TC_HDGEN_BK1_62_H _PK_H_(0x1, 0x62) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c405 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x01/*ALL*/, },
915 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x01/*ALL*/, },
1429 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x01/*ALL*/, },
1939 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x01/*ALL*/, },
2449 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x00/*ALL*/, },
2959 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x00/*ALL*/, },
3473 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x00/*ALL*/, },
3987 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x00/*ALL*/, },
4497 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x01/*ALL*/, },
5007 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_H), 0xFF, 0x01/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6938 #define REG_TC_HDGEN_BK1_62_H _PK_H_(0x1, 0x62) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dmdrv_dac_tbl.h3256 #define REG_TC_HDGEN_BK1_62_H _PK_H_(0x1, 0x62) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dmdrv_dac_tbl.h3256 #define REG_TC_HDGEN_BK1_62_H _PK_H_(0x1, 0x62) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dmdrv_dac_tbl.h3256 #define REG_TC_HDGEN_BK1_62_H _PK_H_(0x1, 0x62) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dmdrv_dac_tbl.h3256 #define REG_TC_HDGEN_BK1_62_H _PK_H_(0x1, 0x62) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dmdrv_dac_tbl.h3256 #define REG_TC_HDGEN_BK1_62_H _PK_H_(0x1, 0x62) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dmdrv_dac_tbl.h3256 #define REG_TC_HDGEN_BK1_62_H _PK_H_(0x1, 0x62) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dmdrv_dac_tbl.h3256 #define REG_TC_HDGEN_BK1_62_H _PK_H_(0x1, 0x62) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dmdrv_dac_tbl.h3256 #define REG_TC_HDGEN_BK1_62_H _PK_H_(0x1, 0x62) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dmdrv_dac_tbl.h3256 #define REG_TC_HDGEN_BK1_62_H _PK_H_(0x1, 0x62) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dmdrv_dac_tbl.h3256 #define REG_TC_HDGEN_BK1_62_H _PK_H_(0x1, 0x62) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dmdrv_dac_tbl.h3256 #define REG_TC_HDGEN_BK1_62_H _PK_H_(0x1, 0x62) macro