Home
last modified time | relevance | path

Searched refs:REG_TC_HDGEN_BK1_59_H (Results 1 – 23 of 23) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c392 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
923 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
1458 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
1989 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
2520 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
3051 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
3586 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
4121 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
4652 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
5184 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c384 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
909 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
1438 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
1963 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
2488 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
3013 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
3542 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
4071 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
4596 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
5121 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c392 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
923 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
1458 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
1989 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
2520 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
3051 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
3586 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
4121 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
4652 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
5183 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c387 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
897 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
1411 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
1921 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
2431 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
2941 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
3455 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
3969 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
4479 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
4989 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6920 #define REG_TC_HDGEN_BK1_59_H _PK_H_(0x1, 0x59) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c387 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
897 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
1411 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
1921 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
2431 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
2941 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
3455 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
3969 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
4479 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
4989 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6920 #define REG_TC_HDGEN_BK1_59_H _PK_H_(0x1, 0x59) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c384 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
909 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
1438 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
1963 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
2488 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
3013 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
3542 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
4071 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
4596 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
5121 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c387 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
897 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
1411 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
1921 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
2431 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
2941 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
3455 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
3969 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
4479 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
4989 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6920 #define REG_TC_HDGEN_BK1_59_H _PK_H_(0x1, 0x59) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c387 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
897 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
1411 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
1921 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
2431 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
2941 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
3455 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
3969 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
4479 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
4989 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_H), 0xFF, 0x00/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6920 #define REG_TC_HDGEN_BK1_59_H _PK_H_(0x1, 0x59) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dmdrv_dac_tbl.h3238 #define REG_TC_HDGEN_BK1_59_H _PK_H_(0x1, 0x59) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dmdrv_dac_tbl.h3238 #define REG_TC_HDGEN_BK1_59_H _PK_H_(0x1, 0x59) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dmdrv_dac_tbl.h3238 #define REG_TC_HDGEN_BK1_59_H _PK_H_(0x1, 0x59) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dmdrv_dac_tbl.h3238 #define REG_TC_HDGEN_BK1_59_H _PK_H_(0x1, 0x59) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dmdrv_dac_tbl.h3238 #define REG_TC_HDGEN_BK1_59_H _PK_H_(0x1, 0x59) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dmdrv_dac_tbl.h3238 #define REG_TC_HDGEN_BK1_59_H _PK_H_(0x1, 0x59) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dmdrv_dac_tbl.h3238 #define REG_TC_HDGEN_BK1_59_H _PK_H_(0x1, 0x59) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dmdrv_dac_tbl.h3238 #define REG_TC_HDGEN_BK1_59_H _PK_H_(0x1, 0x59) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dmdrv_dac_tbl.h3238 #define REG_TC_HDGEN_BK1_59_H _PK_H_(0x1, 0x59) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dmdrv_dac_tbl.h3238 #define REG_TC_HDGEN_BK1_59_H _PK_H_(0x1, 0x59) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dmdrv_dac_tbl.h3238 #define REG_TC_HDGEN_BK1_59_H _PK_H_(0x1, 0x59) macro