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Searched refs:REG_TC_HDGEN_BK1_51_L (Results 1 – 23 of 23) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c375 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0xa7/*ALL*/, },
906 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0xa7/*ALL*/, },
1441 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0xa7/*ALL*/, },
1972 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0xa7/*ALL*/, },
2503 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0x87/*ALL*/, },
3034 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0x87/*ALL*/, },
3569 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0x87/*ALL*/, },
4104 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0x87/*ALL*/, },
4635 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0xa3/*ALL*/, },
5167 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0xa3/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c367 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0xa7/*ALL*/, },
892 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0xa7/*ALL*/, },
1421 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0xa7/*ALL*/, },
1946 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0xa7/*ALL*/, },
2471 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0x87/*ALL*/, },
2996 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0x87/*ALL*/, },
3525 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0x87/*ALL*/, },
4054 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0x87/*ALL*/, },
4579 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0xa3/*ALL*/, },
5104 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0xa3/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c375 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0xa7/*ALL*/, },
906 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0xa7/*ALL*/, },
1441 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0xa7/*ALL*/, },
1972 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0xa7/*ALL*/, },
2503 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0x87/*ALL*/, },
3034 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0x87/*ALL*/, },
3569 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0x87/*ALL*/, },
4104 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0x87/*ALL*/, },
4635 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0xa3/*ALL*/, },
5166 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0xa3/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c370 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0xa7/*ALL*/, },
880 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0xa7/*ALL*/, },
1394 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0xa7/*ALL*/, },
1904 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0xa7/*ALL*/, },
2414 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0x87/*ALL*/, },
2924 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0x87/*ALL*/, },
3438 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0x87/*ALL*/, },
3952 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0x87/*ALL*/, },
4462 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0xa3/*ALL*/, },
4972 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0xa3/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6903 #define REG_TC_HDGEN_BK1_51_L _PK_L_(0x1, 0x51) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c370 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0xa7/*ALL*/, },
880 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0xa7/*ALL*/, },
1394 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0xa7/*ALL*/, },
1904 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0xa7/*ALL*/, },
2414 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0x87/*ALL*/, },
2924 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0x87/*ALL*/, },
3438 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0x87/*ALL*/, },
3952 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0x87/*ALL*/, },
4462 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0xa3/*ALL*/, },
4972 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0xa3/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6903 #define REG_TC_HDGEN_BK1_51_L _PK_L_(0x1, 0x51) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c367 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0xa7/*ALL*/, },
892 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0xa7/*ALL*/, },
1421 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0xa7/*ALL*/, },
1946 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0xa7/*ALL*/, },
2471 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0x87/*ALL*/, },
2996 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0x87/*ALL*/, },
3525 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0x87/*ALL*/, },
4054 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0x87/*ALL*/, },
4579 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0xa3/*ALL*/, },
5104 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0xa3/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c370 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0xa7/*ALL*/, },
880 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0xa7/*ALL*/, },
1394 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0xa7/*ALL*/, },
1904 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0xa7/*ALL*/, },
2414 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0x87/*ALL*/, },
2924 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0x87/*ALL*/, },
3438 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0x87/*ALL*/, },
3952 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0x87/*ALL*/, },
4462 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0xa3/*ALL*/, },
4972 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0xa3/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6903 #define REG_TC_HDGEN_BK1_51_L _PK_L_(0x1, 0x51) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c370 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0xa7/*ALL*/, },
880 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0xa7/*ALL*/, },
1394 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0xa7/*ALL*/, },
1904 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0xa7/*ALL*/, },
2414 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0x87/*ALL*/, },
2924 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0x87/*ALL*/, },
3438 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0x87/*ALL*/, },
3952 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0x87/*ALL*/, },
4462 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0xa3/*ALL*/, },
4972 { DRV_DAC_REG(REG_TC_HDGEN_BK1_51_L), 0xFF, 0xa3/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6903 #define REG_TC_HDGEN_BK1_51_L _PK_L_(0x1, 0x51) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dmdrv_dac_tbl.h3221 #define REG_TC_HDGEN_BK1_51_L _PK_L_(0x1, 0x51) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dmdrv_dac_tbl.h3221 #define REG_TC_HDGEN_BK1_51_L _PK_L_(0x1, 0x51) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dmdrv_dac_tbl.h3221 #define REG_TC_HDGEN_BK1_51_L _PK_L_(0x1, 0x51) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dmdrv_dac_tbl.h3221 #define REG_TC_HDGEN_BK1_51_L _PK_L_(0x1, 0x51) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dmdrv_dac_tbl.h3221 #define REG_TC_HDGEN_BK1_51_L _PK_L_(0x1, 0x51) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dmdrv_dac_tbl.h3221 #define REG_TC_HDGEN_BK1_51_L _PK_L_(0x1, 0x51) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dmdrv_dac_tbl.h3221 #define REG_TC_HDGEN_BK1_51_L _PK_L_(0x1, 0x51) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dmdrv_dac_tbl.h3221 #define REG_TC_HDGEN_BK1_51_L _PK_L_(0x1, 0x51) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dmdrv_dac_tbl.h3221 #define REG_TC_HDGEN_BK1_51_L _PK_L_(0x1, 0x51) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dmdrv_dac_tbl.h3221 #define REG_TC_HDGEN_BK1_51_L _PK_L_(0x1, 0x51) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dmdrv_dac_tbl.h3221 #define REG_TC_HDGEN_BK1_51_L _PK_L_(0x1, 0x51) macro