Home
last modified time | relevance | path

Searched refs:REG_TC_HDGEN_BK1_4D_H (Results 1 – 23 of 23) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c368 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
899 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
1434 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
1965 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
2496 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
3027 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
3562 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
4097 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
4628 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
5160 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c360 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
885 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
1414 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
1939 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
2464 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
2989 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
3518 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
4047 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
4572 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
5097 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c368 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
899 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
1434 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
1965 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
2496 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
3027 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
3562 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
4097 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
4628 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
5159 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c363 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
873 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
1387 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
1897 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
2407 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
2917 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
3431 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
3945 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
4455 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
4965 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6896 #define REG_TC_HDGEN_BK1_4D_H _PK_H_(0x1, 0x4D) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c363 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
873 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
1387 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
1897 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
2407 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
2917 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
3431 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
3945 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
4455 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
4965 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6896 #define REG_TC_HDGEN_BK1_4D_H _PK_H_(0x1, 0x4D) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c360 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
885 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
1414 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
1939 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
2464 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
2989 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
3518 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
4047 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
4572 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
5097 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c363 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
873 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
1387 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
1897 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
2407 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
2917 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
3431 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
3945 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
4455 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
4965 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6896 #define REG_TC_HDGEN_BK1_4D_H _PK_H_(0x1, 0x4D) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c363 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
873 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
1387 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
1897 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
2407 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
2917 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
3431 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
3945 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
4455 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
4965 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4D_H), 0xFF, 0x00/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6896 #define REG_TC_HDGEN_BK1_4D_H _PK_H_(0x1, 0x4D) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dmdrv_dac_tbl.h3214 #define REG_TC_HDGEN_BK1_4D_H _PK_H_(0x1, 0x4D) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dmdrv_dac_tbl.h3214 #define REG_TC_HDGEN_BK1_4D_H _PK_H_(0x1, 0x4D) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dmdrv_dac_tbl.h3214 #define REG_TC_HDGEN_BK1_4D_H _PK_H_(0x1, 0x4D) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dmdrv_dac_tbl.h3214 #define REG_TC_HDGEN_BK1_4D_H _PK_H_(0x1, 0x4D) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dmdrv_dac_tbl.h3214 #define REG_TC_HDGEN_BK1_4D_H _PK_H_(0x1, 0x4D) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dmdrv_dac_tbl.h3214 #define REG_TC_HDGEN_BK1_4D_H _PK_H_(0x1, 0x4D) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dmdrv_dac_tbl.h3214 #define REG_TC_HDGEN_BK1_4D_H _PK_H_(0x1, 0x4D) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dmdrv_dac_tbl.h3214 #define REG_TC_HDGEN_BK1_4D_H _PK_H_(0x1, 0x4D) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dmdrv_dac_tbl.h3214 #define REG_TC_HDGEN_BK1_4D_H _PK_H_(0x1, 0x4D) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dmdrv_dac_tbl.h3214 #define REG_TC_HDGEN_BK1_4D_H _PK_H_(0x1, 0x4D) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dmdrv_dac_tbl.h3214 #define REG_TC_HDGEN_BK1_4D_H _PK_H_(0x1, 0x4D) macro