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Searched refs:REG_TC_HDGEN_BK1_44_L (Results 1 – 23 of 23) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c349 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x12/*ALL*/, },
880 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x12/*ALL*/, },
1415 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x12/*ALL*/, },
1946 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x12/*ALL*/, },
2477 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x00/*ALL*/, },
3008 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x00/*ALL*/, },
3543 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x00/*ALL*/, },
4078 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x00/*ALL*/, },
4609 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x06/*ALL*/, },
5141 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x06/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c341 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x12/*ALL*/, },
866 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x12/*ALL*/, },
1395 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x12/*ALL*/, },
1920 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x12/*ALL*/, },
2445 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x00/*ALL*/, },
2970 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x00/*ALL*/, },
3499 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x00/*ALL*/, },
4028 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x00/*ALL*/, },
4553 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x06/*ALL*/, },
5078 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x06/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c349 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x12/*ALL*/, },
880 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x12/*ALL*/, },
1415 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x12/*ALL*/, },
1946 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x12/*ALL*/, },
2477 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x00/*ALL*/, },
3008 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x00/*ALL*/, },
3543 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x00/*ALL*/, },
4078 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x00/*ALL*/, },
4609 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x06/*ALL*/, },
5140 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x06/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c344 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x12/*ALL*/, },
854 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x12/*ALL*/, },
1368 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x12/*ALL*/, },
1878 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x12/*ALL*/, },
2388 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x00/*ALL*/, },
2898 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x00/*ALL*/, },
3412 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x00/*ALL*/, },
3926 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x00/*ALL*/, },
4436 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x06/*ALL*/, },
4946 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x06/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6877 #define REG_TC_HDGEN_BK1_44_L _PK_L_(0x1, 0x44) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c344 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x12/*ALL*/, },
854 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x12/*ALL*/, },
1368 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x12/*ALL*/, },
1878 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x12/*ALL*/, },
2388 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x00/*ALL*/, },
2898 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x00/*ALL*/, },
3412 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x00/*ALL*/, },
3926 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x00/*ALL*/, },
4436 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x06/*ALL*/, },
4946 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x06/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6877 #define REG_TC_HDGEN_BK1_44_L _PK_L_(0x1, 0x44) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c341 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x12/*ALL*/, },
866 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x12/*ALL*/, },
1395 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x12/*ALL*/, },
1920 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x12/*ALL*/, },
2445 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x00/*ALL*/, },
2970 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x00/*ALL*/, },
3499 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x00/*ALL*/, },
4028 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x00/*ALL*/, },
4553 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x06/*ALL*/, },
5078 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x06/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c344 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x12/*ALL*/, },
854 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x12/*ALL*/, },
1368 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x12/*ALL*/, },
1878 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x12/*ALL*/, },
2388 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x00/*ALL*/, },
2898 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x00/*ALL*/, },
3412 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x00/*ALL*/, },
3926 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x00/*ALL*/, },
4436 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x06/*ALL*/, },
4946 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x06/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6877 #define REG_TC_HDGEN_BK1_44_L _PK_L_(0x1, 0x44) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c344 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x12/*ALL*/, },
854 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x12/*ALL*/, },
1368 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x12/*ALL*/, },
1878 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x12/*ALL*/, },
2388 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x00/*ALL*/, },
2898 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x00/*ALL*/, },
3412 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x00/*ALL*/, },
3926 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x00/*ALL*/, },
4436 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x06/*ALL*/, },
4946 { DRV_DAC_REG(REG_TC_HDGEN_BK1_44_L), 0xFF, 0x06/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6877 #define REG_TC_HDGEN_BK1_44_L _PK_L_(0x1, 0x44) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dmdrv_dac_tbl.h3195 #define REG_TC_HDGEN_BK1_44_L _PK_L_(0x1, 0x44) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dmdrv_dac_tbl.h3195 #define REG_TC_HDGEN_BK1_44_L _PK_L_(0x1, 0x44) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dmdrv_dac_tbl.h3195 #define REG_TC_HDGEN_BK1_44_L _PK_L_(0x1, 0x44) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dmdrv_dac_tbl.h3195 #define REG_TC_HDGEN_BK1_44_L _PK_L_(0x1, 0x44) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dmdrv_dac_tbl.h3195 #define REG_TC_HDGEN_BK1_44_L _PK_L_(0x1, 0x44) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dmdrv_dac_tbl.h3195 #define REG_TC_HDGEN_BK1_44_L _PK_L_(0x1, 0x44) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dmdrv_dac_tbl.h3195 #define REG_TC_HDGEN_BK1_44_L _PK_L_(0x1, 0x44) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dmdrv_dac_tbl.h3195 #define REG_TC_HDGEN_BK1_44_L _PK_L_(0x1, 0x44) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dmdrv_dac_tbl.h3195 #define REG_TC_HDGEN_BK1_44_L _PK_L_(0x1, 0x44) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dmdrv_dac_tbl.h3195 #define REG_TC_HDGEN_BK1_44_L _PK_L_(0x1, 0x44) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dmdrv_dac_tbl.h3195 #define REG_TC_HDGEN_BK1_44_L _PK_L_(0x1, 0x44) macro