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Searched refs:REG_TC_HDGEN_BK1_3E_L (Results 1 – 23 of 23) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c339 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x08/*ALL*/, },
870 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x08/*ALL*/, },
1405 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x08/*ALL*/, },
1936 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x08/*ALL*/, },
2467 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x04/*ALL*/, },
2998 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x04/*ALL*/, },
3533 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x04/*ALL*/, },
4068 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x04/*ALL*/, },
4599 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x02/*ALL*/, },
5131 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x02/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c331 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x08/*ALL*/, },
856 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x08/*ALL*/, },
1385 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x08/*ALL*/, },
1910 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x08/*ALL*/, },
2435 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x00/*ALL*/, },
2960 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x00/*ALL*/, },
3489 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x04/*ALL*/, },
4018 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x04/*ALL*/, },
4543 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x00/*ALL*/, },
5068 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c339 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x08/*ALL*/, },
870 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x08/*ALL*/, },
1405 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x08/*ALL*/, },
1936 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x08/*ALL*/, },
2467 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x04/*ALL*/, },
2998 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x04/*ALL*/, },
3533 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x04/*ALL*/, },
4068 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x04/*ALL*/, },
4599 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x02/*ALL*/, },
5130 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x02/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c334 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x08/*ALL*/, },
844 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x08/*ALL*/, },
1358 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x08/*ALL*/, },
1868 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x08/*ALL*/, },
2378 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x04/*ALL*/, },
2888 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x04/*ALL*/, },
3402 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x04/*ALL*/, },
3916 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x04/*ALL*/, },
4426 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x02/*ALL*/, },
4936 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x02/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6865 #define REG_TC_HDGEN_BK1_3E_L _PK_L_(0x1, 0x3E) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c334 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x08/*ALL*/, },
844 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x08/*ALL*/, },
1358 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x08/*ALL*/, },
1868 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x08/*ALL*/, },
2378 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x04/*ALL*/, },
2888 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x04/*ALL*/, },
3402 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x04/*ALL*/, },
3916 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x04/*ALL*/, },
4426 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x02/*ALL*/, },
4936 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x02/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6865 #define REG_TC_HDGEN_BK1_3E_L _PK_L_(0x1, 0x3E) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c331 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x08/*ALL*/, },
856 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x08/*ALL*/, },
1385 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x08/*ALL*/, },
1910 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x08/*ALL*/, },
2435 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x00/*ALL*/, },
2960 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x00/*ALL*/, },
3489 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x04/*ALL*/, },
4018 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x04/*ALL*/, },
4543 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x00/*ALL*/, },
5068 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c334 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x08/*ALL*/, },
844 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x08/*ALL*/, },
1358 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x08/*ALL*/, },
1868 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x08/*ALL*/, },
2378 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x04/*ALL*/, },
2888 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x04/*ALL*/, },
3402 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x04/*ALL*/, },
3916 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x04/*ALL*/, },
4426 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x02/*ALL*/, },
4936 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x02/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6865 #define REG_TC_HDGEN_BK1_3E_L _PK_L_(0x1, 0x3E) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c334 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x08/*ALL*/, },
844 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x08/*ALL*/, },
1358 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x08/*ALL*/, },
1868 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x08/*ALL*/, },
2378 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x04/*ALL*/, },
2888 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x04/*ALL*/, },
3402 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x04/*ALL*/, },
3916 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x04/*ALL*/, },
4426 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x02/*ALL*/, },
4936 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_L), 0xFF, 0x02/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6865 #define REG_TC_HDGEN_BK1_3E_L _PK_L_(0x1, 0x3E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dmdrv_dac_tbl.h3183 #define REG_TC_HDGEN_BK1_3E_L _PK_L_(0x1, 0x3E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dmdrv_dac_tbl.h3183 #define REG_TC_HDGEN_BK1_3E_L _PK_L_(0x1, 0x3E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dmdrv_dac_tbl.h3183 #define REG_TC_HDGEN_BK1_3E_L _PK_L_(0x1, 0x3E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dmdrv_dac_tbl.h3183 #define REG_TC_HDGEN_BK1_3E_L _PK_L_(0x1, 0x3E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dmdrv_dac_tbl.h3183 #define REG_TC_HDGEN_BK1_3E_L _PK_L_(0x1, 0x3E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dmdrv_dac_tbl.h3183 #define REG_TC_HDGEN_BK1_3E_L _PK_L_(0x1, 0x3E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dmdrv_dac_tbl.h3183 #define REG_TC_HDGEN_BK1_3E_L _PK_L_(0x1, 0x3E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dmdrv_dac_tbl.h3183 #define REG_TC_HDGEN_BK1_3E_L _PK_L_(0x1, 0x3E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dmdrv_dac_tbl.h3183 #define REG_TC_HDGEN_BK1_3E_L _PK_L_(0x1, 0x3E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dmdrv_dac_tbl.h3183 #define REG_TC_HDGEN_BK1_3E_L _PK_L_(0x1, 0x3E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dmdrv_dac_tbl.h3183 #define REG_TC_HDGEN_BK1_3E_L _PK_L_(0x1, 0x3E) macro