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Searched refs:REG_TC_HDGEN_BK1_23_L (Results 1 – 23 of 23) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c281 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x7e/*ALL*/, },
812 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x3e/*ALL*/, },
1347 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x7e/*ALL*/, },
1878 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x3e/*ALL*/, },
2409 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x29/*ALL*/, },
2940 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x29/*ALL*/, },
3475 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x2b/*ALL*/, },
4010 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x2b/*ALL*/, },
4541 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x2b/*ALL*/, },
5073 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x2b/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c273 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x7e/*ALL*/, },
798 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x3e/*ALL*/, },
1327 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x7e/*ALL*/, },
1852 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x3e/*ALL*/, },
2377 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x29/*ALL*/, },
2902 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x29/*ALL*/, },
3431 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x2b/*ALL*/, },
3960 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x2b/*ALL*/, },
4485 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x2b/*ALL*/, },
5010 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x2b/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c281 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x7e/*ALL*/, },
812 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x3e/*ALL*/, },
1347 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x7e/*ALL*/, },
1878 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x3e/*ALL*/, },
2409 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x29/*ALL*/, },
2940 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x29/*ALL*/, },
3475 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x2b/*ALL*/, },
4010 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x2b/*ALL*/, },
4541 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x2b/*ALL*/, },
5072 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x2b/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c276 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x7e/*ALL*/, },
786 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x3e/*ALL*/, },
1300 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x7e/*ALL*/, },
1810 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x3e/*ALL*/, },
2320 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x29/*ALL*/, },
2830 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x29/*ALL*/, },
3344 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x2b/*ALL*/, },
3858 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x2b/*ALL*/, },
4368 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x2b/*ALL*/, },
4878 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x2b/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6811 #define REG_TC_HDGEN_BK1_23_L _PK_L_(0x1, 0x23) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c276 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x7e/*ALL*/, },
786 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x3e/*ALL*/, },
1300 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x7e/*ALL*/, },
1810 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x3e/*ALL*/, },
2320 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x29/*ALL*/, },
2830 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x29/*ALL*/, },
3344 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x2b/*ALL*/, },
3858 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x2b/*ALL*/, },
4368 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x2b/*ALL*/, },
4878 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x2b/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6811 #define REG_TC_HDGEN_BK1_23_L _PK_L_(0x1, 0x23) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c273 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x7e/*ALL*/, },
798 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x3e/*ALL*/, },
1327 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x7e/*ALL*/, },
1852 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x3e/*ALL*/, },
2377 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x29/*ALL*/, },
2902 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x29/*ALL*/, },
3431 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x2b/*ALL*/, },
3960 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x2b/*ALL*/, },
4485 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x2b/*ALL*/, },
5010 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x2b/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c276 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x7e/*ALL*/, },
786 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x3e/*ALL*/, },
1300 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x7e/*ALL*/, },
1810 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x3e/*ALL*/, },
2320 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x29/*ALL*/, },
2830 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x29/*ALL*/, },
3344 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x2b/*ALL*/, },
3858 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x2b/*ALL*/, },
4368 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x2b/*ALL*/, },
4878 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x2b/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6811 #define REG_TC_HDGEN_BK1_23_L _PK_L_(0x1, 0x23) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c276 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x7e/*ALL*/, },
786 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x3e/*ALL*/, },
1300 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x7e/*ALL*/, },
1810 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x3e/*ALL*/, },
2320 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x29/*ALL*/, },
2830 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x29/*ALL*/, },
3344 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x2b/*ALL*/, },
3858 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x2b/*ALL*/, },
4368 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x2b/*ALL*/, },
4878 { DRV_DAC_REG(REG_TC_HDGEN_BK1_23_L), 0xFF, 0x2b/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6811 #define REG_TC_HDGEN_BK1_23_L _PK_L_(0x1, 0x23) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dmdrv_dac_tbl.h3129 #define REG_TC_HDGEN_BK1_23_L _PK_L_(0x1, 0x23) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dmdrv_dac_tbl.h3129 #define REG_TC_HDGEN_BK1_23_L _PK_L_(0x1, 0x23) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dmdrv_dac_tbl.h3129 #define REG_TC_HDGEN_BK1_23_L _PK_L_(0x1, 0x23) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dmdrv_dac_tbl.h3129 #define REG_TC_HDGEN_BK1_23_L _PK_L_(0x1, 0x23) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dmdrv_dac_tbl.h3129 #define REG_TC_HDGEN_BK1_23_L _PK_L_(0x1, 0x23) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dmdrv_dac_tbl.h3129 #define REG_TC_HDGEN_BK1_23_L _PK_L_(0x1, 0x23) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dmdrv_dac_tbl.h3129 #define REG_TC_HDGEN_BK1_23_L _PK_L_(0x1, 0x23) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dmdrv_dac_tbl.h3129 #define REG_TC_HDGEN_BK1_23_L _PK_L_(0x1, 0x23) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dmdrv_dac_tbl.h3129 #define REG_TC_HDGEN_BK1_23_L _PK_L_(0x1, 0x23) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dmdrv_dac_tbl.h3129 #define REG_TC_HDGEN_BK1_23_L _PK_L_(0x1, 0x23) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dmdrv_dac_tbl.h3129 #define REG_TC_HDGEN_BK1_23_L _PK_L_(0x1, 0x23) macro