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Searched refs:REG_TC_HDGEN_BK1_20_L (Results 1 – 23 of 23) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c275 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
806 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
1341 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
1872 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
2403 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
2934 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
3469 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
4004 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
4535 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
5067 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c267 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
792 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
1321 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
1846 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
2371 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
2896 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
3425 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
3954 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
4479 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
5004 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c275 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
806 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
1341 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
1872 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
2403 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
2934 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
3469 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
4004 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
4535 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
5066 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c270 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
780 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
1294 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
1804 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
2314 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
2824 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
3338 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
3852 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
4362 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
4872 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6805 #define REG_TC_HDGEN_BK1_20_L _PK_L_(0x1, 0x20) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c270 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
780 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
1294 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
1804 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
2314 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
2824 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
3338 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
3852 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
4362 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
4872 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6805 #define REG_TC_HDGEN_BK1_20_L _PK_L_(0x1, 0x20) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c267 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
792 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
1321 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
1846 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
2371 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
2896 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
3425 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
3954 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
4479 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
5004 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c270 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
780 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
1294 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
1804 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
2314 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
2824 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
3338 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
3852 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
4362 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
4872 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6805 #define REG_TC_HDGEN_BK1_20_L _PK_L_(0x1, 0x20) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c270 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
780 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
1294 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
1804 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
2314 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
2824 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
3338 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
3852 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
4362 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
4872 { DRV_DAC_REG(REG_TC_HDGEN_BK1_20_L), 0xFF, 0x00/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6805 #define REG_TC_HDGEN_BK1_20_L _PK_L_(0x1, 0x20) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dmdrv_dac_tbl.h3123 #define REG_TC_HDGEN_BK1_20_L _PK_L_(0x1, 0x20) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dmdrv_dac_tbl.h3123 #define REG_TC_HDGEN_BK1_20_L _PK_L_(0x1, 0x20) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dmdrv_dac_tbl.h3123 #define REG_TC_HDGEN_BK1_20_L _PK_L_(0x1, 0x20) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dmdrv_dac_tbl.h3123 #define REG_TC_HDGEN_BK1_20_L _PK_L_(0x1, 0x20) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dmdrv_dac_tbl.h3123 #define REG_TC_HDGEN_BK1_20_L _PK_L_(0x1, 0x20) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dmdrv_dac_tbl.h3123 #define REG_TC_HDGEN_BK1_20_L _PK_L_(0x1, 0x20) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dmdrv_dac_tbl.h3123 #define REG_TC_HDGEN_BK1_20_L _PK_L_(0x1, 0x20) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dmdrv_dac_tbl.h3123 #define REG_TC_HDGEN_BK1_20_L _PK_L_(0x1, 0x20) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dmdrv_dac_tbl.h3123 #define REG_TC_HDGEN_BK1_20_L _PK_L_(0x1, 0x20) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dmdrv_dac_tbl.h3123 #define REG_TC_HDGEN_BK1_20_L _PK_L_(0x1, 0x20) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dmdrv_dac_tbl.h3123 #define REG_TC_HDGEN_BK1_20_L _PK_L_(0x1, 0x20) macro