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Searched refs:REG_TC_HDGEN_BK1_1E_L (Results 1 – 23 of 23) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c271 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
802 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
1337 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
1868 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
2399 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
2930 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
3465 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
4000 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
4531 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
5063 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c263 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
788 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
1317 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
1842 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
2367 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
2892 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
3421 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
3950 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
4475 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
5000 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c271 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
802 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
1337 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
1868 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
2399 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
2930 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
3465 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
4000 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
4531 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
5062 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c266 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
776 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
1290 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
1800 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
2310 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
2820 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
3334 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
3848 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
4358 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
4868 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6801 #define REG_TC_HDGEN_BK1_1E_L _PK_L_(0x1, 0x1E) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c266 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
776 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
1290 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
1800 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
2310 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
2820 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
3334 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
3848 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
4358 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
4868 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6801 #define REG_TC_HDGEN_BK1_1E_L _PK_L_(0x1, 0x1E) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c263 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
788 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
1317 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
1842 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
2367 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
2892 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
3421 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
3950 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
4475 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
5000 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c266 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
776 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
1290 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
1800 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
2310 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
2820 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
3334 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
3848 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
4358 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
4868 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6801 #define REG_TC_HDGEN_BK1_1E_L _PK_L_(0x1, 0x1E) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c266 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
776 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
1290 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
1800 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
2310 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
2820 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
3334 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
3848 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
4358 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
4868 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_L), 0xFF, 0x00/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6801 #define REG_TC_HDGEN_BK1_1E_L _PK_L_(0x1, 0x1E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dmdrv_dac_tbl.h3119 #define REG_TC_HDGEN_BK1_1E_L _PK_L_(0x1, 0x1E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dmdrv_dac_tbl.h3119 #define REG_TC_HDGEN_BK1_1E_L _PK_L_(0x1, 0x1E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dmdrv_dac_tbl.h3119 #define REG_TC_HDGEN_BK1_1E_L _PK_L_(0x1, 0x1E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dmdrv_dac_tbl.h3119 #define REG_TC_HDGEN_BK1_1E_L _PK_L_(0x1, 0x1E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dmdrv_dac_tbl.h3119 #define REG_TC_HDGEN_BK1_1E_L _PK_L_(0x1, 0x1E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dmdrv_dac_tbl.h3119 #define REG_TC_HDGEN_BK1_1E_L _PK_L_(0x1, 0x1E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dmdrv_dac_tbl.h3119 #define REG_TC_HDGEN_BK1_1E_L _PK_L_(0x1, 0x1E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dmdrv_dac_tbl.h3119 #define REG_TC_HDGEN_BK1_1E_L _PK_L_(0x1, 0x1E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dmdrv_dac_tbl.h3119 #define REG_TC_HDGEN_BK1_1E_L _PK_L_(0x1, 0x1E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dmdrv_dac_tbl.h3119 #define REG_TC_HDGEN_BK1_1E_L _PK_L_(0x1, 0x1E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dmdrv_dac_tbl.h3119 #define REG_TC_HDGEN_BK1_1E_L _PK_L_(0x1, 0x1E) macro