Home
last modified time | relevance | path

Searched refs:REG_TC_HDGEN_BK1_1E_H (Results 1 – 23 of 23) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c272 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
803 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
1338 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
1869 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
2400 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
2931 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
3466 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
4001 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
4532 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
5064 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c264 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
789 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
1318 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
1843 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
2368 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
2893 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
3422 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
3951 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
4476 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
5001 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c272 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
803 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
1338 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
1869 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
2400 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
2931 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
3466 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
4001 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
4532 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
5063 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c267 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
777 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
1291 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
1801 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
2311 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
2821 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
3335 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
3849 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
4359 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
4869 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6802 #define REG_TC_HDGEN_BK1_1E_H _PK_H_(0x1, 0x1E) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c267 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
777 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
1291 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
1801 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
2311 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
2821 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
3335 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
3849 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
4359 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
4869 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6802 #define REG_TC_HDGEN_BK1_1E_H _PK_H_(0x1, 0x1E) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c264 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
789 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
1318 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
1843 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
2368 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
2893 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
3422 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
3951 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
4476 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
5001 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c267 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
777 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
1291 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
1801 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
2311 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
2821 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
3335 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
3849 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
4359 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
4869 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6802 #define REG_TC_HDGEN_BK1_1E_H _PK_H_(0x1, 0x1E) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c267 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
777 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
1291 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
1801 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
2311 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
2821 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
3335 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
3849 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
4359 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
4869 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1E_H), 0xFF, 0x00/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6802 #define REG_TC_HDGEN_BK1_1E_H _PK_H_(0x1, 0x1E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dmdrv_dac_tbl.h3120 #define REG_TC_HDGEN_BK1_1E_H _PK_H_(0x1, 0x1E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dmdrv_dac_tbl.h3120 #define REG_TC_HDGEN_BK1_1E_H _PK_H_(0x1, 0x1E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dmdrv_dac_tbl.h3120 #define REG_TC_HDGEN_BK1_1E_H _PK_H_(0x1, 0x1E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dmdrv_dac_tbl.h3120 #define REG_TC_HDGEN_BK1_1E_H _PK_H_(0x1, 0x1E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dmdrv_dac_tbl.h3120 #define REG_TC_HDGEN_BK1_1E_H _PK_H_(0x1, 0x1E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dmdrv_dac_tbl.h3120 #define REG_TC_HDGEN_BK1_1E_H _PK_H_(0x1, 0x1E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dmdrv_dac_tbl.h3120 #define REG_TC_HDGEN_BK1_1E_H _PK_H_(0x1, 0x1E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dmdrv_dac_tbl.h3120 #define REG_TC_HDGEN_BK1_1E_H _PK_H_(0x1, 0x1E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dmdrv_dac_tbl.h3120 #define REG_TC_HDGEN_BK1_1E_H _PK_H_(0x1, 0x1E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dmdrv_dac_tbl.h3120 #define REG_TC_HDGEN_BK1_1E_H _PK_H_(0x1, 0x1E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dmdrv_dac_tbl.h3120 #define REG_TC_HDGEN_BK1_1E_H _PK_H_(0x1, 0x1E) macro