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Searched refs:REG_TC_HDGEN_BK1_15_L (Results 1 – 23 of 23) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c253 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x00/*ALL*/, },
784 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x00/*ALL*/, },
1319 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x00/*ALL*/, },
1850 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x00/*ALL*/, },
2381 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x2c/*ALL*/, },
2912 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x2c/*ALL*/, },
3447 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x00/*ALL*/, },
3982 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x00/*ALL*/, },
4513 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x6b/*ALL*/, },
5045 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x6b/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c245 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x00/*ALL*/, },
770 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x00/*ALL*/, },
1299 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x00/*ALL*/, },
1824 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x00/*ALL*/, },
2349 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x2c/*ALL*/, },
2874 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x2c/*ALL*/, },
3403 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x00/*ALL*/, },
3932 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x00/*ALL*/, },
4457 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x6b/*ALL*/, },
4982 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x6b/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c253 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x00/*ALL*/, },
784 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x00/*ALL*/, },
1319 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x00/*ALL*/, },
1850 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x00/*ALL*/, },
2381 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x2c/*ALL*/, },
2912 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x2c/*ALL*/, },
3447 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x00/*ALL*/, },
3982 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x00/*ALL*/, },
4513 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x6b/*ALL*/, },
5044 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x6b/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c248 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x00/*ALL*/, },
758 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x00/*ALL*/, },
1272 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x00/*ALL*/, },
1782 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x00/*ALL*/, },
2292 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x2c/*ALL*/, },
2802 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x2c/*ALL*/, },
3316 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x00/*ALL*/, },
3830 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x00/*ALL*/, },
4340 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x6b/*ALL*/, },
4850 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x6b/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6783 #define REG_TC_HDGEN_BK1_15_L _PK_L_(0x1, 0x15) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c248 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x00/*ALL*/, },
758 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x00/*ALL*/, },
1272 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x00/*ALL*/, },
1782 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x00/*ALL*/, },
2292 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x2c/*ALL*/, },
2802 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x2c/*ALL*/, },
3316 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x00/*ALL*/, },
3830 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x00/*ALL*/, },
4340 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x6b/*ALL*/, },
4850 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x6b/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6783 #define REG_TC_HDGEN_BK1_15_L _PK_L_(0x1, 0x15) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c245 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x00/*ALL*/, },
770 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x00/*ALL*/, },
1299 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x00/*ALL*/, },
1824 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x00/*ALL*/, },
2349 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x2c/*ALL*/, },
2874 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x2c/*ALL*/, },
3403 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x00/*ALL*/, },
3932 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x00/*ALL*/, },
4457 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x6b/*ALL*/, },
4982 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x6b/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c248 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x00/*ALL*/, },
758 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x00/*ALL*/, },
1272 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x00/*ALL*/, },
1782 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x00/*ALL*/, },
2292 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x2c/*ALL*/, },
2802 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x2c/*ALL*/, },
3316 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x00/*ALL*/, },
3830 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x00/*ALL*/, },
4340 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x6b/*ALL*/, },
4850 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x6b/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6783 #define REG_TC_HDGEN_BK1_15_L _PK_L_(0x1, 0x15) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c248 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x00/*ALL*/, },
758 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x00/*ALL*/, },
1272 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x00/*ALL*/, },
1782 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x00/*ALL*/, },
2292 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x2c/*ALL*/, },
2802 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x2c/*ALL*/, },
3316 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x00/*ALL*/, },
3830 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x00/*ALL*/, },
4340 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x6b/*ALL*/, },
4850 { DRV_DAC_REG(REG_TC_HDGEN_BK1_15_L), 0xFF, 0x6b/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6783 #define REG_TC_HDGEN_BK1_15_L _PK_L_(0x1, 0x15) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dmdrv_dac_tbl.h3101 #define REG_TC_HDGEN_BK1_15_L _PK_L_(0x1, 0x15) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dmdrv_dac_tbl.h3101 #define REG_TC_HDGEN_BK1_15_L _PK_L_(0x1, 0x15) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dmdrv_dac_tbl.h3101 #define REG_TC_HDGEN_BK1_15_L _PK_L_(0x1, 0x15) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dmdrv_dac_tbl.h3101 #define REG_TC_HDGEN_BK1_15_L _PK_L_(0x1, 0x15) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dmdrv_dac_tbl.h3101 #define REG_TC_HDGEN_BK1_15_L _PK_L_(0x1, 0x15) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dmdrv_dac_tbl.h3101 #define REG_TC_HDGEN_BK1_15_L _PK_L_(0x1, 0x15) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dmdrv_dac_tbl.h3101 #define REG_TC_HDGEN_BK1_15_L _PK_L_(0x1, 0x15) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dmdrv_dac_tbl.h3101 #define REG_TC_HDGEN_BK1_15_L _PK_L_(0x1, 0x15) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dmdrv_dac_tbl.h3101 #define REG_TC_HDGEN_BK1_15_L _PK_L_(0x1, 0x15) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dmdrv_dac_tbl.h3101 #define REG_TC_HDGEN_BK1_15_L _PK_L_(0x1, 0x15) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dmdrv_dac_tbl.h3101 #define REG_TC_HDGEN_BK1_15_L _PK_L_(0x1, 0x15) macro