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Searched refs:REG_TC_HDGEN_BK1_01_L (Results 1 – 23 of 23) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c241 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x00/*ALL*/, },
772 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x0f/*ALL*/, },
1307 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x00/*ALL*/, },
1838 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x0f/*ALL*/, },
2369 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x0f/*ALL*/, },
2900 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x0f/*ALL*/, },
3435 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x00/*ALL*/, },
3970 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x00/*ALL*/, },
4501 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x0f/*ALL*/, },
5033 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x0f/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c233 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x00/*ALL*/, },
758 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x0f/*ALL*/, },
1287 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x00/*ALL*/, },
1812 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x0f/*ALL*/, },
2337 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x0f/*ALL*/, },
2862 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x0f/*ALL*/, },
3391 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x00/*ALL*/, },
3920 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x00/*ALL*/, },
4445 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x0f/*ALL*/, },
4970 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x0f/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c241 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x00/*ALL*/, },
772 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x0f/*ALL*/, },
1307 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x00/*ALL*/, },
1838 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x0f/*ALL*/, },
2369 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x0f/*ALL*/, },
2900 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x0f/*ALL*/, },
3435 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x00/*ALL*/, },
3970 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x00/*ALL*/, },
4501 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x0f/*ALL*/, },
5032 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x0f/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c236 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x00/*ALL*/, },
746 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x0f/*ALL*/, },
1260 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x00/*ALL*/, },
1770 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x0f/*ALL*/, },
2280 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x0f/*ALL*/, },
2790 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x0f/*ALL*/, },
3304 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x00/*ALL*/, },
3818 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x00/*ALL*/, },
4328 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x0f/*ALL*/, },
4838 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x0f/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6743 #define REG_TC_HDGEN_BK1_01_L _PK_L_(0x1, 0x01) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c236 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x00/*ALL*/, },
746 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x0f/*ALL*/, },
1260 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x00/*ALL*/, },
1770 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x0f/*ALL*/, },
2280 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x0f/*ALL*/, },
2790 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x0f/*ALL*/, },
3304 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x00/*ALL*/, },
3818 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x00/*ALL*/, },
4328 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x0f/*ALL*/, },
4838 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x0f/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6743 #define REG_TC_HDGEN_BK1_01_L _PK_L_(0x1, 0x01) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c233 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x00/*ALL*/, },
758 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x0f/*ALL*/, },
1287 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x00/*ALL*/, },
1812 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x0f/*ALL*/, },
2337 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x0f/*ALL*/, },
2862 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x0f/*ALL*/, },
3391 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x00/*ALL*/, },
3920 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x00/*ALL*/, },
4445 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x0f/*ALL*/, },
4970 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x0f/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c236 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x00/*ALL*/, },
746 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x0f/*ALL*/, },
1260 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x00/*ALL*/, },
1770 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x0f/*ALL*/, },
2280 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x0f/*ALL*/, },
2790 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x0f/*ALL*/, },
3304 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x00/*ALL*/, },
3818 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x00/*ALL*/, },
4328 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x0f/*ALL*/, },
4838 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x0f/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6743 #define REG_TC_HDGEN_BK1_01_L _PK_L_(0x1, 0x01) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c236 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x00/*ALL*/, },
746 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x0f/*ALL*/, },
1260 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x00/*ALL*/, },
1770 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x0f/*ALL*/, },
2280 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x0f/*ALL*/, },
2790 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x0f/*ALL*/, },
3304 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x00/*ALL*/, },
3818 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x00/*ALL*/, },
4328 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x0f/*ALL*/, },
4838 { DRV_DAC_REG(REG_TC_HDGEN_BK1_01_L), 0xFF, 0x0f/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6743 #define REG_TC_HDGEN_BK1_01_L _PK_L_(0x1, 0x01) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dmdrv_dac_tbl.h3061 #define REG_TC_HDGEN_BK1_01_L _PK_L_(0x1, 0x01) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dmdrv_dac_tbl.h3061 #define REG_TC_HDGEN_BK1_01_L _PK_L_(0x1, 0x01) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dmdrv_dac_tbl.h3061 #define REG_TC_HDGEN_BK1_01_L _PK_L_(0x1, 0x01) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dmdrv_dac_tbl.h3061 #define REG_TC_HDGEN_BK1_01_L _PK_L_(0x1, 0x01) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dmdrv_dac_tbl.h3061 #define REG_TC_HDGEN_BK1_01_L _PK_L_(0x1, 0x01) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dmdrv_dac_tbl.h3061 #define REG_TC_HDGEN_BK1_01_L _PK_L_(0x1, 0x01) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dmdrv_dac_tbl.h3061 #define REG_TC_HDGEN_BK1_01_L _PK_L_(0x1, 0x01) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dmdrv_dac_tbl.h3061 #define REG_TC_HDGEN_BK1_01_L _PK_L_(0x1, 0x01) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dmdrv_dac_tbl.h3061 #define REG_TC_HDGEN_BK1_01_L _PK_L_(0x1, 0x01) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dmdrv_dac_tbl.h3061 #define REG_TC_HDGEN_BK1_01_L _PK_L_(0x1, 0x01) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dmdrv_dac_tbl.h3061 #define REG_TC_HDGEN_BK1_01_L _PK_L_(0x1, 0x01) macro