Home
last modified time | relevance | path

Searched refs:REG_TC_CLK_GEN_53_L (Results 1 – 25 of 38) sorted by relevance

12

/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c113 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1C, 0x10/*ALL*/, },
648 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1C, 0x10/*ALL*/, },
1179 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1C, 0x10/*ALL*/, },
1714 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1C, 0x10/*ALL*/, },
2245 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1C, 0x0C/*ALL*/, },
2776 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1C, 0x0C/*ALL*/, },
3307 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1C, 0x08/*ALL*/, },
3842 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1C, 0x08/*ALL*/, },
4377 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1C, 0x08/*ALL*/, },
4908 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1C, 0x08/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c113 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1F, 0x10/*ALL*/, },
642 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1F, 0x10/*ALL*/, },
1167 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1F, 0x10/*ALL*/, },
1696 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1F, 0x10/*ALL*/, },
2221 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1F, 0x0C/*ALL*/, },
2746 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1F, 0x0C/*ALL*/, },
3271 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1F, 0x08/*ALL*/, },
3800 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1F, 0x08/*ALL*/, },
4329 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1F, 0x08/*ALL*/, },
4854 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1F, 0x08/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c113 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1C, 0x10/*ALL*/, },
648 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1C, 0x10/*ALL*/, },
1179 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1C, 0x10/*ALL*/, },
1714 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1C, 0x10/*ALL*/, },
2245 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1C, 0x0C/*ALL*/, },
2776 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1C, 0x0C/*ALL*/, },
3307 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1C, 0x08/*ALL*/, },
3842 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1C, 0x08/*ALL*/, },
4377 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1C, 0x08/*ALL*/, },
4908 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1C, 0x08/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c113 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1C, 0x10/*ALL*/, },
627 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1C, 0x10/*ALL*/, },
1137 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1C, 0x10/*ALL*/, },
1651 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1C, 0x10/*ALL*/, },
2161 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1C, 0x0C/*ALL*/, },
2671 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1C, 0x0C/*ALL*/, },
3181 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1C, 0x08/*ALL*/, },
3695 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1C, 0x08/*ALL*/, },
4209 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1C, 0x08/*ALL*/, },
4719 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1C, 0x08/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c113 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1C, 0x10/*ALL*/, },
627 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1C, 0x10/*ALL*/, },
1137 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1C, 0x10/*ALL*/, },
1651 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1C, 0x10/*ALL*/, },
2161 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1C, 0x0C/*ALL*/, },
2671 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1C, 0x0C/*ALL*/, },
3181 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1C, 0x08/*ALL*/, },
3695 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1C, 0x08/*ALL*/, },
4209 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1C, 0x08/*ALL*/, },
4719 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1C, 0x08/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c113 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1F, 0x10/*ALL*/, },
642 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1F, 0x10/*ALL*/, },
1167 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1F, 0x10/*ALL*/, },
1696 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1F, 0x10/*ALL*/, },
2221 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1F, 0x0C/*ALL*/, },
2746 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1F, 0x0C/*ALL*/, },
3271 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1F, 0x08/*ALL*/, },
3800 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1F, 0x08/*ALL*/, },
4329 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1F, 0x08/*ALL*/, },
4854 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1F, 0x08/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c113 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1C, 0x10/*ALL*/, },
627 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1C, 0x10/*ALL*/, },
1137 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1C, 0x10/*ALL*/, },
1651 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1C, 0x10/*ALL*/, },
2161 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1C, 0x0C/*ALL*/, },
2671 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1C, 0x0C/*ALL*/, },
3181 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1C, 0x08/*ALL*/, },
3695 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1C, 0x08/*ALL*/, },
4209 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1C, 0x08/*ALL*/, },
4719 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1C, 0x08/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c113 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1C, 0x10/*ALL*/, },
627 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1C, 0x10/*ALL*/, },
1137 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1C, 0x10/*ALL*/, },
1651 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1C, 0x10/*ALL*/, },
2161 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1C, 0x0C/*ALL*/, },
2671 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1C, 0x0C/*ALL*/, },
3181 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1C, 0x08/*ALL*/, },
3695 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1C, 0x08/*ALL*/, },
4209 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1C, 0x08/*ALL*/, },
4719 { DRV_DAC_REG(REG_TC_CLK_GEN_53_L), 0x1C, 0x08/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dpnl_tcon_tbl.h537 #define REG_TC_CLK_GEN_53_L (REG_TC_CLK_GEN_BASE + 0xA6) macro
H A Dmdrv_dac_tbl.h912 #define REG_TC_CLK_GEN_53_L (REG_TC_CLK_GEN_BASE + 0xA6) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/pnl/
H A Dpnl_tcon_tbl.h535 #define REG_TC_CLK_GEN_53_L (REG_TC_CLK_GEN_BASE + 0xA6) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dpnl_tcon_tbl.h537 #define REG_TC_CLK_GEN_53_L (REG_TC_CLK_GEN_BASE + 0xA6) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/pnl/
H A Dpnl_tcon_tbl.h535 #define REG_TC_CLK_GEN_53_L (REG_TC_CLK_GEN_BASE + 0xA6) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dpnl_tcon_tbl.h537 #define REG_TC_CLK_GEN_53_L (REG_TC_CLK_GEN_BASE + 0xA6) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/pnl/
H A Dpnl_tcon_tbl.h535 #define REG_TC_CLK_GEN_53_L (REG_TC_CLK_GEN_BASE + 0xA6) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dpnl_tcon_tbl.h537 #define REG_TC_CLK_GEN_53_L (REG_TC_CLK_GEN_BASE + 0xA6) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dpnl_tcon_tbl.h537 #define REG_TC_CLK_GEN_53_L (REG_TC_CLK_GEN_BASE + 0xA6) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dpnl_tcon_tbl.h537 #define REG_TC_CLK_GEN_53_L (REG_TC_CLK_GEN_BASE + 0xA6) macro
H A Dmdrv_dac_tbl.h912 #define REG_TC_CLK_GEN_53_L (REG_TC_CLK_GEN_BASE + 0xA6) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dpnl_tcon_tbl.h537 #define REG_TC_CLK_GEN_53_L (REG_TC_CLK_GEN_BASE + 0xA6) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dpnl_tcon_tbl.h537 #define REG_TC_CLK_GEN_53_L (REG_TC_CLK_GEN_BASE + 0xA6) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dpnl_tcon_tbl.h537 #define REG_TC_CLK_GEN_53_L (REG_TC_CLK_GEN_BASE + 0xA6) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dpnl_tcon_tbl.h537 #define REG_TC_CLK_GEN_53_L (REG_TC_CLK_GEN_BASE + 0xA6) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/pnl/
H A Dpnl_tcon_tbl.h535 #define REG_TC_CLK_GEN_53_L (REG_TC_CLK_GEN_BASE + 0xA6) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dpnl_tcon_tbl.h537 #define REG_TC_CLK_GEN_53_L (REG_TC_CLK_GEN_BASE + 0xA6) macro

12