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Searched refs:REG_SE_DSP_ICACHE_BASE_L (Results 1 – 25 of 30) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/audio/hal/messi/audio/
H A DregAUDIO.h229 #define REG_SE_DSP_ICACHE_BASE_L 0x2A90 macro
H A DhalMAD2.c233 HAL_AUDIO_WriteReg(REG_SE_DSP_ICACHE_BASE_L, (MS_U16)(SE_DSP_DDR_ADDR_ICACHE & 0xFFFF)); in HAL_MAD2_SetMemInfo()
/utopia/UTPA2-700.0.x/modules/audio/hal/mainz/audio/
H A DregAUDIO.h229 #define REG_SE_DSP_ICACHE_BASE_L 0x2A90 macro
H A DhalMAD2.c233 HAL_AUDIO_WriteReg(REG_SE_DSP_ICACHE_BASE_L, (MS_U16)(SE_DSP_DDR_ADDR_ICACHE & 0xFFFF)); in HAL_MAD2_SetMemInfo()
/utopia/UTPA2-700.0.x/modules/audio/hal/mustang/audio/
H A DregAUDIO.h231 #define REG_SE_DSP_ICACHE_BASE_L 0x2A90 macro
H A DhalMAD2.c298 HAL_AUDIO_WriteReg(REG_SE_DSP_ICACHE_BASE_L, (MS_U16)(SE_DSP_DDR_ADDR_ICACHE & 0xFFFF)); in HAL_MAD2_SetMemInfo()
/utopia/UTPA2-700.0.x/modules/audio/hal/M7821/audio/
H A DregAUDIO.h231 #define REG_SE_DSP_ICACHE_BASE_L 0x2A90 macro
H A DhalMAD2.c290 HAL_AUDIO_WriteReg(REG_SE_DSP_ICACHE_BASE_L, (MS_U16)(SE_DSP_DDR_ADDR_ICACHE & 0xFFFF)); in HAL_MAD2_SetMemInfo()
/utopia/UTPA2-700.0.x/modules/audio/hal/maldives/audio/
H A DregAUDIO.h230 #define REG_SE_DSP_ICACHE_BASE_L 0x2A90 macro
H A DhalMAD2.c277 HAL_AUDIO_WriteReg(REG_SE_DSP_ICACHE_BASE_L, (MS_U16)(SE_DSP_DDR_ADDR_ICACHE & 0xFFFF)); in HAL_MAD2_SetMemInfo()
/utopia/UTPA2-700.0.x/modules/audio/hal/mooney/audio/
H A DregAUDIO.h230 #define REG_SE_DSP_ICACHE_BASE_L 0x2A90 macro
H A DhalMAD2.c269 HAL_AUDIO_WriteReg(REG_SE_DSP_ICACHE_BASE_L, (MS_U16)(SE_DSP_DDR_ADDR_ICACHE & 0xFFFF)); in HAL_MAD2_SetMemInfo()
/utopia/UTPA2-700.0.x/modules/audio/hal/maserati/audio/
H A DregAUDIO.h231 #define REG_SE_DSP_ICACHE_BASE_L 0x2A90 macro
H A DhalMAD2.c290 HAL_AUDIO_WriteReg(REG_SE_DSP_ICACHE_BASE_L, (MS_U16)(SE_DSP_DDR_ADDR_ICACHE & 0xFFFF)); in HAL_MAD2_SetMemInfo()
/utopia/UTPA2-700.0.x/modules/audio/hal/macan/audio/
H A DregAUDIO.h229 #define REG_SE_DSP_ICACHE_BASE_L 0x2A90 macro
/utopia/UTPA2-700.0.x/modules/audio/hal/manhattan/audio/
H A DregAUDIO.h229 #define REG_SE_DSP_ICACHE_BASE_L 0x2A90 macro
/utopia/UTPA2-700.0.x/modules/audio/hal/curry/audio/
H A DhalMAD2.c267 HAL_AUDIO_WriteReg(REG_SE_DSP_ICACHE_BASE_L, (MS_U16)(SE_DSP_DDR_ADDR_ICACHE & 0xFFFF)); in HAL_MAD2_SetMemInfo()
/utopia/UTPA2-700.0.x/modules/audio/hal/M7621/audio/
H A DhalMAD2.c302 HAL_AUDIO_WriteReg(REG_SE_DSP_ICACHE_BASE_L, (MS_U16)(SE_DSP_DDR_ADDR_ICACHE & 0xFFFF)); in HAL_MAD2_SetMemInfo()
H A DregAUDIO.h231 #define REG_SE_DSP_ICACHE_BASE_L 0x2A90 macro
/utopia/UTPA2-700.0.x/modules/audio/hal/kano/audio/
H A DhalMAD2.c272 HAL_AUDIO_WriteReg(REG_SE_DSP_ICACHE_BASE_L, (MS_U16)(SE_DSP_DDR_ADDR_ICACHE & 0xFFFF)); in HAL_MAD2_SetMemInfo()
H A DregAUDIO.h228 #define REG_SE_DSP_ICACHE_BASE_L 0x2A90 macro
/utopia/UTPA2-700.0.x/modules/audio/hal/k6lite/audio/
H A DhalMAD2.c272 HAL_AUDIO_WriteReg(REG_SE_DSP_ICACHE_BASE_L, (MS_U16)(SE_DSP_DDR_ADDR_ICACHE & 0xFFFF)); in HAL_MAD2_SetMemInfo()
/utopia/UTPA2-700.0.x/modules/audio/hal/k6/audio/
H A DhalMAD2.c272 HAL_AUDIO_WriteReg(REG_SE_DSP_ICACHE_BASE_L, (MS_U16)(SE_DSP_DDR_ADDR_ICACHE & 0xFFFF)); in HAL_MAD2_SetMemInfo()
/utopia/UTPA2-700.0.x/modules/audio/hal/maxim/audio/
H A DhalMAD2.c302 HAL_AUDIO_WriteReg(REG_SE_DSP_ICACHE_BASE_L, (MS_U16)(SE_DSP_DDR_ADDR_ICACHE & 0xFFFF)); in HAL_MAD2_SetMemInfo()
H A DregAUDIO.h231 #define REG_SE_DSP_ICACHE_BASE_L 0x2A90 macro

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