| /utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/ |
| H A D | mhal_dip.c | 426 SC_W4BYTE(0, REG_SC_BK3C_1B_L, pDBreg->u32V_PreScalingRatio); // V pre-scaling in Hal_SC_DWIN_sw_db()
471 pDBreg->u32V_PreScalingRatio = SC_R4BYTE(0, REG_SC_BK3C_1B_L); in Hal_SC_DWIN_get_sw_db()
2792 *u16V_Scaling_Enable = (SC_R4BYTE(0, REG_SC_BK3C_1B_L) & BIT(31)) >> 31; in HAL_XC_DIP_Check_Scale()
2793 *u32V_Scaling_Ratio = SC_R4BYTE(0, REG_SC_BK3C_1B_L) & BMASK(22:0); in HAL_XC_DIP_Check_Scale()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/ |
| H A D | mhal_dip.c | 911 DIP_W4BYTE(0, REG_SC_BK3C_1B_L, pDBreg->u32V_PreScalingRatio); // V pre-scaling in Hal_SC_DWIN_sw_db()
956 pDBreg->u32V_PreScalingRatio = DIP_R4BYTE(0, REG_SC_BK3C_1B_L,eWindow); in Hal_SC_DWIN_get_sw_db()
3460 *u16V_Scaling_Enable = (SC_R4BYTE(0, REG_SC_BK3C_1B_L) & BIT(31)) >> 31; in HAL_XC_DIP_Check_Scale()
3461 *u32V_Scaling_Ratio = SC_R4BYTE(0, REG_SC_BK3C_1B_L) & BMASK(22:0); in HAL_XC_DIP_Check_Scale()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/ |
| H A D | mhal_dip.c | 912 DIP_W4BYTE(0, REG_SC_BK3C_1B_L, pDBreg->u32V_PreScalingRatio); // V pre-scaling in Hal_SC_DWIN_sw_db()
957 pDBreg->u32V_PreScalingRatio = DIP_R4BYTE(0, REG_SC_BK3C_1B_L,eWindow); in Hal_SC_DWIN_get_sw_db()
3408 *u16V_Scaling_Enable = (SC_R4BYTE(0, REG_SC_BK3C_1B_L) & BIT(31)) >> 31; in HAL_XC_DIP_Check_Scale()
3409 *u32V_Scaling_Ratio = SC_R4BYTE(0, REG_SC_BK3C_1B_L) & BMASK(22:0); in HAL_XC_DIP_Check_Scale()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/ |
| H A D | mhal_dip.c | 912 DIP_W4BYTE(0, REG_SC_BK3C_1B_L, pDBreg->u32V_PreScalingRatio); // V pre-scaling in Hal_SC_DWIN_sw_db()
957 pDBreg->u32V_PreScalingRatio = DIP_R4BYTE(0, REG_SC_BK3C_1B_L,eWindow); in Hal_SC_DWIN_get_sw_db()
3462 *u16V_Scaling_Enable = (SC_R4BYTE(0, REG_SC_BK3C_1B_L) & BIT(31)) >> 31; in HAL_XC_DIP_Check_Scale()
3463 *u32V_Scaling_Ratio = SC_R4BYTE(0, REG_SC_BK3C_1B_L) & BMASK(22:0); in HAL_XC_DIP_Check_Scale()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/ |
| H A D | mhal_dip.c | 912 DIP_W4BYTE(0, REG_SC_BK3C_1B_L, pDBreg->u32V_PreScalingRatio); // V pre-scaling in Hal_SC_DWIN_sw_db()
957 pDBreg->u32V_PreScalingRatio = DIP_R4BYTE(0, REG_SC_BK3C_1B_L,eWindow); in Hal_SC_DWIN_get_sw_db()
3412 *u16V_Scaling_Enable = (SC_R4BYTE(0, REG_SC_BK3C_1B_L) & BIT(31)) >> 31; in HAL_XC_DIP_Check_Scale()
3413 *u32V_Scaling_Ratio = SC_R4BYTE(0, REG_SC_BK3C_1B_L) & BMASK(22:0); in HAL_XC_DIP_Check_Scale()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/ |
| H A D | mhal_dip.c | 408 SC_W4BYTE(0, REG_SC_BK3C_1B_L, pDBreg->u32V_PreScalingRatio); // V pre-scaling in Hal_SC_DWIN_sw_db()
447 pDBreg->u32V_PreScalingRatio = SC_R4BYTE(0, REG_SC_BK3C_1B_L); in Hal_SC_DWIN_get_sw_db()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/ |
| H A D | mhal_dip.c | 406 SC_W4BYTE(0, REG_SC_BK3C_1B_L, pDBreg->u32V_PreScalingRatio); // V pre-scaling in Hal_SC_DWIN_sw_db()
445 pDBreg->u32V_PreScalingRatio = SC_R4BYTE(0, REG_SC_BK3C_1B_L); in Hal_SC_DWIN_get_sw_db()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/ |
| H A D | mhal_dip.c | 406 SC_W4BYTE(0, REG_SC_BK3C_1B_L, pDBreg->u32V_PreScalingRatio); // V pre-scaling in Hal_SC_DWIN_sw_db()
445 pDBreg->u32V_PreScalingRatio = SC_R4BYTE(0, REG_SC_BK3C_1B_L); in Hal_SC_DWIN_get_sw_db()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/ |
| H A D | mhal_dip.c | 561 SC_W4BYTE(0, REG_SC_BK3C_1B_L, pDBreg->u32V_PreScalingRatio); // V pre-scaling in Hal_SC_DWIN_sw_db()
600 pDBreg->u32V_PreScalingRatio = SC_R4BYTE(0, REG_SC_BK3C_1B_L); in Hal_SC_DWIN_get_sw_db()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/ |
| H A D | mhal_dip.c | 530 SC_W4BYTE(0, REG_SC_BK3C_1B_L, pDBreg->u32V_PreScalingRatio); // V pre-scaling in Hal_SC_DWIN_sw_db()
569 pDBreg->u32V_PreScalingRatio = SC_R4BYTE(0, REG_SC_BK3C_1B_L); in Hal_SC_DWIN_get_sw_db()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/ |
| H A D | mhal_dip.c | 532 SC_W4BYTE(0, REG_SC_BK3C_1B_L, pDBreg->u32V_PreScalingRatio); // V pre-scaling in Hal_SC_DWIN_sw_db()
571 pDBreg->u32V_PreScalingRatio = SC_R4BYTE(0, REG_SC_BK3C_1B_L); in Hal_SC_DWIN_get_sw_db()
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| /utopia/UTPA2-700.0.x/modules/xc/drv/xc/include/ |
| H A D | hwreg_sc.h | 11706 #define REG_SC_BK3C_1B_L _PK_L_(0x3C, 0x1B) macro
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