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Searched refs:REG_SC_BK36_76_L (Results 1 – 11 of 11) sorted by relevance

/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/
H A Dmhal_dip.c2303 SC_W2BYTEMSK(0, REG_SC_BK36_76_L, 0, BMASK(14:13)); in HAL_XC_DIP_SetMiuSel()
2309 SC_W2BYTEMSK(0, REG_SC_BK36_76_L, BIT(13), BMASK(14:13)); in HAL_XC_DIP_SetMiuSel()
2315 SC_W2BYTEMSK(0, REG_SC_BK36_76_L, BIT(14), BMASK(14:13)); in HAL_XC_DIP_SetMiuSel()
2321 SC_W2BYTEMSK(0, REG_SC_BK36_76_L, BMASK(14:13), BMASK(14:13)); in HAL_XC_DIP_SetMiuSel()
2333 SC_W2BYTEMSK(0, REG_SC_BK36_76_L, 0, BMASK(14:13)); in HAL_XC_DIP_SetDIPRMiuSel()
2339 SC_W2BYTEMSK(0, REG_SC_BK36_76_L, BIT(13), BMASK(14:13)); in HAL_XC_DIP_SetDIPRMiuSel()
2345 SC_W2BYTEMSK(0, REG_SC_BK36_76_L, BIT(14), BMASK(14:13)); in HAL_XC_DIP_SetDIPRMiuSel()
2351 SC_W2BYTEMSK(0, REG_SC_BK36_76_L, BMASK(14:13), BMASK(14:13)); in HAL_XC_DIP_SetDIPRMiuSel()
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/
H A Dmhal_dip.c2305 SC_W2BYTEMSK(0, REG_SC_BK36_76_L, 0, BMASK(14:13)); in HAL_XC_DIP_SetMiuSel()
2311 SC_W2BYTEMSK(0, REG_SC_BK36_76_L, BIT(13), BMASK(14:13)); in HAL_XC_DIP_SetMiuSel()
2317 SC_W2BYTEMSK(0, REG_SC_BK36_76_L, BIT(14), BMASK(14:13)); in HAL_XC_DIP_SetMiuSel()
2323 SC_W2BYTEMSK(0, REG_SC_BK36_76_L, BMASK(14:13), BMASK(14:13)); in HAL_XC_DIP_SetMiuSel()
2335 SC_W2BYTEMSK(0, REG_SC_BK36_76_L, 0, BMASK(14:13)); in HAL_XC_DIP_SetDIPRMiuSel()
2341 SC_W2BYTEMSK(0, REG_SC_BK36_76_L, BIT(13), BMASK(14:13)); in HAL_XC_DIP_SetDIPRMiuSel()
2347 SC_W2BYTEMSK(0, REG_SC_BK36_76_L, BIT(14), BMASK(14:13)); in HAL_XC_DIP_SetDIPRMiuSel()
2353 SC_W2BYTEMSK(0, REG_SC_BK36_76_L, BMASK(14:13), BMASK(14:13)); in HAL_XC_DIP_SetDIPRMiuSel()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_dip.c2080 SC_W2BYTEMSK(0, REG_SC_BK36_76_L, 0, BMASK(14:13)); in HAL_XC_DIP_SetMiuSel()
2086 SC_W2BYTEMSK(0, REG_SC_BK36_76_L, BIT(13), BMASK(14:13)); in HAL_XC_DIP_SetMiuSel()
2092 SC_W2BYTEMSK(0, REG_SC_BK36_76_L, BIT(14), BMASK(14:13)); in HAL_XC_DIP_SetMiuSel()
2098 SC_W2BYTEMSK(0, REG_SC_BK36_76_L, BMASK(14:13), BMASK(14:13)); in HAL_XC_DIP_SetMiuSel()
2111 SC_W2BYTEMSK(0, REG_SC_BK36_76_L, 0, BMASK(14:13)); in HAL_XC_DIP_SetDIPRMiuSel()
2117 SC_W2BYTEMSK(0, REG_SC_BK36_76_L, BIT(13), BMASK(14:13)); in HAL_XC_DIP_SetDIPRMiuSel()
2123 SC_W2BYTEMSK(0, REG_SC_BK36_76_L, BIT(14), BMASK(14:13)); in HAL_XC_DIP_SetDIPRMiuSel()
2129 SC_W2BYTEMSK(0, REG_SC_BK36_76_L, BMASK(14:13), BMASK(14:13)); in HAL_XC_DIP_SetDIPRMiuSel()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_dip.c2716 DIP_W2BYTEMSK(0, REG_SC_BK36_76_L, 0, BMASK(14:13)); in HAL_XC_DIP_SetMiuSel()
2722 DIP_W2BYTEMSK(0, REG_SC_BK36_76_L, BIT(13), BMASK(14:13)); in HAL_XC_DIP_SetMiuSel()
2728 DIP_W2BYTEMSK(0, REG_SC_BK36_76_L, BIT(14), BMASK(14:13)); in HAL_XC_DIP_SetMiuSel()
2734 DIP_W2BYTEMSK(0, REG_SC_BK36_76_L, BMASK(14:13), BMASK(14:13)); in HAL_XC_DIP_SetMiuSel()
2747 DIP_W2BYTEMSK(0, REG_SC_BK36_76_L, 0, BMASK(14:13)); in HAL_XC_DIP_SetDIPRMiuSel()
2753 DIP_W2BYTEMSK(0, REG_SC_BK36_76_L, BIT(13), BMASK(14:13)); in HAL_XC_DIP_SetDIPRMiuSel()
2759 DIP_W2BYTEMSK(0, REG_SC_BK36_76_L, BIT(14), BMASK(14:13)); in HAL_XC_DIP_SetDIPRMiuSel()
2765 DIP_W2BYTEMSK(0, REG_SC_BK36_76_L, BMASK(14:13), BMASK(14:13)); in HAL_XC_DIP_SetDIPRMiuSel()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_dip.c2671 DIP_W2BYTEMSK(0, REG_SC_BK36_76_L, 0, BMASK(14:13)); in HAL_XC_DIP_SetMiuSel()
2677 DIP_W2BYTEMSK(0, REG_SC_BK36_76_L, BIT(13), BMASK(14:13)); in HAL_XC_DIP_SetMiuSel()
2683 DIP_W2BYTEMSK(0, REG_SC_BK36_76_L, BIT(14), BMASK(14:13)); in HAL_XC_DIP_SetMiuSel()
2689 DIP_W2BYTEMSK(0, REG_SC_BK36_76_L, BMASK(14:13), BMASK(14:13)); in HAL_XC_DIP_SetMiuSel()
2702 DIP_W2BYTEMSK(0, REG_SC_BK36_76_L, 0, BMASK(14:13)); in HAL_XC_DIP_SetDIPRMiuSel()
2708 DIP_W2BYTEMSK(0, REG_SC_BK36_76_L, BIT(13), BMASK(14:13)); in HAL_XC_DIP_SetDIPRMiuSel()
2714 DIP_W2BYTEMSK(0, REG_SC_BK36_76_L, BIT(14), BMASK(14:13)); in HAL_XC_DIP_SetDIPRMiuSel()
2720 DIP_W2BYTEMSK(0, REG_SC_BK36_76_L, BMASK(14:13), BMASK(14:13)); in HAL_XC_DIP_SetDIPRMiuSel()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_dip.c2717 DIP_W2BYTEMSK(0, REG_SC_BK36_76_L, 0, BMASK(14:13)); in HAL_XC_DIP_SetMiuSel()
2723 DIP_W2BYTEMSK(0, REG_SC_BK36_76_L, BIT(13), BMASK(14:13)); in HAL_XC_DIP_SetMiuSel()
2729 DIP_W2BYTEMSK(0, REG_SC_BK36_76_L, BIT(14), BMASK(14:13)); in HAL_XC_DIP_SetMiuSel()
2735 DIP_W2BYTEMSK(0, REG_SC_BK36_76_L, BMASK(14:13), BMASK(14:13)); in HAL_XC_DIP_SetMiuSel()
2748 DIP_W2BYTEMSK(0, REG_SC_BK36_76_L, 0, BMASK(14:13)); in HAL_XC_DIP_SetDIPRMiuSel()
2754 DIP_W2BYTEMSK(0, REG_SC_BK36_76_L, BIT(13), BMASK(14:13)); in HAL_XC_DIP_SetDIPRMiuSel()
2760 DIP_W2BYTEMSK(0, REG_SC_BK36_76_L, BIT(14), BMASK(14:13)); in HAL_XC_DIP_SetDIPRMiuSel()
2766 DIP_W2BYTEMSK(0, REG_SC_BK36_76_L, BMASK(14:13), BMASK(14:13)); in HAL_XC_DIP_SetDIPRMiuSel()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_dip.c2671 DIP_W2BYTEMSK(0, REG_SC_BK36_76_L, 0, BMASK(14:13)); in HAL_XC_DIP_SetMiuSel()
2677 DIP_W2BYTEMSK(0, REG_SC_BK36_76_L, BIT(13), BMASK(14:13)); in HAL_XC_DIP_SetMiuSel()
2683 DIP_W2BYTEMSK(0, REG_SC_BK36_76_L, BIT(14), BMASK(14:13)); in HAL_XC_DIP_SetMiuSel()
2689 DIP_W2BYTEMSK(0, REG_SC_BK36_76_L, BMASK(14:13), BMASK(14:13)); in HAL_XC_DIP_SetMiuSel()
2702 DIP_W2BYTEMSK(0, REG_SC_BK36_76_L, 0, BMASK(14:13)); in HAL_XC_DIP_SetDIPRMiuSel()
2708 DIP_W2BYTEMSK(0, REG_SC_BK36_76_L, BIT(13), BMASK(14:13)); in HAL_XC_DIP_SetDIPRMiuSel()
2714 DIP_W2BYTEMSK(0, REG_SC_BK36_76_L, BIT(14), BMASK(14:13)); in HAL_XC_DIP_SetDIPRMiuSel()
2720 DIP_W2BYTEMSK(0, REG_SC_BK36_76_L, BMASK(14:13), BMASK(14:13)); in HAL_XC_DIP_SetDIPRMiuSel()
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_dip.c2203 SC_W2BYTEMSK(0, REG_SC_BK36_76_L, 0, BMASK(14:13)); in HAL_XC_DIP_SetMiuSel()
2209 SC_W2BYTEMSK(0, REG_SC_BK36_76_L, BIT(13), BMASK(14:13)); in HAL_XC_DIP_SetMiuSel()
2215 SC_W2BYTEMSK(0, REG_SC_BK36_76_L, BIT(14), BMASK(14:13)); in HAL_XC_DIP_SetMiuSel()
2221 SC_W2BYTEMSK(0, REG_SC_BK36_76_L, BMASK(14:13), BMASK(14:13)); in HAL_XC_DIP_SetMiuSel()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/
H A Dmhal_dip.c2848 DIP_W2BYTEMSK(0, REG_SC_BK36_76_L, 0, BIT(15)); in HAL_XC_DIP_SetDIPRMiuSel()
2850 DIP_W2BYTEMSK(0, REG_SC_BK36_76_L, BIT(15), BIT(15)); in HAL_XC_DIP_SetDIPRMiuSel()
2872 DIP_W2BYTEMSK(0, REG_SC_BK36_76_L, 0, BMASK(14:13)); in HAL_XC_DIP_SetDIPRMiuSel()
2876 DIP_W2BYTEMSK(0, REG_SC_BK36_76_L, BIT(13), BMASK(14:13)); in HAL_XC_DIP_SetDIPRMiuSel()
2880 DIP_W2BYTEMSK(0, REG_SC_BK36_76_L, BIT(14), BMASK(14:13)); in HAL_XC_DIP_SetDIPRMiuSel()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/
H A Dmhal_dip.c3044 DIP_W2BYTEMSK(0, REG_SC_BK36_76_L, 0, BIT(15)); in HAL_XC_DIP_SetDIPRMiuSel()
3046 DIP_W2BYTEMSK(0, REG_SC_BK36_76_L, BIT(15), BIT(15)); in HAL_XC_DIP_SetDIPRMiuSel()
3068 DIP_W2BYTEMSK(0, REG_SC_BK36_76_L, 0, BMASK(14:13)); in HAL_XC_DIP_SetDIPRMiuSel()
3072 DIP_W2BYTEMSK(0, REG_SC_BK36_76_L, BIT(13), BMASK(14:13)); in HAL_XC_DIP_SetDIPRMiuSel()
3076 DIP_W2BYTEMSK(0, REG_SC_BK36_76_L, BIT(14), BMASK(14:13)); in HAL_XC_DIP_SetDIPRMiuSel()
/utopia/UTPA2-700.0.x/modules/xc/drv/xc/include/
H A Dhwreg_sc.h11270 #define REG_SC_BK36_76_L _PK_L_(0x36, 0x76) macro