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Searched refs:REG_SC_BK05_23_L (Results 1 – 25 of 63) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/pq/hal/mooney/pq/
H A Dmhal_pq_adaptive.c2071 MApi_XC_W2BYTEMSK(REG_SC_BK05_23_L, 0x0010, 0x00FF); //c value gain in MDrv_SC_Amber5_DHD_driver1()
2077 MApi_XC_W2BYTEMSK(REG_SC_BK05_23_L, 0x0020, 0x00FF); //c value gain in MDrv_SC_Amber5_DHD_driver1()
2083 MApi_XC_W2BYTEMSK(REG_SC_BK05_23_L, 0x0020, 0x00FF); //c value gain in MDrv_SC_Amber5_DHD_driver1()
2089 MApi_XC_W2BYTEMSK(REG_SC_BK05_23_L, 0x0030, 0x00FF); //c value gain in MDrv_SC_Amber5_DHD_driver1()
2095 MApi_XC_W2BYTEMSK(REG_SC_BK05_23_L, 0x0040, 0x00FF); //c value gain in MDrv_SC_Amber5_DHD_driver1()
2101 MApi_XC_W2BYTEMSK(REG_SC_BK05_23_L, 0x0050, 0x00FF); //c value gain in MDrv_SC_Amber5_DHD_driver1()
2107 MApi_XC_W2BYTEMSK(REG_SC_BK05_23_L, 0x0060, 0x00FF); //c value gain in MDrv_SC_Amber5_DHD_driver1()
2113 MApi_XC_W2BYTEMSK(REG_SC_BK05_23_L, 0x0070, 0x00FF); //c value gain in MDrv_SC_Amber5_DHD_driver1()
2119 MApi_XC_W2BYTEMSK(REG_SC_BK05_23_L, 0x0080, 0x00FF); //c value gain in MDrv_SC_Amber5_DHD_driver1()
2125 MApi_XC_W2BYTEMSK(REG_SC_BK05_23_L, 0x0090, 0x00FF); //c value gain in MDrv_SC_Amber5_DHD_driver1()
[all …]
/utopia/UTPA2-700.0.x/modules/pq/hal/curry/pq/
H A Dmhal_pq_adaptive.c2728 MApi_XC_W2BYTEMSK(REG_SC_BK05_23_L, 0x0010, 0x00FF); //c value gain in MDrv_SC_Amber5_DHD_driver1()
2734 MApi_XC_W2BYTEMSK(REG_SC_BK05_23_L, 0x0020, 0x00FF); //c value gain in MDrv_SC_Amber5_DHD_driver1()
2740 MApi_XC_W2BYTEMSK(REG_SC_BK05_23_L, 0x0020, 0x00FF); //c value gain in MDrv_SC_Amber5_DHD_driver1()
2746 MApi_XC_W2BYTEMSK(REG_SC_BK05_23_L, 0x0030, 0x00FF); //c value gain in MDrv_SC_Amber5_DHD_driver1()
2752 MApi_XC_W2BYTEMSK(REG_SC_BK05_23_L, 0x0040, 0x00FF); //c value gain in MDrv_SC_Amber5_DHD_driver1()
2758 MApi_XC_W2BYTEMSK(REG_SC_BK05_23_L, 0x0050, 0x00FF); //c value gain in MDrv_SC_Amber5_DHD_driver1()
2764 MApi_XC_W2BYTEMSK(REG_SC_BK05_23_L, 0x0060, 0x00FF); //c value gain in MDrv_SC_Amber5_DHD_driver1()
2770 MApi_XC_W2BYTEMSK(REG_SC_BK05_23_L, 0x0070, 0x00FF); //c value gain in MDrv_SC_Amber5_DHD_driver1()
2776 MApi_XC_W2BYTEMSK(REG_SC_BK05_23_L, 0x0080, 0x00FF); //c value gain in MDrv_SC_Amber5_DHD_driver1()
2782 MApi_XC_W2BYTEMSK(REG_SC_BK05_23_L, 0x0090, 0x00FF); //c value gain in MDrv_SC_Amber5_DHD_driver1()
[all …]
/utopia/UTPA2-700.0.x/modules/pq/hal/kano/pq/
H A Dmhal_pq_adaptive.c2728 MApi_XC_W2BYTEMSK(REG_SC_BK05_23_L, 0x0010, 0x00FF); //c value gain in MDrv_SC_Amber5_DHD_driver1()
2734 MApi_XC_W2BYTEMSK(REG_SC_BK05_23_L, 0x0020, 0x00FF); //c value gain in MDrv_SC_Amber5_DHD_driver1()
2740 MApi_XC_W2BYTEMSK(REG_SC_BK05_23_L, 0x0020, 0x00FF); //c value gain in MDrv_SC_Amber5_DHD_driver1()
2746 MApi_XC_W2BYTEMSK(REG_SC_BK05_23_L, 0x0030, 0x00FF); //c value gain in MDrv_SC_Amber5_DHD_driver1()
2752 MApi_XC_W2BYTEMSK(REG_SC_BK05_23_L, 0x0040, 0x00FF); //c value gain in MDrv_SC_Amber5_DHD_driver1()
2758 MApi_XC_W2BYTEMSK(REG_SC_BK05_23_L, 0x0050, 0x00FF); //c value gain in MDrv_SC_Amber5_DHD_driver1()
2764 MApi_XC_W2BYTEMSK(REG_SC_BK05_23_L, 0x0060, 0x00FF); //c value gain in MDrv_SC_Amber5_DHD_driver1()
2770 MApi_XC_W2BYTEMSK(REG_SC_BK05_23_L, 0x0070, 0x00FF); //c value gain in MDrv_SC_Amber5_DHD_driver1()
2776 MApi_XC_W2BYTEMSK(REG_SC_BK05_23_L, 0x0080, 0x00FF); //c value gain in MDrv_SC_Amber5_DHD_driver1()
2782 MApi_XC_W2BYTEMSK(REG_SC_BK05_23_L, 0x0090, 0x00FF); //c value gain in MDrv_SC_Amber5_DHD_driver1()
[all …]
/utopia/UTPA2-700.0.x/modules/pq/hal/k6/pq/
H A Dmhal_pq_adaptive.c2728 MApi_XC_W2BYTEMSK(REG_SC_BK05_23_L, 0x0010, 0x00FF); //c value gain in MDrv_SC_Amber5_DHD_driver1()
2734 MApi_XC_W2BYTEMSK(REG_SC_BK05_23_L, 0x0020, 0x00FF); //c value gain in MDrv_SC_Amber5_DHD_driver1()
2740 MApi_XC_W2BYTEMSK(REG_SC_BK05_23_L, 0x0020, 0x00FF); //c value gain in MDrv_SC_Amber5_DHD_driver1()
2746 MApi_XC_W2BYTEMSK(REG_SC_BK05_23_L, 0x0030, 0x00FF); //c value gain in MDrv_SC_Amber5_DHD_driver1()
2752 MApi_XC_W2BYTEMSK(REG_SC_BK05_23_L, 0x0040, 0x00FF); //c value gain in MDrv_SC_Amber5_DHD_driver1()
2758 MApi_XC_W2BYTEMSK(REG_SC_BK05_23_L, 0x0050, 0x00FF); //c value gain in MDrv_SC_Amber5_DHD_driver1()
2764 MApi_XC_W2BYTEMSK(REG_SC_BK05_23_L, 0x0060, 0x00FF); //c value gain in MDrv_SC_Amber5_DHD_driver1()
2770 MApi_XC_W2BYTEMSK(REG_SC_BK05_23_L, 0x0070, 0x00FF); //c value gain in MDrv_SC_Amber5_DHD_driver1()
2776 MApi_XC_W2BYTEMSK(REG_SC_BK05_23_L, 0x0080, 0x00FF); //c value gain in MDrv_SC_Amber5_DHD_driver1()
2782 MApi_XC_W2BYTEMSK(REG_SC_BK05_23_L, 0x0090, 0x00FF); //c value gain in MDrv_SC_Amber5_DHD_driver1()
[all …]
/utopia/UTPA2-700.0.x/modules/pq/hal/k6lite/pq/
H A Dmhal_pq_adaptive.c2728 MApi_XC_W2BYTEMSK(REG_SC_BK05_23_L, 0x0010, 0x00FF); //c value gain in MDrv_SC_Amber5_DHD_driver1()
2734 MApi_XC_W2BYTEMSK(REG_SC_BK05_23_L, 0x0020, 0x00FF); //c value gain in MDrv_SC_Amber5_DHD_driver1()
2740 MApi_XC_W2BYTEMSK(REG_SC_BK05_23_L, 0x0020, 0x00FF); //c value gain in MDrv_SC_Amber5_DHD_driver1()
2746 MApi_XC_W2BYTEMSK(REG_SC_BK05_23_L, 0x0030, 0x00FF); //c value gain in MDrv_SC_Amber5_DHD_driver1()
2752 MApi_XC_W2BYTEMSK(REG_SC_BK05_23_L, 0x0040, 0x00FF); //c value gain in MDrv_SC_Amber5_DHD_driver1()
2758 MApi_XC_W2BYTEMSK(REG_SC_BK05_23_L, 0x0050, 0x00FF); //c value gain in MDrv_SC_Amber5_DHD_driver1()
2764 MApi_XC_W2BYTEMSK(REG_SC_BK05_23_L, 0x0060, 0x00FF); //c value gain in MDrv_SC_Amber5_DHD_driver1()
2770 MApi_XC_W2BYTEMSK(REG_SC_BK05_23_L, 0x0070, 0x00FF); //c value gain in MDrv_SC_Amber5_DHD_driver1()
2776 MApi_XC_W2BYTEMSK(REG_SC_BK05_23_L, 0x0080, 0x00FF); //c value gain in MDrv_SC_Amber5_DHD_driver1()
2782 MApi_XC_W2BYTEMSK(REG_SC_BK05_23_L, 0x0090, 0x00FF); //c value gain in MDrv_SC_Amber5_DHD_driver1()
[all …]
/utopia/UTPA2-700.0.x/modules/pq/hal/mooney/pq/include/
H A DMooney_Main.c4772 { PQ_MAP_REG(REG_SC_BK05_23_L), 0xFF, 0x00/*OFF*/,
/utopia/UTPA2-700.0.x/modules/pq/hal/maserati/pq/include/
H A DMaserati_Main.c5900 { PQ_MAP_REG(REG_SC_BK05_23_L), 0xFF, 0x00/*OFF*/,
/utopia/UTPA2-700.0.x/modules/pq/hal/M7821/pq/include/
H A DMaserati_Main.c8276 { PQ_MAP_REG(REG_SC_BK05_23_L), 0xFF, 0x00/*OFF*/,
/utopia/UTPA2-700.0.x/modules/pq/hal/manhattan/pq/include/
H A DManhattan_Main.c5826 { PQ_MAP_REG(REG_SC_BK05_23_L), 0xFF, 0x00/*OFF*/,
/utopia/UTPA2-700.0.x/modules/wble/hal/manhattan/wble/include/
H A Dhwreg_wble.h1484 #define REG_SC_BK05_23_L _PK_L_(0x05, 0x23) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/ace/include/
H A Dhwreg_ace.h1484 #define REG_SC_BK05_23_L _PK_L_(0x05, 0x23) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/k6/dlc/include/
H A Dhwreg_dlc.h1486 #define REG_SC_BK05_23_L _PK_L_(0x05, 0x23) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/ace/include/
H A Dhwreg_ace.h1484 #define REG_SC_BK05_23_L _PK_L_(0x05, 0x23) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/manhattan/dlc/include/
H A Dhwreg_dlc.h1486 #define REG_SC_BK05_23_L _PK_L_(0x05, 0x23) macro
/utopia/UTPA2-700.0.x/modules/pq/hal/maxim/pq/include/
H A DMaxim_Main.c8263 { PQ_MAP_REG(REG_SC_BK05_23_L), 0xFF, 0x00/*OFF*/,
/utopia/UTPA2-700.0.x/modules/wble/hal/macan/wble/include/
H A Dhwreg_wble.h1484 #define REG_SC_BK05_23_L _PK_L_(0x05, 0x23) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/curry/dlc/include/
H A Dhwreg_dlc.h1486 #define REG_SC_BK05_23_L _PK_L_(0x05, 0x23) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/ace/include/
H A Dhwreg_ace.h1484 #define REG_SC_BK05_23_L _PK_L_(0x05, 0x23) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/M7821/dlc/include/
H A Dhwreg_dlc.h1486 #define REG_SC_BK05_23_L _PK_L_(0x05, 0x23) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/ace/include/
H A Dhwreg_ace.h1484 #define REG_SC_BK05_23_L _PK_L_(0x05, 0x23) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/messi/dlc/include/
H A Dhwreg_dlc.h1486 #define REG_SC_BK05_23_L _PK_L_(0x05, 0x23) macro
/utopia/UTPA2-700.0.x/modules/wble/hal/messi/wble/include/
H A Dhwreg_wble.h1484 #define REG_SC_BK05_23_L _PK_L_(0x05, 0x23) macro
/utopia/UTPA2-700.0.x/modules/wble/hal/M7821/wble/include/
H A Dhwreg_wble.h1484 #define REG_SC_BK05_23_L _PK_L_(0x05, 0x23) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/ace/include/
H A Dhwreg_ace.h1484 #define REG_SC_BK05_23_L _PK_L_(0x05, 0x23) macro
/utopia/UTPA2-700.0.x/modules/wble/hal/maxim/wble/include/
H A Dhwreg_wble.h1484 #define REG_SC_BK05_23_L _PK_L_(0x05, 0x23) macro

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