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Searched refs:REG_PM_SLEEP_03_L (Results 1 – 25 of 28) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_hdmi.c301 W2BYTEMSK(REG_PM_SLEEP_03_L, bCheckClockStable? 0: BIT(1), BIT(1)); in _Hal_tmds_GetClockValidFlag()
312 W2BYTEMSK(REG_PM_SLEEP_03_L, bCheckClockStable? 0: BIT(2), BIT(2)); in _Hal_tmds_GetClockValidFlag()
323 W2BYTEMSK(REG_PM_SLEEP_03_L, bCheckClockStable? 0: BIT(3), BIT(3)); in _Hal_tmds_GetClockValidFlag()
334 W2BYTEMSK(REG_PM_SLEEP_03_L, bCheckClockStable? 0: BIT(4), BIT(4)); in _Hal_tmds_GetClockValidFlag()
608 W2BYTEMSK(REG_PM_SLEEP_03_L, 0, BIT(1)); in _Hal_tmds_ClockStatusInitial()
617 W2BYTEMSK(REG_PM_SLEEP_03_L, 0, BIT(2)); in _Hal_tmds_ClockStatusInitial()
626 W2BYTEMSK(REG_PM_SLEEP_03_L, 0, BIT(3)); in _Hal_tmds_ClockStatusInitial()
635 W2BYTEMSK(REG_PM_SLEEP_03_L, 0, BIT(4)); in _Hal_tmds_ClockStatusInitial()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_hdmi.c321 W2BYTEMSK(REG_PM_SLEEP_03_L, bCheckClockStable? 0: BIT(1), BIT(1)); in _Hal_tmds_GetClockValidFlag()
332 W2BYTEMSK(REG_PM_SLEEP_03_L, bCheckClockStable? 0: BIT(2), BIT(2)); in _Hal_tmds_GetClockValidFlag()
343 W2BYTEMSK(REG_PM_SLEEP_03_L, bCheckClockStable? 0: BIT(3), BIT(3)); in _Hal_tmds_GetClockValidFlag()
354 W2BYTEMSK(REG_PM_SLEEP_03_L, bCheckClockStable? 0: BIT(4), BIT(4)); in _Hal_tmds_GetClockValidFlag()
680 W2BYTEMSK(REG_PM_SLEEP_03_L, 0, BIT(1)); in _Hal_tmds_ClockStatusInitial()
689 W2BYTEMSK(REG_PM_SLEEP_03_L, 0, BIT(2)); in _Hal_tmds_ClockStatusInitial()
698 W2BYTEMSK(REG_PM_SLEEP_03_L, 0, BIT(3)); in _Hal_tmds_ClockStatusInitial()
707 W2BYTEMSK(REG_PM_SLEEP_03_L, 0, BIT(4)); in _Hal_tmds_ClockStatusInitial()
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_hdmi.c304 W2BYTEMSK(REG_PM_SLEEP_03_L, bCheckClockStable? 0: BIT(1), BIT(1)); in _Hal_tmds_GetClockValidFlag()
315 W2BYTEMSK(REG_PM_SLEEP_03_L, bCheckClockStable? 0: BIT(2), BIT(2)); in _Hal_tmds_GetClockValidFlag()
326 W2BYTEMSK(REG_PM_SLEEP_03_L, bCheckClockStable? 0: BIT(3), BIT(3)); in _Hal_tmds_GetClockValidFlag()
337 W2BYTEMSK(REG_PM_SLEEP_03_L, bCheckClockStable? 0: BIT(4), BIT(4)); in _Hal_tmds_GetClockValidFlag()
611 W2BYTEMSK(REG_PM_SLEEP_03_L, 0, BIT(1)); in _Hal_tmds_ClockStatusInitial()
620 W2BYTEMSK(REG_PM_SLEEP_03_L, 0, BIT(2)); in _Hal_tmds_ClockStatusInitial()
629 W2BYTEMSK(REG_PM_SLEEP_03_L, 0, BIT(3)); in _Hal_tmds_ClockStatusInitial()
638 W2BYTEMSK(REG_PM_SLEEP_03_L, 0, BIT(4)); in _Hal_tmds_ClockStatusInitial()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_hdmi.c304 W2BYTEMSK(REG_PM_SLEEP_03_L, bCheckClockStable? 0: BIT(1), BIT(1)); in _Hal_tmds_GetClockValidFlag()
315 W2BYTEMSK(REG_PM_SLEEP_03_L, bCheckClockStable? 0: BIT(2), BIT(2)); in _Hal_tmds_GetClockValidFlag()
326 W2BYTEMSK(REG_PM_SLEEP_03_L, bCheckClockStable? 0: BIT(3), BIT(3)); in _Hal_tmds_GetClockValidFlag()
337 W2BYTEMSK(REG_PM_SLEEP_03_L, bCheckClockStable? 0: BIT(4), BIT(4)); in _Hal_tmds_GetClockValidFlag()
611 W2BYTEMSK(REG_PM_SLEEP_03_L, 0, BIT(1)); in _Hal_tmds_ClockStatusInitial()
620 W2BYTEMSK(REG_PM_SLEEP_03_L, 0, BIT(2)); in _Hal_tmds_ClockStatusInitial()
629 W2BYTEMSK(REG_PM_SLEEP_03_L, 0, BIT(3)); in _Hal_tmds_ClockStatusInitial()
638 W2BYTEMSK(REG_PM_SLEEP_03_L, 0, BIT(4)); in _Hal_tmds_ClockStatusInitial()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_hdmi.c387 W2BYTEMSK(REG_PM_SLEEP_03_L, bCheckClockStable? 0: BIT(1), BIT(1)); in _Hal_tmds_GetClockValidFlag()
398 W2BYTEMSK(REG_PM_SLEEP_03_L, bCheckClockStable? 0: BIT(2), BIT(2)); in _Hal_tmds_GetClockValidFlag()
409 W2BYTEMSK(REG_PM_SLEEP_03_L, bCheckClockStable? 0: BIT(3), BIT(3)); in _Hal_tmds_GetClockValidFlag()
420 W2BYTEMSK(REG_PM_SLEEP_03_L, bCheckClockStable? 0: BIT(4), BIT(4)); in _Hal_tmds_GetClockValidFlag()
746 W2BYTEMSK(REG_PM_SLEEP_03_L, 0, BIT(1)); in _Hal_tmds_ClockStatusInitial()
755 W2BYTEMSK(REG_PM_SLEEP_03_L, 0, BIT(2)); in _Hal_tmds_ClockStatusInitial()
764 W2BYTEMSK(REG_PM_SLEEP_03_L, 0, BIT(3)); in _Hal_tmds_ClockStatusInitial()
773 W2BYTEMSK(REG_PM_SLEEP_03_L, 0, BIT(4)); in _Hal_tmds_ClockStatusInitial()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_hdmi.c304 W2BYTEMSK(REG_PM_SLEEP_03_L, bCheckClockStable? 0: BIT(1), BIT(1)); in _Hal_tmds_GetClockValidFlag()
315 W2BYTEMSK(REG_PM_SLEEP_03_L, bCheckClockStable? 0: BIT(2), BIT(2)); in _Hal_tmds_GetClockValidFlag()
326 W2BYTEMSK(REG_PM_SLEEP_03_L, bCheckClockStable? 0: BIT(3), BIT(3)); in _Hal_tmds_GetClockValidFlag()
337 W2BYTEMSK(REG_PM_SLEEP_03_L, bCheckClockStable? 0: BIT(4), BIT(4)); in _Hal_tmds_GetClockValidFlag()
611 W2BYTEMSK(REG_PM_SLEEP_03_L, 0, BIT(1)); in _Hal_tmds_ClockStatusInitial()
620 W2BYTEMSK(REG_PM_SLEEP_03_L, 0, BIT(2)); in _Hal_tmds_ClockStatusInitial()
629 W2BYTEMSK(REG_PM_SLEEP_03_L, 0, BIT(3)); in _Hal_tmds_ClockStatusInitial()
638 W2BYTEMSK(REG_PM_SLEEP_03_L, 0, BIT(4)); in _Hal_tmds_ClockStatusInitial()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_hdmi.c387 W2BYTEMSK(REG_PM_SLEEP_03_L, bCheckClockStable? 0: BIT(1), BIT(1)); in _Hal_tmds_GetClockValidFlag()
398 W2BYTEMSK(REG_PM_SLEEP_03_L, bCheckClockStable? 0: BIT(2), BIT(2)); in _Hal_tmds_GetClockValidFlag()
409 W2BYTEMSK(REG_PM_SLEEP_03_L, bCheckClockStable? 0: BIT(3), BIT(3)); in _Hal_tmds_GetClockValidFlag()
420 W2BYTEMSK(REG_PM_SLEEP_03_L, bCheckClockStable? 0: BIT(4), BIT(4)); in _Hal_tmds_GetClockValidFlag()
746 W2BYTEMSK(REG_PM_SLEEP_03_L, 0, BIT(1)); in _Hal_tmds_ClockStatusInitial()
755 W2BYTEMSK(REG_PM_SLEEP_03_L, 0, BIT(2)); in _Hal_tmds_ClockStatusInitial()
764 W2BYTEMSK(REG_PM_SLEEP_03_L, 0, BIT(3)); in _Hal_tmds_ClockStatusInitial()
773 W2BYTEMSK(REG_PM_SLEEP_03_L, 0, BIT(4)); in _Hal_tmds_ClockStatusInitial()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/
H A Dmhal_hdmi.c308 W2BYTEMSK(REG_PM_SLEEP_03_L, bCheckClockStable? 0: BIT(1), BIT(1)); in _Hal_tmds_GetClockValidFlag()
319 W2BYTEMSK(REG_PM_SLEEP_03_L, bCheckClockStable? 0: BIT(2), BIT(2)); in _Hal_tmds_GetClockValidFlag()
330 W2BYTEMSK(REG_PM_SLEEP_03_L, bCheckClockStable? 0: BIT(3), BIT(3)); in _Hal_tmds_GetClockValidFlag()
341 W2BYTEMSK(REG_PM_SLEEP_03_L, bCheckClockStable? 0: BIT(4), BIT(4)); in _Hal_tmds_GetClockValidFlag()
619 W2BYTEMSK(REG_PM_SLEEP_03_L, 0, BIT(1)); in _Hal_tmds_ClockStatusInitial()
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/
H A Dmhal_hdmi.c327 W2BYTEMSK(REG_PM_SLEEP_03_L, bCheckClockStable? 0: BIT(1), BIT(1)); in _Hal_tmds_GetClockValidFlag()
338 W2BYTEMSK(REG_PM_SLEEP_03_L, bCheckClockStable? 0: BIT(2), BIT(2)); in _Hal_tmds_GetClockValidFlag()
349 W2BYTEMSK(REG_PM_SLEEP_03_L, bCheckClockStable? 0: BIT(3), BIT(3)); in _Hal_tmds_GetClockValidFlag()
360 W2BYTEMSK(REG_PM_SLEEP_03_L, bCheckClockStable? 0: BIT(4), BIT(4)); in _Hal_tmds_GetClockValidFlag()
690 W2BYTEMSK(REG_PM_SLEEP_03_L, 0, BIT(1)); in _Hal_tmds_ClockStatusInitial()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/
H A Dmhal_hdmi.c308 W2BYTEMSK(REG_PM_SLEEP_03_L, bCheckClockStable? 0: BIT(1), BIT(1)); in _Hal_tmds_GetClockValidFlag()
319 W2BYTEMSK(REG_PM_SLEEP_03_L, bCheckClockStable? 0: BIT(2), BIT(2)); in _Hal_tmds_GetClockValidFlag()
330 W2BYTEMSK(REG_PM_SLEEP_03_L, bCheckClockStable? 0: BIT(3), BIT(3)); in _Hal_tmds_GetClockValidFlag()
341 W2BYTEMSK(REG_PM_SLEEP_03_L, bCheckClockStable? 0: BIT(4), BIT(4)); in _Hal_tmds_GetClockValidFlag()
619 W2BYTEMSK(REG_PM_SLEEP_03_L, 0, BIT(1)); in _Hal_tmds_ClockStatusInitial()
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/
H A Dmhal_hdmi.c327 W2BYTEMSK(REG_PM_SLEEP_03_L, bCheckClockStable? 0: BIT(1), BIT(1)); in _Hal_tmds_GetClockValidFlag()
338 W2BYTEMSK(REG_PM_SLEEP_03_L, bCheckClockStable? 0: BIT(2), BIT(2)); in _Hal_tmds_GetClockValidFlag()
349 W2BYTEMSK(REG_PM_SLEEP_03_L, bCheckClockStable? 0: BIT(3), BIT(3)); in _Hal_tmds_GetClockValidFlag()
360 W2BYTEMSK(REG_PM_SLEEP_03_L, bCheckClockStable? 0: BIT(4), BIT(4)); in _Hal_tmds_GetClockValidFlag()
690 W2BYTEMSK(REG_PM_SLEEP_03_L, 0, BIT(1)); in _Hal_tmds_ClockStatusInitial()
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dhwreg_pm_sleep.h107 #define REG_PM_SLEEP_03_L (REG_PM_SLEEP_BASE + 0x06) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/include/
H A Dhwreg_pm_sleep.h108 #define REG_PM_SLEEP_03_L (REG_PM_SLEEP_BASE + 0x06) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/include/
H A Dhwreg_pm_sleep.h108 #define REG_PM_SLEEP_03_L (REG_PM_SLEEP_BASE + 0x06) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dhwreg_pm_sleep.h107 #define REG_PM_SLEEP_03_L (REG_PM_SLEEP_BASE + 0x06) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/
H A Dmhal_hdmi.c282 W2BYTEMSK(REG_PM_SLEEP_03_L, bCheckClockStable? 0: BIT(1), BIT(1)); in _Hal_tmds_GetClockValidFlag()
355 W2BYTEMSK(REG_PM_SLEEP_03_L, 0, BIT(1)); in _Hal_tmds_ClockStatusInitial()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dhwreg_pm_sleep.h107 #define REG_PM_SLEEP_03_L (REG_PM_SLEEP_BASE + 0x06) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_pm_sleep.h107 #define REG_PM_SLEEP_03_L (REG_PM_SLEEP_BASE + 0x06) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dhwreg_pm_sleep.h108 #define REG_PM_SLEEP_03_L (REG_PM_SLEEP_BASE + 0x06) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dhwreg_pm_sleep.h107 #define REG_PM_SLEEP_03_L (REG_PM_SLEEP_BASE + 0x06) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dhwreg_pm_sleep.h107 #define REG_PM_SLEEP_03_L (REG_PM_SLEEP_BASE + 0x06) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dhwreg_pm_sleep.h108 #define REG_PM_SLEEP_03_L (REG_PM_SLEEP_BASE + 0x06) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_pm_sleep.h108 #define REG_PM_SLEEP_03_L (REG_PM_SLEEP_BASE + 0x06) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dhwreg_pm_sleep.h107 #define REG_PM_SLEEP_03_L (REG_PM_SLEEP_BASE + 0x06) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dhwreg_pm_sleep.h108 #define REG_PM_SLEEP_03_L (REG_PM_SLEEP_BASE + 0x06) macro

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