| /utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/ |
| H A D | hwreg_pm_sleep.h | 101 #define REG_PM_SLEEP_00_L (REG_PM_SLEEP_BASE + 0x00) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/include/ |
| H A D | hwreg_pm_sleep.h | 102 #define REG_PM_SLEEP_00_L (REG_PM_SLEEP_BASE + 0x00) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/include/ |
| H A D | hwreg_pm_sleep.h | 102 #define REG_PM_SLEEP_00_L (REG_PM_SLEEP_BASE + 0x00) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/ |
| H A D | hwreg_pm_sleep.h | 101 #define REG_PM_SLEEP_00_L (REG_PM_SLEEP_BASE + 0x00) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/ |
| H A D | mhal_hdmi.c | 606 W2BYTEMSK(REG_PM_SLEEP_00_L, 0, BIT(1)); // Clock status mask in _Hal_tmds_ClockStatusInitial()
615 W2BYTEMSK(REG_PM_SLEEP_00_L, 0, BIT(2)); // Clock status mask in _Hal_tmds_ClockStatusInitial()
624 W2BYTEMSK(REG_PM_SLEEP_00_L, 0, BIT(3)); // Clock status mask in _Hal_tmds_ClockStatusInitial()
633 W2BYTEMSK(REG_PM_SLEEP_00_L, 0, BIT(4)); // Clock status mask in _Hal_tmds_ClockStatusInitial()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/ |
| H A D | mhal_hdmi.c | 678 W2BYTEMSK(REG_PM_SLEEP_00_L, 0, BIT(1)); // Clock status mask in _Hal_tmds_ClockStatusInitial()
687 W2BYTEMSK(REG_PM_SLEEP_00_L, 0, BIT(2)); // Clock status mask in _Hal_tmds_ClockStatusInitial()
696 W2BYTEMSK(REG_PM_SLEEP_00_L, 0, BIT(3)); // Clock status mask in _Hal_tmds_ClockStatusInitial()
705 W2BYTEMSK(REG_PM_SLEEP_00_L, 0, BIT(4)); // Clock status mask in _Hal_tmds_ClockStatusInitial()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/ |
| H A D | mhal_hdmi.c | 609 W2BYTEMSK(REG_PM_SLEEP_00_L, 0, BIT(1)); // Clock status mask in _Hal_tmds_ClockStatusInitial()
618 W2BYTEMSK(REG_PM_SLEEP_00_L, 0, BIT(2)); // Clock status mask in _Hal_tmds_ClockStatusInitial()
627 W2BYTEMSK(REG_PM_SLEEP_00_L, 0, BIT(3)); // Clock status mask in _Hal_tmds_ClockStatusInitial()
636 W2BYTEMSK(REG_PM_SLEEP_00_L, 0, BIT(4)); // Clock status mask in _Hal_tmds_ClockStatusInitial()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/ |
| H A D | mhal_hdmi.c | 609 W2BYTEMSK(REG_PM_SLEEP_00_L, 0, BIT(1)); // Clock status mask in _Hal_tmds_ClockStatusInitial()
618 W2BYTEMSK(REG_PM_SLEEP_00_L, 0, BIT(2)); // Clock status mask in _Hal_tmds_ClockStatusInitial()
627 W2BYTEMSK(REG_PM_SLEEP_00_L, 0, BIT(3)); // Clock status mask in _Hal_tmds_ClockStatusInitial()
636 W2BYTEMSK(REG_PM_SLEEP_00_L, 0, BIT(4)); // Clock status mask in _Hal_tmds_ClockStatusInitial()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/ |
| H A D | mhal_hdmi.c | 744 W2BYTEMSK(REG_PM_SLEEP_00_L, 0, BIT(1)); // Clock status mask in _Hal_tmds_ClockStatusInitial()
753 W2BYTEMSK(REG_PM_SLEEP_00_L, 0, BIT(2)); // Clock status mask in _Hal_tmds_ClockStatusInitial()
762 W2BYTEMSK(REG_PM_SLEEP_00_L, 0, BIT(3)); // Clock status mask in _Hal_tmds_ClockStatusInitial()
771 W2BYTEMSK(REG_PM_SLEEP_00_L, 0, BIT(4)); // Clock status mask in _Hal_tmds_ClockStatusInitial()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/ |
| H A D | mhal_hdmi.c | 609 W2BYTEMSK(REG_PM_SLEEP_00_L, 0, BIT(1)); // Clock status mask in _Hal_tmds_ClockStatusInitial()
618 W2BYTEMSK(REG_PM_SLEEP_00_L, 0, BIT(2)); // Clock status mask in _Hal_tmds_ClockStatusInitial()
627 W2BYTEMSK(REG_PM_SLEEP_00_L, 0, BIT(3)); // Clock status mask in _Hal_tmds_ClockStatusInitial()
636 W2BYTEMSK(REG_PM_SLEEP_00_L, 0, BIT(4)); // Clock status mask in _Hal_tmds_ClockStatusInitial()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/ |
| H A D | mhal_hdmi.c | 744 W2BYTEMSK(REG_PM_SLEEP_00_L, 0, BIT(1)); // Clock status mask in _Hal_tmds_ClockStatusInitial()
753 W2BYTEMSK(REG_PM_SLEEP_00_L, 0, BIT(2)); // Clock status mask in _Hal_tmds_ClockStatusInitial()
762 W2BYTEMSK(REG_PM_SLEEP_00_L, 0, BIT(3)); // Clock status mask in _Hal_tmds_ClockStatusInitial()
771 W2BYTEMSK(REG_PM_SLEEP_00_L, 0, BIT(4)); // Clock status mask in _Hal_tmds_ClockStatusInitial()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/ |
| H A D | hwreg_pm_sleep.h | 101 #define REG_PM_SLEEP_00_L (REG_PM_SLEEP_BASE + 0x00) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/ |
| H A D | hwreg_pm_sleep.h | 101 #define REG_PM_SLEEP_00_L (REG_PM_SLEEP_BASE + 0x00) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/ |
| H A D | hwreg_pm_sleep.h | 102 #define REG_PM_SLEEP_00_L (REG_PM_SLEEP_BASE + 0x00) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/ |
| H A D | hwreg_pm_sleep.h | 101 #define REG_PM_SLEEP_00_L (REG_PM_SLEEP_BASE + 0x00) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/ |
| H A D | hwreg_pm_sleep.h | 101 #define REG_PM_SLEEP_00_L (REG_PM_SLEEP_BASE + 0x00) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/ |
| H A D | hwreg_pm_sleep.h | 102 #define REG_PM_SLEEP_00_L (REG_PM_SLEEP_BASE + 0x00) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/ |
| H A D | hwreg_pm_sleep.h | 102 #define REG_PM_SLEEP_00_L (REG_PM_SLEEP_BASE + 0x00) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/ |
| H A D | hwreg_pm_sleep.h | 101 #define REG_PM_SLEEP_00_L (REG_PM_SLEEP_BASE + 0x00) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/ |
| H A D | hwreg_pm_sleep.h | 102 #define REG_PM_SLEEP_00_L (REG_PM_SLEEP_BASE + 0x00) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/ |
| H A D | hwreg_pm_sleep.h | 101 #define REG_PM_SLEEP_00_L (REG_PM_SLEEP_BASE + 0x00) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/ |
| H A D | hwreg_pm_sleep.h | 101 #define REG_PM_SLEEP_00_L (REG_PM_SLEEP_BASE + 0x00) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/ |
| H A D | mhal_hdmi.c | 353 W2BYTEMSK(REG_PM_SLEEP_00_L, 0, BIT(1)); // Clock status mask in _Hal_tmds_ClockStatusInitial()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/ |
| H A D | mhal_hdmi.c | 433 W2BYTEMSK(REG_PM_SLEEP_00_L, 0, BIT(1)); // Clock status mask in _Hal_tmds_ClockStatusInitial()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/ |
| H A D | mhal_hdmi.c | 617 W2BYTEMSK(REG_PM_SLEEP_00_L, 0, BIT(1));// Clock status mask in _Hal_tmds_ClockStatusInitial()
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