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Searched refs:REG_PM_SCDC0_02_L (Results 1 – 24 of 24) sorted by relevance

/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dhwreg_pm_sleep.h365 #define REG_PM_SCDC0_02_L (REG_SCDC0_BASE + 0x04) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dhwreg_pm_sleep.h365 #define REG_PM_SCDC0_02_L (REG_SCDC0_BASE + 0x04) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_pm_sleep.h365 #define REG_PM_SCDC0_02_L (REG_SCDC0_BASE + 0x04) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dhwreg_pm_sleep.h366 #define REG_PM_SCDC0_02_L (REG_SCDC0_BASE + 0x04) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dhwreg_pm_sleep.h365 #define REG_PM_SCDC0_02_L (REG_SCDC0_BASE + 0x04) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dhwreg_pm_sleep.h365 #define REG_PM_SCDC0_02_L (REG_SCDC0_BASE + 0x04) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dhwreg_pm_sleep.h366 #define REG_PM_SCDC0_02_L (REG_SCDC0_BASE + 0x04) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_pm_sleep.h366 #define REG_PM_SCDC0_02_L (REG_SCDC0_BASE + 0x04) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dhwreg_pm_sleep.h365 #define REG_PM_SCDC0_02_L (REG_SCDC0_BASE + 0x04) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dhwreg_pm_sleep.h366 #define REG_PM_SCDC0_02_L (REG_SCDC0_BASE + 0x04) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A Dhwreg_pm_sleep.h365 #define REG_PM_SCDC0_02_L (REG_SCDC0_BASE + 0x04) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dhwreg_pm_sleep.h365 #define REG_PM_SCDC0_02_L (REG_SCDC0_BASE + 0x04) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/
H A Dmhal_hdmi.c1068 W2BYTEMSK(REG_PM_SCDC0_02_L, 0x21, BIT(13)| BMASK(7:0)); in _Hal_tmds_CheckScrambleStatus()
1069 W2BYTEMSK(REG_PM_SCDC0_02_L, BIT(10), BIT(10)); in _Hal_tmds_CheckScrambleStatus()
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_hdmi.c2135 W2BYTEMSK(REG_PM_SCDC0_02_L, 0x21, BIT(13)| BMASK(7:0)); in _Hal_tmds_CheckScrambleStatus()
2136 W2BYTEMSK(REG_PM_SCDC0_02_L, BIT(10), BIT(10)); in _Hal_tmds_CheckScrambleStatus()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/
H A Dmhal_hdmi.c2165 W2BYTEMSK(REG_PM_SCDC0_02_L, 0x21, BIT(13)| BMASK(7:0)); in _Hal_tmds_CheckScrambleStatus()
2166 W2BYTEMSK(REG_PM_SCDC0_02_L, BIT(10), BIT(10)); in _Hal_tmds_CheckScrambleStatus()
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/
H A Dmhal_hdmi.c2204 W2BYTEMSK(REG_PM_SCDC0_02_L, 0x21, BIT(13)| BMASK(7:0)); in _Hal_tmds_CheckScrambleStatus()
2205 W2BYTEMSK(REG_PM_SCDC0_02_L, BIT(10), BIT(10)); in _Hal_tmds_CheckScrambleStatus()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/
H A Dmhal_hdmi.c2165 W2BYTEMSK(REG_PM_SCDC0_02_L, 0x21, BIT(13)| BMASK(7:0)); in _Hal_tmds_CheckScrambleStatus()
2166 W2BYTEMSK(REG_PM_SCDC0_02_L, BIT(10), BIT(10)); in _Hal_tmds_CheckScrambleStatus()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_hdmi.c2211 W2BYTEMSK(REG_PM_SCDC0_02_L, 0x21, BIT(13)| BMASK(7:0)); in _Hal_tmds_CheckScrambleStatus()
2212 W2BYTEMSK(REG_PM_SCDC0_02_L, BIT(10), BIT(10)); in _Hal_tmds_CheckScrambleStatus()
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/
H A Dmhal_hdmi.c2204 W2BYTEMSK(REG_PM_SCDC0_02_L, 0x21, BIT(13)| BMASK(7:0)); in _Hal_tmds_CheckScrambleStatus()
2205 W2BYTEMSK(REG_PM_SCDC0_02_L, BIT(10), BIT(10)); in _Hal_tmds_CheckScrambleStatus()
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_hdmi.c2146 W2BYTEMSK(REG_PM_SCDC0_02_L, 0x21, BIT(13)| BMASK(7:0)); in _Hal_tmds_CheckScrambleStatus()
2147 W2BYTEMSK(REG_PM_SCDC0_02_L, BIT(10), BIT(10)); in _Hal_tmds_CheckScrambleStatus()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_hdmi.c2146 W2BYTEMSK(REG_PM_SCDC0_02_L, 0x21, BIT(13)| BMASK(7:0)); in _Hal_tmds_CheckScrambleStatus()
2147 W2BYTEMSK(REG_PM_SCDC0_02_L, BIT(10), BIT(10)); in _Hal_tmds_CheckScrambleStatus()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_hdmi.c2304 W2BYTEMSK(REG_PM_SCDC0_02_L, 0x21, BIT(13)| BMASK(7:0)); in _Hal_tmds_CheckScrambleStatus()
2305 W2BYTEMSK(REG_PM_SCDC0_02_L, BIT(10), BIT(10)); in _Hal_tmds_CheckScrambleStatus()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_hdmi.c2146 W2BYTEMSK(REG_PM_SCDC0_02_L, 0x21, BIT(13)| BMASK(7:0)); in _Hal_tmds_CheckScrambleStatus()
2147 W2BYTEMSK(REG_PM_SCDC0_02_L, BIT(10), BIT(10)); in _Hal_tmds_CheckScrambleStatus()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_hdmi.c2304 W2BYTEMSK(REG_PM_SCDC0_02_L, 0x21, BIT(13)| BMASK(7:0)); in _Hal_tmds_CheckScrambleStatus()
2305 W2BYTEMSK(REG_PM_SCDC0_02_L, BIT(10), BIT(10)); in _Hal_tmds_CheckScrambleStatus()