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Searched refs:REG_PM_CKG_RTC (Results 1 – 22 of 22) sorted by relevance

/utopia/UTPA2-700.0.x/modules/pm/hal/maldives/pm/
H A DhalPM.c354 HAL_PM_Write2Byte(REG_PM_CKG_RTC, in HAL_PM_RtcInit()
355 …(HAL_PM_Read2Byte(REG_PM_CKG_RTC)&(~(__BIT4|__BIT3|__BIT2|__BIT1|__BIT0)))|(1<<2)); //RTC clock sw… in HAL_PM_RtcInit()
H A DregPM.h126 #define REG_PM_CKG_RTC ((PM_REG_BASE + 0x22 * 2)) macro
/utopia/UTPA2-700.0.x/modules/pm/hal/mustang/pm/
H A DhalPM.c354 HAL_PM_Write2Byte(REG_PM_CKG_RTC, in HAL_PM_RtcInit()
355 …(HAL_PM_Read2Byte(REG_PM_CKG_RTC)&(~(__BIT4|__BIT3|__BIT2|__BIT1|__BIT0)))|(1<<2)); //RTC clock sw… in HAL_PM_RtcInit()
H A DregPM.h127 #define REG_PM_CKG_RTC ((PM_REG_BASE + 0x22 * 2)) macro
/utopia/UTPA2-700.0.x/modules/pm/hal/mainz/pm/
H A DhalPM.c355 HAL_PM_Write2Byte(REG_PM_CKG_RTC, in HAL_PM_RtcInit()
356 …(HAL_PM_Read2Byte(REG_PM_CKG_RTC)&(~(__BIT4|__BIT3|__BIT2|__BIT1|__BIT0)))|(1<<2)); //RTC clock sw… in HAL_PM_RtcInit()
H A DregPM.h127 #define REG_PM_CKG_RTC ((PM_REG_BASE + 0x22UL * 2)) macro
/utopia/UTPA2-700.0.x/modules/pm/hal/maserati/pm/
H A DhalPM.c353 HAL_PM_Write2Byte(REG_PM_CKG_RTC, in HAL_PM_RtcInit()
354 …(HAL_PM_Read2Byte(REG_PM_CKG_RTC)&(~(__BIT4|__BIT3|__BIT2|__BIT1|__BIT0)))|(1<<2)); //RTC clock sw… in HAL_PM_RtcInit()
H A DregPM.h128 #define REG_PM_CKG_RTC ((PM_REG_BASE + 0x22UL*2+0)) macro
/utopia/UTPA2-700.0.x/modules/pm/hal/manhattan/pm/
H A DhalPM.c353 HAL_PM_Write2Byte(REG_PM_CKG_RTC, in HAL_PM_RtcInit()
354 …(HAL_PM_Read2Byte(REG_PM_CKG_RTC)&(~(__BIT4|__BIT3|__BIT2|__BIT1|__BIT0)))|(1<<2)); //RTC clock sw… in HAL_PM_RtcInit()
H A DregPM.h128 #define REG_PM_CKG_RTC ((PM_REG_BASE + 0x22UL*2+0)) macro
/utopia/UTPA2-700.0.x/modules/pm/hal/M7621/pm/
H A DhalPM.c353 HAL_PM_Write2Byte(REG_PM_CKG_RTC, in HAL_PM_RtcInit()
354 …(HAL_PM_Read2Byte(REG_PM_CKG_RTC)&(~(__BIT4|__BIT3|__BIT2|__BIT1|__BIT0)))|(1<<2)); //RTC clock sw… in HAL_PM_RtcInit()
H A DregPM.h128 #define REG_PM_CKG_RTC ((PM_REG_BASE + 0x22UL*2+0)) macro
/utopia/UTPA2-700.0.x/modules/pm/hal/maxim/pm/
H A DhalPM.c353 HAL_PM_Write2Byte(REG_PM_CKG_RTC, in HAL_PM_RtcInit()
354 …(HAL_PM_Read2Byte(REG_PM_CKG_RTC)&(~(__BIT4|__BIT3|__BIT2|__BIT1|__BIT0)))|(1<<2)); //RTC clock sw… in HAL_PM_RtcInit()
H A DregPM.h128 #define REG_PM_CKG_RTC ((PM_REG_BASE + 0x22UL*2+0)) macro
/utopia/UTPA2-700.0.x/modules/pm/hal/mooney/pm/
H A DhalPM.c353 HAL_PM_Write2Byte(REG_PM_CKG_RTC, in HAL_PM_RtcInit()
354 …(HAL_PM_Read2Byte(REG_PM_CKG_RTC)&(~(__BIT4|__BIT3|__BIT2|__BIT1|__BIT0)))|(1<<2)); //RTC clock sw… in HAL_PM_RtcInit()
H A DregPM.h127 #define REG_PM_CKG_RTC ((PM_REG_BASE + 0x22UL * 2)) macro
/utopia/UTPA2-700.0.x/modules/pm/hal/M7821/pm/
H A DhalPM.c353 HAL_PM_Write2Byte(REG_PM_CKG_RTC, in HAL_PM_RtcInit()
354 …(HAL_PM_Read2Byte(REG_PM_CKG_RTC)&(~(__BIT4|__BIT3|__BIT2|__BIT1|__BIT0)))|(1<<2)); //RTC clock sw… in HAL_PM_RtcInit()
H A DregPM.h128 #define REG_PM_CKG_RTC ((PM_REG_BASE + 0x22UL*2+0)) macro
/utopia/UTPA2-700.0.x/modules/pm/hal/macan/pm/
H A DhalPM.c353 HAL_PM_Write2Byte(REG_PM_CKG_RTC, in HAL_PM_RtcInit()
354 …(HAL_PM_Read2Byte(REG_PM_CKG_RTC)&(~(__BIT4|__BIT3|__BIT2|__BIT1|__BIT0)))|(1<<2)); //RTC clock sw… in HAL_PM_RtcInit()
H A DregPM.h128 #define REG_PM_CKG_RTC ((PM_REG_BASE + 0x22UL*2+0)) macro
/utopia/UTPA2-700.0.x/modules/pm/hal/messi/pm/
H A DhalPM.c355 HAL_PM_Write2Byte(REG_PM_CKG_RTC, in HAL_PM_RtcInit()
356 …(HAL_PM_Read2Byte(REG_PM_CKG_RTC)&(~(__BIT4|__BIT3|__BIT2|__BIT1|__BIT0)))|(1<<2)); //RTC clock sw… in HAL_PM_RtcInit()
H A DregPM.h127 #define REG_PM_CKG_RTC ((PM_REG_BASE + 0x22UL * 2)) macro