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Searched refs:REG_PIU_TIMER0 (Results 1 – 2 of 2) sorted by relevance

/utopia/UTPA2-700.0.x/modules/mfe/drv/mfe/
H A Dmdrv_mfe.c241 REG_WR(REG_PIU_TIMER0(0x00), 0x0); in MFE_MsOS_START_TIMER()
242 REG_WR(REG_PIU_TIMER0(0x00), 0x1); in MFE_MsOS_START_TIMER()
248 MFE_U32Timer = ((MFE_U32)REG_RR(REG_PIU_TIMER0(0x04))) | in MFE_MsOS_PRINT_TIMER()
249 ((MFE_U32)REG_RR(REG_PIU_TIMER0(0x05)) << 16); // h0005:h0004 in MFE_MsOS_PRINT_TIMER()
/utopia/UTPA2-700.0.x/modules/graphic/drv/ge/
H A DdrvGE.c5194 #define REG_PIU_TIMER0(_x_) (0x003020UL | (_x_ << 1)) macro
5554 REG_WR(REG_PIU_TIMER0(0x02), 0xFFFF); in MDrv_GE_BitbltPerformance()
5555 REG_WR(REG_PIU_TIMER0(0x03), 0xFFFF); in MDrv_GE_BitbltPerformance()
5557 REG_WR(REG_PIU_TIMER0(0x00), 0x0); in MDrv_GE_BitbltPerformance()
5558 REG_WR(REG_PIU_TIMER0(0x00), 0x1); in MDrv_GE_BitbltPerformance()
5609 … u32Timer = ((MS_U32)REG_RR(REG_PIU_TIMER0(0x04))) | ((MS_U32)REG_RR(REG_PIU_TIMER0(0x05)) << 16); in MDrv_GE_BitbltPerformance()
5671 REG_WR(REG_PIU_TIMER0(0x00), 0x0); in MDrv_GE_BitbltPerformance()
5672 REG_WR(REG_PIU_TIMER0(0x00), 0x1); in MDrv_GE_BitbltPerformance()
5718 u32Timer = ((MS_U32)REG_RR(REG_PIU_TIMER0(0x04))) | in MDrv_GE_BitbltPerformance()
5719 ((MS_U32)REG_RR(REG_PIU_TIMER0(0x05)) << 16); in MDrv_GE_BitbltPerformance()