Searched refs:REG_MIU0_GROUP0_MASK (Results 1 – 1 of 1) sorted by relevance
5206 #define REG_MIU0_GROUP0_MASK (0x101246UL) macro5424 REG_WR(REG_MIU0_GROUP0_MASK, 0xFFF8); //enable miu counter in MDrv_GE_BitbltPerformance()