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Searched refs:REG_IPMUX_61_L (Results 1 – 10 of 10) sorted by relevance

/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/
H A Dmhal_mux.c567 …ptee.op_tee_mux.regs_data[pXCResourcePrivate->sthal_Optee.op_tee_mux.regs_cnt].bk = REG_IPMUX_61_L; in Hal_SC2_mux_set_mainwin_ip_mux()
577 MDrv_WriteByteMask(REG_IPMUX_61_L, u8Data_Mux << 4, 0xF0); in Hal_SC2_mux_set_mainwin_ip_mux()
587 *pU8Data_Mux = (MDrv_ReadRegBit(REG_IPMUX_61_L, 0xF0)) >> 4; in Hal_SC2_mux_get_mainwin_ip_mux()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_mux.c614 …ptee.op_tee_mux.regs_data[pXCResourcePrivate->sthal_Optee.op_tee_mux.regs_cnt].bk = REG_IPMUX_61_L; in Hal_SC2_mux_set_mainwin_ip_mux()
624 MDrv_WriteByteMask(REG_IPMUX_61_L, u8Data_Mux << 4, 0xF0); in Hal_SC2_mux_set_mainwin_ip_mux()
636 *pU8Data_Mux = (MDrv_ReadRegBit(REG_IPMUX_61_L, 0xF0)) >> 4; in Hal_SC2_mux_get_mainwin_ip_mux()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_mux.c614 …ptee.op_tee_mux.regs_data[pXCResourcePrivate->sthal_Optee.op_tee_mux.regs_cnt].bk = REG_IPMUX_61_L; in Hal_SC2_mux_set_mainwin_ip_mux()
624 MDrv_WriteByteMask(REG_IPMUX_61_L, u8Data_Mux << 4, 0xF0); in Hal_SC2_mux_set_mainwin_ip_mux()
636 *pU8Data_Mux = (MDrv_ReadRegBit(REG_IPMUX_61_L, 0xF0)) >> 4; in Hal_SC2_mux_get_mainwin_ip_mux()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_mux.c614 …ptee.op_tee_mux.regs_data[pXCResourcePrivate->sthal_Optee.op_tee_mux.regs_cnt].bk = REG_IPMUX_61_L; in Hal_SC2_mux_set_mainwin_ip_mux()
624 MDrv_WriteByteMask(REG_IPMUX_61_L, u8Data_Mux << 4, 0xF0); in Hal_SC2_mux_set_mainwin_ip_mux()
636 *pU8Data_Mux = (MDrv_ReadRegBit(REG_IPMUX_61_L, 0xF0)) >> 4; in Hal_SC2_mux_get_mainwin_ip_mux()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_mux.c614 …ptee.op_tee_mux.regs_data[pXCResourcePrivate->sthal_Optee.op_tee_mux.regs_cnt].bk = REG_IPMUX_61_L; in Hal_SC2_mux_set_mainwin_ip_mux()
624 MDrv_WriteByteMask(REG_IPMUX_61_L, u8Data_Mux << 4, 0xF0); in Hal_SC2_mux_set_mainwin_ip_mux()
636 *pU8Data_Mux = (MDrv_ReadRegBit(REG_IPMUX_61_L, 0xF0)) >> 4; in Hal_SC2_mux_get_mainwin_ip_mux()
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_mux.c616 …ptee.op_tee_mux.regs_data[pXCResourcePrivate->sthal_Optee.op_tee_mux.regs_cnt].bk = REG_IPMUX_61_L; in Hal_SC2_mux_set_mainwin_ip_mux()
626 MDrv_WriteByteMask(REG_IPMUX_61_L, u8Data_Mux << 4, 0xF0); in Hal_SC2_mux_set_mainwin_ip_mux()
636 *pU8Data_Mux = (MDrv_ReadRegBit(REG_IPMUX_61_L, 0xF0)) >> 4; in Hal_SC2_mux_get_mainwin_ip_mux()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_mux.c614 …ptee.op_tee_mux.regs_data[pXCResourcePrivate->sthal_Optee.op_tee_mux.regs_cnt].bk = REG_IPMUX_61_L; in Hal_SC2_mux_set_mainwin_ip_mux()
624 MDrv_WriteByteMask(REG_IPMUX_61_L, u8Data_Mux << 4, 0xF0); in Hal_SC2_mux_set_mainwin_ip_mux()
634 *pU8Data_Mux = (MDrv_ReadRegBit(REG_IPMUX_61_L, 0xF0)) >> 4; in Hal_SC2_mux_get_mainwin_ip_mux()
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/
H A Dmhal_mux.c496 MDrv_WriteByteMask(REG_IPMUX_61_L, u8Data_Mux << 4, 0xF0); in Hal_SC2_mux_set_mainwin_ip_mux()
506 *pU8Data_Mux = (MDrv_ReadRegBit(REG_IPMUX_61_L, 0xF0)) >> 4; in Hal_SC2_mux_get_mainwin_ip_mux()
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_mux.c547 MDrv_WriteByteMask(REG_IPMUX_61_L, u8Data_Mux << 4, 0xF0); in Hal_SC2_mux_set_mainwin_ip_mux()
557 *pU8Data_Mux = (MDrv_ReadRegBit(REG_IPMUX_61_L, 0xF0)) >> 4; in Hal_SC2_mux_get_mainwin_ip_mux()
/utopia/UTPA2-700.0.x/modules/xc/drv/xc/include/
H A Dhwreg_ipmux.h297 #define REG_IPMUX_61_L (REG_IPMUX_BASE + 0xC2) macro