Home
last modified time | relevance | path

Searched refs:REG_HDMI_DUAL_1_BASE (Results 1 – 8 of 8) sorted by relevance

/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dhwreg_hdmi.h6475 #define REG_HDMI_DUAL_1_00_L (REG_HDMI_DUAL_1_BASE + 0x00)
6476 #define REG_HDMI_DUAL_1_00_H (REG_HDMI_DUAL_1_BASE + 0x01)
6477 #define REG_HDMI_DUAL_1_01_L (REG_HDMI_DUAL_1_BASE + 0x02)
6478 #define REG_HDMI_DUAL_1_01_H (REG_HDMI_DUAL_1_BASE + 0x03)
6479 #define REG_HDMI_DUAL_1_02_L (REG_HDMI_DUAL_1_BASE + 0x04)
6480 #define REG_HDMI_DUAL_1_02_H (REG_HDMI_DUAL_1_BASE + 0x05)
6481 #define REG_HDMI_DUAL_1_03_L (REG_HDMI_DUAL_1_BASE + 0x06)
6482 #define REG_HDMI_DUAL_1_03_H (REG_HDMI_DUAL_1_BASE + 0x07)
6483 #define REG_HDMI_DUAL_1_04_L (REG_HDMI_DUAL_1_BASE + 0x08)
6484 #define REG_HDMI_DUAL_1_04_H (REG_HDMI_DUAL_1_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h638 #define REG_HDMI_DUAL_1_BASE 0x173200UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dhwreg_hdmi.h6483 #define REG_HDMI_DUAL_1_00_L (REG_HDMI_DUAL_1_BASE + 0x00)
6484 #define REG_HDMI_DUAL_1_00_H (REG_HDMI_DUAL_1_BASE + 0x01)
6485 #define REG_HDMI_DUAL_1_01_L (REG_HDMI_DUAL_1_BASE + 0x02)
6486 #define REG_HDMI_DUAL_1_01_H (REG_HDMI_DUAL_1_BASE + 0x03)
6487 #define REG_HDMI_DUAL_1_02_L (REG_HDMI_DUAL_1_BASE + 0x04)
6488 #define REG_HDMI_DUAL_1_02_H (REG_HDMI_DUAL_1_BASE + 0x05)
6489 #define REG_HDMI_DUAL_1_03_L (REG_HDMI_DUAL_1_BASE + 0x06)
6490 #define REG_HDMI_DUAL_1_03_H (REG_HDMI_DUAL_1_BASE + 0x07)
6491 #define REG_HDMI_DUAL_1_04_L (REG_HDMI_DUAL_1_BASE + 0x08)
6492 #define REG_HDMI_DUAL_1_04_H (REG_HDMI_DUAL_1_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h650 #define REG_HDMI_DUAL_1_BASE 0x173200UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dhwreg_hdmi.h6483 #define REG_HDMI_DUAL_1_00_L (REG_HDMI_DUAL_1_BASE + 0x00)
6484 #define REG_HDMI_DUAL_1_00_H (REG_HDMI_DUAL_1_BASE + 0x01)
6485 #define REG_HDMI_DUAL_1_01_L (REG_HDMI_DUAL_1_BASE + 0x02)
6486 #define REG_HDMI_DUAL_1_01_H (REG_HDMI_DUAL_1_BASE + 0x03)
6487 #define REG_HDMI_DUAL_1_02_L (REG_HDMI_DUAL_1_BASE + 0x04)
6488 #define REG_HDMI_DUAL_1_02_H (REG_HDMI_DUAL_1_BASE + 0x05)
6489 #define REG_HDMI_DUAL_1_03_L (REG_HDMI_DUAL_1_BASE + 0x06)
6490 #define REG_HDMI_DUAL_1_03_H (REG_HDMI_DUAL_1_BASE + 0x07)
6491 #define REG_HDMI_DUAL_1_04_L (REG_HDMI_DUAL_1_BASE + 0x08)
6492 #define REG_HDMI_DUAL_1_04_H (REG_HDMI_DUAL_1_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h642 #define REG_HDMI_DUAL_1_BASE 0x173200UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A Dhwreg_hdmi.h6483 #define REG_HDMI_DUAL_1_00_L (REG_HDMI_DUAL_1_BASE + 0x00)
6484 #define REG_HDMI_DUAL_1_00_H (REG_HDMI_DUAL_1_BASE + 0x01)
6485 #define REG_HDMI_DUAL_1_01_L (REG_HDMI_DUAL_1_BASE + 0x02)
6486 #define REG_HDMI_DUAL_1_01_H (REG_HDMI_DUAL_1_BASE + 0x03)
6487 #define REG_HDMI_DUAL_1_02_L (REG_HDMI_DUAL_1_BASE + 0x04)
6488 #define REG_HDMI_DUAL_1_02_H (REG_HDMI_DUAL_1_BASE + 0x05)
6489 #define REG_HDMI_DUAL_1_03_L (REG_HDMI_DUAL_1_BASE + 0x06)
6490 #define REG_HDMI_DUAL_1_03_H (REG_HDMI_DUAL_1_BASE + 0x07)
6491 #define REG_HDMI_DUAL_1_04_L (REG_HDMI_DUAL_1_BASE + 0x08)
6492 #define REG_HDMI_DUAL_1_04_H (REG_HDMI_DUAL_1_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h655 #define REG_HDMI_DUAL_1_BASE 0x173200UL macro