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Searched refs:REG_HDMI3_DUAL_1_BASE (Results 1 – 8 of 8) sorted by relevance

/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dhwreg_hdmi.h6991 #define REG_HDMI3_DUAL_1_00_L (REG_HDMI3_DUAL_1_BASE + 0x00)
6992 #define REG_HDMI3_DUAL_1_00_H (REG_HDMI3_DUAL_1_BASE + 0x01)
6993 #define REG_HDMI3_DUAL_1_01_L (REG_HDMI3_DUAL_1_BASE + 0x02)
6994 #define REG_HDMI3_DUAL_1_01_H (REG_HDMI3_DUAL_1_BASE + 0x03)
6995 #define REG_HDMI3_DUAL_1_02_L (REG_HDMI3_DUAL_1_BASE + 0x04)
6996 #define REG_HDMI3_DUAL_1_02_H (REG_HDMI3_DUAL_1_BASE + 0x05)
6997 #define REG_HDMI3_DUAL_1_03_L (REG_HDMI3_DUAL_1_BASE + 0x06)
6998 #define REG_HDMI3_DUAL_1_03_H (REG_HDMI3_DUAL_1_BASE + 0x07)
6999 #define REG_HDMI3_DUAL_1_04_L (REG_HDMI3_DUAL_1_BASE + 0x08)
7000 #define REG_HDMI3_DUAL_1_04_H (REG_HDMI3_DUAL_1_BASE + 0x09)
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H A Dmhal_xc_chip_config.h640 #define REG_HDMI3_DUAL_1_BASE 0x173600UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dhwreg_hdmi.h6999 #define REG_HDMI3_DUAL_1_00_L (REG_HDMI3_DUAL_1_BASE + 0x00)
7000 #define REG_HDMI3_DUAL_1_00_H (REG_HDMI3_DUAL_1_BASE + 0x01)
7001 #define REG_HDMI3_DUAL_1_01_L (REG_HDMI3_DUAL_1_BASE + 0x02)
7002 #define REG_HDMI3_DUAL_1_01_H (REG_HDMI3_DUAL_1_BASE + 0x03)
7003 #define REG_HDMI3_DUAL_1_02_L (REG_HDMI3_DUAL_1_BASE + 0x04)
7004 #define REG_HDMI3_DUAL_1_02_H (REG_HDMI3_DUAL_1_BASE + 0x05)
7005 #define REG_HDMI3_DUAL_1_03_L (REG_HDMI3_DUAL_1_BASE + 0x06)
7006 #define REG_HDMI3_DUAL_1_03_H (REG_HDMI3_DUAL_1_BASE + 0x07)
7007 #define REG_HDMI3_DUAL_1_04_L (REG_HDMI3_DUAL_1_BASE + 0x08)
7008 #define REG_HDMI3_DUAL_1_04_H (REG_HDMI3_DUAL_1_BASE + 0x09)
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H A Dmhal_xc_chip_config.h652 #define REG_HDMI3_DUAL_1_BASE 0x173600UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dhwreg_hdmi.h6999 #define REG_HDMI3_DUAL_1_00_L (REG_HDMI3_DUAL_1_BASE + 0x00)
7000 #define REG_HDMI3_DUAL_1_00_H (REG_HDMI3_DUAL_1_BASE + 0x01)
7001 #define REG_HDMI3_DUAL_1_01_L (REG_HDMI3_DUAL_1_BASE + 0x02)
7002 #define REG_HDMI3_DUAL_1_01_H (REG_HDMI3_DUAL_1_BASE + 0x03)
7003 #define REG_HDMI3_DUAL_1_02_L (REG_HDMI3_DUAL_1_BASE + 0x04)
7004 #define REG_HDMI3_DUAL_1_02_H (REG_HDMI3_DUAL_1_BASE + 0x05)
7005 #define REG_HDMI3_DUAL_1_03_L (REG_HDMI3_DUAL_1_BASE + 0x06)
7006 #define REG_HDMI3_DUAL_1_03_H (REG_HDMI3_DUAL_1_BASE + 0x07)
7007 #define REG_HDMI3_DUAL_1_04_L (REG_HDMI3_DUAL_1_BASE + 0x08)
7008 #define REG_HDMI3_DUAL_1_04_H (REG_HDMI3_DUAL_1_BASE + 0x09)
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H A Dmhal_xc_chip_config.h644 #define REG_HDMI3_DUAL_1_BASE 0x173600UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A Dhwreg_hdmi.h6999 #define REG_HDMI3_DUAL_1_00_L (REG_HDMI3_DUAL_1_BASE + 0x00)
7000 #define REG_HDMI3_DUAL_1_00_H (REG_HDMI3_DUAL_1_BASE + 0x01)
7001 #define REG_HDMI3_DUAL_1_01_L (REG_HDMI3_DUAL_1_BASE + 0x02)
7002 #define REG_HDMI3_DUAL_1_01_H (REG_HDMI3_DUAL_1_BASE + 0x03)
7003 #define REG_HDMI3_DUAL_1_02_L (REG_HDMI3_DUAL_1_BASE + 0x04)
7004 #define REG_HDMI3_DUAL_1_02_H (REG_HDMI3_DUAL_1_BASE + 0x05)
7005 #define REG_HDMI3_DUAL_1_03_L (REG_HDMI3_DUAL_1_BASE + 0x06)
7006 #define REG_HDMI3_DUAL_1_03_H (REG_HDMI3_DUAL_1_BASE + 0x07)
7007 #define REG_HDMI3_DUAL_1_04_L (REG_HDMI3_DUAL_1_BASE + 0x08)
7008 #define REG_HDMI3_DUAL_1_04_H (REG_HDMI3_DUAL_1_BASE + 0x09)
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H A Dmhal_xc_chip_config.h657 #define REG_HDMI3_DUAL_1_BASE 0x173600UL macro