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Searched refs:REG_HDCPKEY_BASE (Results 1 – 25 of 31) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dhwreg_hdcp.h102 #define REG_HDCPKEY_00_L (REG_HDCPKEY_BASE + 0x00)
103 #define REG_HDCPKEY_00_H (REG_HDCPKEY_BASE + 0x01)
104 #define REG_HDCPKEY_01_L (REG_HDCPKEY_BASE + 0x02)
105 #define REG_HDCPKEY_01_H (REG_HDCPKEY_BASE + 0x03)
106 #define REG_HDCPKEY_02_L (REG_HDCPKEY_BASE + 0x04)
107 #define REG_HDCPKEY_02_H (REG_HDCPKEY_BASE + 0x05)
108 #define REG_HDCPKEY_03_L (REG_HDCPKEY_BASE + 0x06)
109 #define REG_HDCPKEY_03_H (REG_HDCPKEY_BASE + 0x07)
110 #define REG_HDCPKEY_04_L (REG_HDCPKEY_BASE + 0x08)
111 #define REG_HDCPKEY_04_H (REG_HDCPKEY_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h508 #define REG_HDCPKEY_BASE 0x173800UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dhwreg_hdcp.h102 #define REG_HDCPKEY_00_L (REG_HDCPKEY_BASE + 0x00)
103 #define REG_HDCPKEY_00_H (REG_HDCPKEY_BASE + 0x01)
104 #define REG_HDCPKEY_01_L (REG_HDCPKEY_BASE + 0x02)
105 #define REG_HDCPKEY_01_H (REG_HDCPKEY_BASE + 0x03)
106 #define REG_HDCPKEY_02_L (REG_HDCPKEY_BASE + 0x04)
107 #define REG_HDCPKEY_02_H (REG_HDCPKEY_BASE + 0x05)
108 #define REG_HDCPKEY_03_L (REG_HDCPKEY_BASE + 0x06)
109 #define REG_HDCPKEY_03_H (REG_HDCPKEY_BASE + 0x07)
110 #define REG_HDCPKEY_04_L (REG_HDCPKEY_BASE + 0x08)
111 #define REG_HDCPKEY_04_H (REG_HDCPKEY_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h529 #define REG_HDCPKEY_BASE 0x172500UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dhwreg_hdcp.h102 #define REG_HDCPKEY_00_L (REG_HDCPKEY_BASE + 0x00)
103 #define REG_HDCPKEY_00_H (REG_HDCPKEY_BASE + 0x01)
104 #define REG_HDCPKEY_01_L (REG_HDCPKEY_BASE + 0x02)
105 #define REG_HDCPKEY_01_H (REG_HDCPKEY_BASE + 0x03)
106 #define REG_HDCPKEY_02_L (REG_HDCPKEY_BASE + 0x04)
107 #define REG_HDCPKEY_02_H (REG_HDCPKEY_BASE + 0x05)
108 #define REG_HDCPKEY_03_L (REG_HDCPKEY_BASE + 0x06)
109 #define REG_HDCPKEY_03_H (REG_HDCPKEY_BASE + 0x07)
110 #define REG_HDCPKEY_04_L (REG_HDCPKEY_BASE + 0x08)
111 #define REG_HDCPKEY_04_H (REG_HDCPKEY_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h523 #define REG_HDCPKEY_BASE 0x172500UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A Dhwreg_hdcp.h102 #define REG_HDCPKEY_00_L (REG_HDCPKEY_BASE + 0x00)
103 #define REG_HDCPKEY_00_H (REG_HDCPKEY_BASE + 0x01)
104 #define REG_HDCPKEY_01_L (REG_HDCPKEY_BASE + 0x02)
105 #define REG_HDCPKEY_01_H (REG_HDCPKEY_BASE + 0x03)
106 #define REG_HDCPKEY_02_L (REG_HDCPKEY_BASE + 0x04)
107 #define REG_HDCPKEY_02_H (REG_HDCPKEY_BASE + 0x05)
108 #define REG_HDCPKEY_03_L (REG_HDCPKEY_BASE + 0x06)
109 #define REG_HDCPKEY_03_H (REG_HDCPKEY_BASE + 0x07)
110 #define REG_HDCPKEY_04_L (REG_HDCPKEY_BASE + 0x08)
111 #define REG_HDCPKEY_04_H (REG_HDCPKEY_BASE + 0x09)
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dhwreg_hdcp.h102 #define REG_HDCPKEY_00_L (REG_HDCPKEY_BASE + 0x00)
103 #define REG_HDCPKEY_00_H (REG_HDCPKEY_BASE + 0x01)
104 #define REG_HDCPKEY_01_L (REG_HDCPKEY_BASE + 0x02)
105 #define REG_HDCPKEY_01_H (REG_HDCPKEY_BASE + 0x03)
106 #define REG_HDCPKEY_02_L (REG_HDCPKEY_BASE + 0x04)
107 #define REG_HDCPKEY_02_H (REG_HDCPKEY_BASE + 0x05)
108 #define REG_HDCPKEY_03_L (REG_HDCPKEY_BASE + 0x06)
109 #define REG_HDCPKEY_03_H (REG_HDCPKEY_BASE + 0x07)
110 #define REG_HDCPKEY_04_L (REG_HDCPKEY_BASE + 0x08)
111 #define REG_HDCPKEY_04_H (REG_HDCPKEY_BASE + 0x09)
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dhwreg_hdcp.h102 #define REG_HDCPKEY_00_L (REG_HDCPKEY_BASE + 0x00)
103 #define REG_HDCPKEY_00_H (REG_HDCPKEY_BASE + 0x01)
104 #define REG_HDCPKEY_01_L (REG_HDCPKEY_BASE + 0x02)
105 #define REG_HDCPKEY_01_H (REG_HDCPKEY_BASE + 0x03)
106 #define REG_HDCPKEY_02_L (REG_HDCPKEY_BASE + 0x04)
107 #define REG_HDCPKEY_02_H (REG_HDCPKEY_BASE + 0x05)
108 #define REG_HDCPKEY_03_L (REG_HDCPKEY_BASE + 0x06)
109 #define REG_HDCPKEY_03_H (REG_HDCPKEY_BASE + 0x07)
110 #define REG_HDCPKEY_04_L (REG_HDCPKEY_BASE + 0x08)
111 #define REG_HDCPKEY_04_H (REG_HDCPKEY_BASE + 0x09)
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dhwreg_hdcp.h102 #define REG_HDCPKEY_00_L (REG_HDCPKEY_BASE + 0x00)
103 #define REG_HDCPKEY_00_H (REG_HDCPKEY_BASE + 0x01)
104 #define REG_HDCPKEY_01_L (REG_HDCPKEY_BASE + 0x02)
105 #define REG_HDCPKEY_01_H (REG_HDCPKEY_BASE + 0x03)
106 #define REG_HDCPKEY_02_L (REG_HDCPKEY_BASE + 0x04)
107 #define REG_HDCPKEY_02_H (REG_HDCPKEY_BASE + 0x05)
108 #define REG_HDCPKEY_03_L (REG_HDCPKEY_BASE + 0x06)
109 #define REG_HDCPKEY_03_H (REG_HDCPKEY_BASE + 0x07)
110 #define REG_HDCPKEY_04_L (REG_HDCPKEY_BASE + 0x08)
111 #define REG_HDCPKEY_04_H (REG_HDCPKEY_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h510 #define REG_HDCPKEY_BASE 0x173800UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dhwreg_hdcp.h102 #define REG_HDCPKEY_00_L (REG_HDCPKEY_BASE + 0x00)
103 #define REG_HDCPKEY_00_H (REG_HDCPKEY_BASE + 0x01)
104 #define REG_HDCPKEY_01_L (REG_HDCPKEY_BASE + 0x02)
105 #define REG_HDCPKEY_01_H (REG_HDCPKEY_BASE + 0x03)
106 #define REG_HDCPKEY_02_L (REG_HDCPKEY_BASE + 0x04)
107 #define REG_HDCPKEY_02_H (REG_HDCPKEY_BASE + 0x05)
108 #define REG_HDCPKEY_03_L (REG_HDCPKEY_BASE + 0x06)
109 #define REG_HDCPKEY_03_H (REG_HDCPKEY_BASE + 0x07)
110 #define REG_HDCPKEY_04_L (REG_HDCPKEY_BASE + 0x08)
111 #define REG_HDCPKEY_04_H (REG_HDCPKEY_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h531 #define REG_HDCPKEY_BASE 0x172500UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_hdcp.h102 #define REG_HDCPKEY_00_L (REG_HDCPKEY_BASE + 0x00)
103 #define REG_HDCPKEY_00_H (REG_HDCPKEY_BASE + 0x01)
104 #define REG_HDCPKEY_01_L (REG_HDCPKEY_BASE + 0x02)
105 #define REG_HDCPKEY_01_H (REG_HDCPKEY_BASE + 0x03)
106 #define REG_HDCPKEY_02_L (REG_HDCPKEY_BASE + 0x04)
107 #define REG_HDCPKEY_02_H (REG_HDCPKEY_BASE + 0x05)
108 #define REG_HDCPKEY_03_L (REG_HDCPKEY_BASE + 0x06)
109 #define REG_HDCPKEY_03_H (REG_HDCPKEY_BASE + 0x07)
110 #define REG_HDCPKEY_04_L (REG_HDCPKEY_BASE + 0x08)
111 #define REG_HDCPKEY_04_H (REG_HDCPKEY_BASE + 0x09)
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dhwreg_hdcp.h102 #define REG_HDCPKEY_00_L (REG_HDCPKEY_BASE + 0x00)
103 #define REG_HDCPKEY_00_H (REG_HDCPKEY_BASE + 0x01)
104 #define REG_HDCPKEY_01_L (REG_HDCPKEY_BASE + 0x02)
105 #define REG_HDCPKEY_01_H (REG_HDCPKEY_BASE + 0x03)
106 #define REG_HDCPKEY_02_L (REG_HDCPKEY_BASE + 0x04)
107 #define REG_HDCPKEY_02_H (REG_HDCPKEY_BASE + 0x05)
108 #define REG_HDCPKEY_03_L (REG_HDCPKEY_BASE + 0x06)
109 #define REG_HDCPKEY_03_H (REG_HDCPKEY_BASE + 0x07)
110 #define REG_HDCPKEY_04_L (REG_HDCPKEY_BASE + 0x08)
111 #define REG_HDCPKEY_04_H (REG_HDCPKEY_BASE + 0x09)
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_hdcp.h102 #define REG_HDCPKEY_00_L (REG_HDCPKEY_BASE + 0x00)
103 #define REG_HDCPKEY_00_H (REG_HDCPKEY_BASE + 0x01)
104 #define REG_HDCPKEY_01_L (REG_HDCPKEY_BASE + 0x02)
105 #define REG_HDCPKEY_01_H (REG_HDCPKEY_BASE + 0x03)
106 #define REG_HDCPKEY_02_L (REG_HDCPKEY_BASE + 0x04)
107 #define REG_HDCPKEY_02_H (REG_HDCPKEY_BASE + 0x05)
108 #define REG_HDCPKEY_03_L (REG_HDCPKEY_BASE + 0x06)
109 #define REG_HDCPKEY_03_H (REG_HDCPKEY_BASE + 0x07)
110 #define REG_HDCPKEY_04_L (REG_HDCPKEY_BASE + 0x08)
111 #define REG_HDCPKEY_04_H (REG_HDCPKEY_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h529 #define REG_HDCPKEY_BASE 0x172500UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dhwreg_hdcp.h102 #define REG_HDCPKEY_00_L (REG_HDCPKEY_BASE + 0x00)
103 #define REG_HDCPKEY_00_H (REG_HDCPKEY_BASE + 0x01)
104 #define REG_HDCPKEY_01_L (REG_HDCPKEY_BASE + 0x02)
105 #define REG_HDCPKEY_01_H (REG_HDCPKEY_BASE + 0x03)
106 #define REG_HDCPKEY_02_L (REG_HDCPKEY_BASE + 0x04)
107 #define REG_HDCPKEY_02_H (REG_HDCPKEY_BASE + 0x05)
108 #define REG_HDCPKEY_03_L (REG_HDCPKEY_BASE + 0x06)
109 #define REG_HDCPKEY_03_H (REG_HDCPKEY_BASE + 0x07)
110 #define REG_HDCPKEY_04_L (REG_HDCPKEY_BASE + 0x08)
111 #define REG_HDCPKEY_04_H (REG_HDCPKEY_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h584 #define REG_HDCPKEY_BASE 0x173800UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dhwreg_hdcp.h102 #define REG_HDCPKEY_00_L (REG_HDCPKEY_BASE + 0x00)
103 #define REG_HDCPKEY_00_H (REG_HDCPKEY_BASE + 0x01)
104 #define REG_HDCPKEY_01_L (REG_HDCPKEY_BASE + 0x02)
105 #define REG_HDCPKEY_01_H (REG_HDCPKEY_BASE + 0x03)
106 #define REG_HDCPKEY_02_L (REG_HDCPKEY_BASE + 0x04)
107 #define REG_HDCPKEY_02_H (REG_HDCPKEY_BASE + 0x05)
108 #define REG_HDCPKEY_03_L (REG_HDCPKEY_BASE + 0x06)
109 #define REG_HDCPKEY_03_H (REG_HDCPKEY_BASE + 0x07)
110 #define REG_HDCPKEY_04_L (REG_HDCPKEY_BASE + 0x08)
111 #define REG_HDCPKEY_04_H (REG_HDCPKEY_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h491 #define REG_HDCPKEY_BASE 0x173800UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/include/
H A Dhwreg_hdcp.h102 #define REG_HDCPKEY_00_L (REG_HDCPKEY_BASE + 0x00)
103 #define REG_HDCPKEY_01_L (REG_HDCPKEY_BASE + 0x02)
104 #define REG_HDCPKEY_04_L (REG_HDCPKEY_BASE + 0x08)
105 #define REG_HDCPKEY_04_H (REG_HDCPKEY_BASE + 0x09)
106 #define REG_HDCPKEY_05_L (REG_HDCPKEY_BASE + 0x0A)
107 #define REG_HDCPKEY_05_H (REG_HDCPKEY_BASE + 0x0B)
108 #define REG_HDCPKEY_0E_L (REG_HDCPKEY_BASE + 0x1C)
109 #define REG_HDCPKEY_0E_H (REG_HDCPKEY_BASE + 0x1D)
H A Dmhal_xc_chip_config.h413 #define REG_HDCPKEY_BASE 0x123A00 macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/include/
H A Dhwreg_hdcp.h102 #define REG_HDCPKEY_00_L (REG_HDCPKEY_BASE + 0x00)
103 #define REG_HDCPKEY_01_L (REG_HDCPKEY_BASE + 0x02)
104 #define REG_HDCPKEY_04_L (REG_HDCPKEY_BASE + 0x08)
105 #define REG_HDCPKEY_04_H (REG_HDCPKEY_BASE + 0x09)
106 #define REG_HDCPKEY_05_L (REG_HDCPKEY_BASE + 0x0A)
107 #define REG_HDCPKEY_05_H (REG_HDCPKEY_BASE + 0x0B)
108 #define REG_HDCPKEY_0E_L (REG_HDCPKEY_BASE + 0x1C)
109 #define REG_HDCPKEY_0E_H (REG_HDCPKEY_BASE + 0x1D)
H A Dmhal_xc_chip_config.h413 #define REG_HDCPKEY_BASE 0x123A00 macro

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