| /utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/ |
| H A D | Maserati_2D_4K2K.c | 221 MDrv_WriteByteMask( REG_FRC_BK13C_BB , 0x04, 0x1f); // reg_opm_meds_vlen in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 642 MDrv_WriteByteMask( REG_FRC_BK13C_BB , 0x04, 0x1f); // reg_opm_meds_vlen in MFC_3D_2D_4K2K_2D_FHD_YUV() 1063 MDrv_WriteByteMask( REG_FRC_BK13C_BB , 0x04, 0x1f); // reg_opm_meds_vlen in MFC_3D_2D_4K2K_2D_4K2K_RGB_BYPASS() 1484 MDrv_WriteByteMask( REG_FRC_BK13C_BB , 0x04, 0x1f); // reg_opm_meds_vlen in MFC_3D_2D_4K2K_2D_4K2K_YUV() 1905 MDrv_WriteByteMask( REG_FRC_BK13C_BB , 0x04, 0x1f); // reg_opm_meds_vlen in MFC_3D_2D_4K2K_2D_2205_RGB_BYPASS() 2326 MDrv_WriteByteMask( REG_FRC_BK13C_BB , 0x04, 0x1f); // reg_opm_meds_vlen in MFC_3D_2D_4K2K_2D_2205_YUV()
|
| H A D | Maserati_2D_FHD.c | 221 MDrv_WriteByteMask( REG_FRC_BK13C_BB , 0x02, 0x1f); // reg_opm_meds_vlen in MFC_3D_2D_FHD_2D_FHD_RGB_BYPASS() 642 MDrv_WriteByteMask( REG_FRC_BK13C_BB , 0x02, 0x1f); // reg_opm_meds_vlen in MFC_3D_2D_FHD_2D_FHD_YUV()
|
| H A D | Maserati_2D_480.c | 221 MDrv_WriteByteMask( REG_FRC_BK13C_BB , 0x02, 0x1f); // reg_opm_meds_vlen in MFC_3D_2D_480_2D_480_RGB_BYPASS() 671 MDrv_WriteByteMask( REG_FRC_BK13C_BB , 0x02, 0x1f); // reg_opm_meds_vlen in MFC_3D_2D_480_2D_480_YUV()
|
| H A D | Maserati_2D_576.c | 221 MDrv_WriteByteMask( REG_FRC_BK13C_BB , 0x02, 0x1f); // reg_opm_meds_vlen in MFC_3D_2D_576_2D_576_RGB_BYPASS() 671 MDrv_WriteByteMask( REG_FRC_BK13C_BB , 0x02, 0x1f); // reg_opm_meds_vlen in MFC_3D_2D_576_2D_576_YUV()
|
| H A D | Maserati_2D_720.c | 221 MDrv_WriteByteMask( REG_FRC_BK13C_BB , 0x02, 0x1f); // reg_opm_meds_vlen in MFC_3D_2D_720_2D_720_RGB_BYPASS() 671 MDrv_WriteByteMask( REG_FRC_BK13C_BB , 0x02, 0x1f); // reg_opm_meds_vlen in MFC_3D_2D_720_2D_720_YUV()
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/ |
| H A D | Maserati_2D_4K2K.c | 221 MDrv_WriteByteMask( REG_FRC_BK13C_BB , 0x04, 0x1f); // reg_opm_meds_vlen in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 642 MDrv_WriteByteMask( REG_FRC_BK13C_BB , 0x04, 0x1f); // reg_opm_meds_vlen in MFC_3D_2D_4K2K_2D_FHD_YUV() 1063 MDrv_WriteByteMask( REG_FRC_BK13C_BB , 0x04, 0x1f); // reg_opm_meds_vlen in MFC_3D_2D_4K2K_2D_4K2K_RGB_BYPASS() 1484 MDrv_WriteByteMask( REG_FRC_BK13C_BB , 0x04, 0x1f); // reg_opm_meds_vlen in MFC_3D_2D_4K2K_2D_4K2K_YUV() 1905 MDrv_WriteByteMask( REG_FRC_BK13C_BB , 0x04, 0x1f); // reg_opm_meds_vlen in MFC_3D_2D_4K2K_2D_2205_RGB_BYPASS() 2326 MDrv_WriteByteMask( REG_FRC_BK13C_BB , 0x04, 0x1f); // reg_opm_meds_vlen in MFC_3D_2D_4K2K_2D_2205_YUV()
|
| H A D | Maserati_2D_FHD.c | 221 MDrv_WriteByteMask( REG_FRC_BK13C_BB , 0x02, 0x1f); // reg_opm_meds_vlen in MFC_3D_2D_FHD_2D_FHD_RGB_BYPASS() 642 MDrv_WriteByteMask( REG_FRC_BK13C_BB , 0x02, 0x1f); // reg_opm_meds_vlen in MFC_3D_2D_FHD_2D_FHD_YUV()
|
| H A D | Maserati_2D_720.c | 221 MDrv_WriteByteMask( REG_FRC_BK13C_BB , 0x02, 0x1f); // reg_opm_meds_vlen in MFC_3D_2D_720_2D_720_RGB_BYPASS() 671 MDrv_WriteByteMask( REG_FRC_BK13C_BB , 0x02, 0x1f); // reg_opm_meds_vlen in MFC_3D_2D_720_2D_720_YUV()
|
| H A D | Maserati_2D_480.c | 221 MDrv_WriteByteMask( REG_FRC_BK13C_BB , 0x02, 0x1f); // reg_opm_meds_vlen in MFC_3D_2D_480_2D_480_RGB_BYPASS() 671 MDrv_WriteByteMask( REG_FRC_BK13C_BB , 0x02, 0x1f); // reg_opm_meds_vlen in MFC_3D_2D_480_2D_480_YUV()
|
| H A D | Maserati_2D_576.c | 221 MDrv_WriteByteMask( REG_FRC_BK13C_BB , 0x02, 0x1f); // reg_opm_meds_vlen in MFC_3D_2D_576_2D_576_RGB_BYPASS() 671 MDrv_WriteByteMask( REG_FRC_BK13C_BB , 0x02, 0x1f); // reg_opm_meds_vlen in MFC_3D_2D_576_2D_576_YUV()
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/ |
| H A D | Maxim_2D_4K2K.c | 164 MDrv_WriteByteMask( REG_FRC_BK13C_BB , 0x04, 0x1f); // reg_opm_meds_vlen in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 508 MDrv_WriteByteMask( REG_FRC_BK13C_BB , 0x04, 0x1f); // reg_opm_meds_vlen in MFC_3D_2D_4K2K_2D_FHD_YUV() 852 MDrv_WriteByteMask( REG_FRC_BK13C_BB , 0x04, 0x1f); // reg_opm_meds_vlen in MFC_3D_2D_4K2K_2D_4K2K_RGB_BYPASS() 1196 MDrv_WriteByteMask( REG_FRC_BK13C_BB , 0x04, 0x1f); // reg_opm_meds_vlen in MFC_3D_2D_4K2K_2D_4K2K_YUV()
|
| H A D | Maxim_2D_FHD.c | 164 MDrv_WriteByteMask( REG_FRC_BK13C_BB , 0x02, 0x1f); // reg_opm_meds_vlen in MFC_3D_2D_FHD_2D_FHD_RGB_BYPASS() 508 MDrv_WriteByteMask( REG_FRC_BK13C_BB , 0x02, 0x1f); // reg_opm_meds_vlen in MFC_3D_2D_FHD_2D_FHD_YUV()
|
| H A D | Maxim_ACT_4K0_5K.c | 164 MDrv_WriteByteMask( REG_FRC_BK13C_BB , 0x02, 0x1f); // reg_opm_meds_vlen in MFC_3D_4K0_5K_ACT_3D_4K0_5K_ACT_NO_FRC()
|
| H A D | Maxim_FRC_ACT_4K0_5K_LLRR_240.c | 164 MDrv_WriteByteMask( REG_FRC_BK13C_BB , 0x01, 0x1f); // reg_opm_meds_vlen in MFC_3D_FRC_ACT_4K0_5K_LLRR_240_3D_FHD_TB()
|
| H A D | Maxim_FRC_ACT_4K1K_LLRR_240.c | 164 MDrv_WriteByteMask( REG_FRC_BK13C_BB , 0x02, 0x1f); // reg_opm_meds_vlen in MFC_3D_FRC_ACT_4K1K_LLRR_240_3D_FHD_TB()
|
| H A D | Maxim_ACT_4K1K.c | 164 MDrv_WriteByteMask( REG_FRC_BK13C_BB , 0x02, 0x1f); // reg_opm_meds_vlen in MFC_3D_4K1K_ACT_3D_4K1K_ACT_NO_FRC()
|
| H A D | Maxim_FRC_ACT_4K2K_120.c | 164 MDrv_WriteByteMask( REG_FRC_BK13C_BB , 0x02, 0x1f); // reg_opm_meds_vlen in MFC_3D_FRC_ACT_4K2K_120_3D_FHD_TB()
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/ |
| H A D | Maxim_2D_4K2K.c | 164 MDrv_WriteByteMask( REG_FRC_BK13C_BB , 0x04, 0x1f); // reg_opm_meds_vlen in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 508 MDrv_WriteByteMask( REG_FRC_BK13C_BB , 0x04, 0x1f); // reg_opm_meds_vlen in MFC_3D_2D_4K2K_2D_FHD_YUV() 852 MDrv_WriteByteMask( REG_FRC_BK13C_BB , 0x04, 0x1f); // reg_opm_meds_vlen in MFC_3D_2D_4K2K_2D_4K2K_RGB_BYPASS() 1196 MDrv_WriteByteMask( REG_FRC_BK13C_BB , 0x04, 0x1f); // reg_opm_meds_vlen in MFC_3D_2D_4K2K_2D_4K2K_YUV()
|
| H A D | Maxim_2D_FHD.c | 164 MDrv_WriteByteMask( REG_FRC_BK13C_BB , 0x02, 0x1f); // reg_opm_meds_vlen in MFC_3D_2D_FHD_2D_FHD_RGB_BYPASS() 508 MDrv_WriteByteMask( REG_FRC_BK13C_BB , 0x02, 0x1f); // reg_opm_meds_vlen in MFC_3D_2D_FHD_2D_FHD_YUV()
|
| H A D | Maxim_FRC_ACT_4K0_5K_LLRR_240.c | 164 MDrv_WriteByteMask( REG_FRC_BK13C_BB , 0x01, 0x1f); // reg_opm_meds_vlen in MFC_3D_FRC_ACT_4K0_5K_LLRR_240_3D_FHD_TB()
|
| H A D | Maxim_FRC_PAS_4K2K_120.c | 164 MDrv_WriteByteMask( REG_FRC_BK13C_BB , 0x02, 0x1f); // reg_opm_meds_vlen in MFC_3D_FRC_PAS_4K2K_120_3D_FHD_TB()
|
| H A D | Maxim_FRC_ACT_4K1K_LLRR_240.c | 164 MDrv_WriteByteMask( REG_FRC_BK13C_BB , 0x02, 0x1f); // reg_opm_meds_vlen in MFC_3D_FRC_ACT_4K1K_LLRR_240_3D_FHD_TB()
|
| H A D | Maxim_FRC_ACT_4K1K_120.c | 164 MDrv_WriteByteMask( REG_FRC_BK13C_BB , 0x02, 0x1f); // reg_opm_meds_vlen in MFC_3D_FRC_ACT_4K1K_120_3D_FHD_TB()
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/ |
| H A D | Manhattan_2D_4K2K.c | 232 MDrv_WriteByteMask( REG_FRC_BK13C_BB , 0x04, 0x1f); // reg_opm_meds_vlen in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 700 MDrv_WriteByteMask( REG_FRC_BK13C_BB , 0x04, 0x1f); // reg_opm_meds_vlen in MFC_3D_2D_4K2K_2D_FHD_YUV() 1168 MDrv_WriteByteMask( REG_FRC_BK13C_BB , 0x04, 0x1f); // reg_opm_meds_vlen in MFC_3D_2D_4K2K_2D_4K2K_RGB_BYPASS() 1636 MDrv_WriteByteMask( REG_FRC_BK13C_BB , 0x04, 0x1f); // reg_opm_meds_vlen in MFC_3D_2D_4K2K_2D_4K2K_YUV()
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/ |
| H A D | Manhattan_2D_4K2K.c | 232 MDrv_WriteByteMask( REG_FRC_BK13C_BB , 0x04, 0x1f); // reg_opm_meds_vlen in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 700 MDrv_WriteByteMask( REG_FRC_BK13C_BB , 0x04, 0x1f); // reg_opm_meds_vlen in MFC_3D_2D_4K2K_2D_FHD_YUV() 1168 MDrv_WriteByteMask( REG_FRC_BK13C_BB , 0x04, 0x1f); // reg_opm_meds_vlen in MFC_3D_2D_4K2K_2D_4K2K_RGB_BYPASS() 1636 MDrv_WriteByteMask( REG_FRC_BK13C_BB , 0x04, 0x1f); // reg_opm_meds_vlen in MFC_3D_2D_4K2K_2D_4K2K_YUV()
|