| /utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/ |
| H A D | hwreg_dvi_atop.h | 296 #define REG_DVI_ATOP_61_L (REG_DVI_ATOP_BASE + 0xC2) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/ |
| H A D | hwreg_dvi_atop.h | 296 #define REG_DVI_ATOP_61_L (REG_DVI_ATOP_BASE + 0xC2) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/ |
| H A D | hwreg_dvi_atop.h | 296 #define REG_DVI_ATOP_61_L (REG_DVI_ATOP_BASE + 0xC2) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/ |
| H A D | hwreg_dvi_atop.h | 296 #define REG_DVI_ATOP_61_L (REG_DVI_ATOP_BASE + 0xC2) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/ |
| H A D | hwreg_dvi_atop.h | 296 #define REG_DVI_ATOP_61_L (REG_DVI_ATOP_BASE + 0xC2) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/include/ |
| H A D | hwreg_dvi_atop.h | 296 #define REG_DVI_ATOP_61_L (REG_DVI_ATOP_BASE + 0xC2) macro
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| H A D | hwreg_hdmi.h | 727 #define REG_DVI_ATOP_61_L (REG_DVI_ATOP_BASE + 0xC2) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/ |
| H A D | hwreg_dvi_atop.h | 296 #define REG_DVI_ATOP_61_L (REG_DVI_ATOP_BASE + 0xC2) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/ |
| H A D | hwreg_dvi_atop.h | 296 #define REG_DVI_ATOP_61_L (REG_DVI_ATOP_BASE + 0xC2) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/include/ |
| H A D | hwreg_dvi_atop.h | 296 #define REG_DVI_ATOP_61_L (REG_DVI_ATOP_BASE + 0xC2) macro
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| H A D | hwreg_hdmi.h | 727 #define REG_DVI_ATOP_61_L (REG_DVI_ATOP_BASE + 0xC2) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/ |
| H A D | hwreg_dvi_atop.h | 296 #define REG_DVI_ATOP_61_L (REG_DVI_ATOP_BASE + 0xC2) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/ |
| H A D | hwreg_dvi_atop.h | 296 #define REG_DVI_ATOP_61_L (REG_DVI_ATOP_BASE + 0xC2) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/ |
| H A D | hwreg_dvi_atop.h | 296 #define REG_DVI_ATOP_61_L (REG_DVI_ATOP_BASE + 0xC2) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/ |
| H A D | hwreg_dvi_atop.h | 296 #define REG_DVI_ATOP_61_L (REG_DVI_ATOP_BASE + 0xC2) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/ |
| H A D | hwreg_dvi_atop.h | 296 #define REG_DVI_ATOP_61_L (REG_DVI_ATOP_BASE + 0xC2) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/ |
| H A D | hwreg_dvi_atop.h | 296 #define REG_DVI_ATOP_61_L (REG_DVI_ATOP_BASE + 0xC2) macro
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| /utopia/UTPA2-700.0.x/modules/xc/drv/xc/ |
| H A D | mdrv_hdmi.c | 3260 if( R2BYTEMSK(REG_DVI_ATOP_61_L, BMASK(9:8)) == 2<<8 || in MDrv_HDMI_SetUpdatePhaseLineCount_U2()
3261 R2BYTEMSK(REG_DVI_ATOP_61_L, BMASK(9:8)) == 3<<8 ) //<50Mhz in MDrv_HDMI_SetUpdatePhaseLineCount_U2()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/ |
| H A D | mhal_hdmi.c | 2663 temp = (R2BYTE(REG_DVI_ATOP_61_L) & 0x0300)>>8; in Hal_DVI_HF_adjust()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/ |
| H A D | mhal_hdmi.c | 3471 ucDivValue = (R2BYTE(REG_DVI_ATOP_61_L) &BMASK(9:8)) >> 8; in Hal_HDMI_StablePolling()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/ |
| H A D | mhal_hdmi.c | 3471 ucDivValue = (R2BYTE(REG_DVI_ATOP_61_L) &BMASK(9:8)) >> 8; in Hal_HDMI_StablePolling()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/ |
| H A D | mhal_hdmi.c | 3400 temp = (R2BYTE(REG_DVI_ATOP_61_L) & 0x0300)>>8; in Hal_DVI_HF_adjust()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/ |
| H A D | mhal_hdmi.c | 5022 temp = (R2BYTE(REG_DVI_ATOP_61_L) & 0x0300)>>8; in Hal_DVI_HF_adjust()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/ |
| H A D | mhal_hdmi.c | 5122 temp = (R2BYTE(REG_DVI_ATOP_61_L) & 0x0300)>>8; in Hal_DVI_HF_adjust()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/ |
| H A D | mhal_hdmi.c | 5160 temp = (R2BYTE(REG_DVI_ATOP_61_L) & 0x0300)>>8; in Hal_DVI_HF_adjust()
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