Searched refs:REG_CLKGEN0_TSN_CLK2 (Results 1 – 7 of 7) sorted by relevance
241 #define REG_CLKGEN0_TSN_CLK2 0x29UL macro2204 …u32data = TSP_CLKGEN0_REG(REG_CLKGEN0_TSN_CLK2) & ~(REG_CLKGEN0_TSN_CLK_MASK<< REG_CLKGEN0_TSN_CLK… in HAL_TSP_SelPad_ClkInv()2206 TSP_CLKGEN0_REG(REG_CLKGEN0_TSN_CLK2) = u32data; in HAL_TSP_SelPad_ClkInv()3244 …*pu16Clk = (TSP_CLKGEN0_REG(REG_CLKGEN0_TSN_CLK2) >> REG_CLKGEN0_TSN_CLK_TS2_SHIFT) & REG_CLKGEN… in HAL_TSP_GetTSIF_Status()
255 #define REG_CLKGEN0_TSN_CLK2 0x29UL macro2226 …u32data = TSP_CLKGEN0_REG(REG_CLKGEN0_TSN_CLK2) & ~(REG_CLKGEN0_TSN_CLK_MASK<< REG_CLKGEN0_TSN_CLK… in HAL_TSP_SelPad_ClkInv()2228 TSP_CLKGEN0_REG(REG_CLKGEN0_TSN_CLK2) = u32data; in HAL_TSP_SelPad_ClkInv()3270 …*pu16Clk = (TSP_CLKGEN0_REG(REG_CLKGEN0_TSN_CLK2) >> REG_CLKGEN0_TSN_CLK_TS2_SHIFT) & REG_CLKGEN… in HAL_TSP_GetTSIF_Status()
251 #define REG_CLKGEN0_TSN_CLK2 0x25UL macro2084 …u32data = TSP_CLKGEN0_REG(REG_CLKGEN0_TSN_CLK2) & ~(REG_CLKGEN0_TSN_CLK_MASK<< REG_CLKGEN0_TSN_CLK… in HAL_TSP_SelPad_ClkInv()2086 TSP_CLKGEN0_REG(REG_CLKGEN0_TSN_CLK2) = u32data; in HAL_TSP_SelPad_ClkInv()3208 …*pu16Clk = (TSP_CLKGEN0_REG(REG_CLKGEN0_TSN_CLK2) >> REG_CLKGEN0_TSN_CLK_TS2_SHIFT) & REG_CLKGEN… in HAL_TSP_GetTSIF_Status()
257 #define REG_CLKGEN0_TSN_CLK2 0x29UL macro2279 …u32data = TSP_CLKGEN0_REG(REG_CLKGEN0_TSN_CLK2) & ~(REG_CLKGEN0_TSN_CLK_MASK<< REG_CLKGEN0_TSN_CLK… in HAL_TSP_SelPad_ClkInv()2281 TSP_CLKGEN0_REG(REG_CLKGEN0_TSN_CLK2) = u32data; in HAL_TSP_SelPad_ClkInv()3456 …*pu16Clk = (TSP_CLKGEN0_REG(REG_CLKGEN0_TSN_CLK2) >> REG_CLKGEN0_TSN_CLK_TS2_SHIFT) & REG_CLKGEN… in HAL_TSP_GetTSIF_Status()
257 #define REG_CLKGEN0_TSN_CLK2 0x29UL macro2279 …u32data = TSP_CLKGEN0_REG(REG_CLKGEN0_TSN_CLK2) & ~(REG_CLKGEN0_TSN_CLK_MASK<< REG_CLKGEN0_TSN_CLK… in HAL_TSP_SelPad_ClkInv()2281 TSP_CLKGEN0_REG(REG_CLKGEN0_TSN_CLK2) = u32data; in HAL_TSP_SelPad_ClkInv()3439 …*pu16Clk = (TSP_CLKGEN0_REG(REG_CLKGEN0_TSN_CLK2) >> REG_CLKGEN0_TSN_CLK_TS2_SHIFT) & REG_CLKGEN… in HAL_TSP_GetTSIF_Status()
260 #define REG_CLKGEN0_TSN_CLK2 0x29UL macro2350 …u32data = TSP_CLKGEN0_REG(REG_CLKGEN0_TSN_CLK2) & ~(REG_CLKGEN0_TSN_CLK_MASK<< REG_CLKGEN0_TSN_CLK… in HAL_TSP_SelPad_ClkInv()2352 TSP_CLKGEN0_REG(REG_CLKGEN0_TSN_CLK2) = u32data; in HAL_TSP_SelPad_ClkInv()3535 …*pu16Clk = (TSP_CLKGEN0_REG(REG_CLKGEN0_TSN_CLK2) >> REG_CLKGEN0_TSN_CLK_TS2_SHIFT) & REG_CLKGEN… in HAL_TSP_GetTSIF_Status()
260 #define REG_CLKGEN0_TSN_CLK2 0x29UL macro2311 …u32data = TSP_CLKGEN0_REG(REG_CLKGEN0_TSN_CLK2) & ~(REG_CLKGEN0_TSN_CLK_MASK<< REG_CLKGEN0_TSN_CLK… in HAL_TSP_SelPad_ClkInv()2313 TSP_CLKGEN0_REG(REG_CLKGEN0_TSN_CLK2) = u32data; in HAL_TSP_SelPad_ClkInv()3496 …*pu16Clk = (TSP_CLKGEN0_REG(REG_CLKGEN0_TSN_CLK2) >> REG_CLKGEN0_TSN_CLK_TS2_SHIFT) & REG_CLKGEN… in HAL_TSP_GetTSIF_Status()