| /utopia/UTPA2-700.0.x/modules/dlc/hal/curry/dlc/ |
| H A D | MsDlc.c | 375 msWriteByte((REG_ADDR_DLC_DATA_START_MAIN+ucTmp), g_ucTable[ucTmp]); in msDlcInitWithCurve()
2428 msWriteByte((REG_ADDR_DLC_DATA_START_MAIN+ucTmp), g_ucTable[ucTmp]); in msDlcWriteCurve()
2455 msWriteByte((REG_ADDR_DLC_DATA_START_MAIN+ucTmp), g_ucTable[ucTmp]); in msDlcWriteCurve()
2569 msWriteByte((REG_ADDR_DLC_DATA_START_MAIN+ucTmp), g_ucTable[ucTmp]); in msDlcWriteCurve()
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| /utopia/UTPA2-700.0.x/modules/dlc/hal/M7821/dlc/ |
| H A D | MsDlc.c | 384 msWriteByte((REG_ADDR_DLC_DATA_START_MAIN+ucTmp), g_ucTable[ucTmp]); in msDlcInitWithCurve()
2528 msWriteByte((REG_ADDR_DLC_DATA_START_MAIN+ucTmp), g_ucTable[ucTmp]); in msDlcWriteCurve()
2573 msWriteByte((REG_ADDR_DLC_DATA_START_MAIN+ucTmp), g_ucTable[ucTmp]); in msDlcWriteCurve()
2639 msWriteByte((REG_ADDR_DLC_DATA_START_MAIN+ucTmp), g_ucTable[ucTmp]); in msDlcWriteCurve()
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| /utopia/UTPA2-700.0.x/modules/dlc/hal/k6lite/dlc/ |
| H A D | MsDlc.c | 375 msWriteByte((REG_ADDR_DLC_DATA_START_MAIN+ucTmp), g_ucTable[ucTmp]); in msDlcInitWithCurve()
2428 msWriteByte((REG_ADDR_DLC_DATA_START_MAIN+ucTmp), g_ucTable[ucTmp]); in msDlcWriteCurve()
2455 msWriteByte((REG_ADDR_DLC_DATA_START_MAIN+ucTmp), g_ucTable[ucTmp]); in msDlcWriteCurve()
2569 msWriteByte((REG_ADDR_DLC_DATA_START_MAIN+ucTmp), g_ucTable[ucTmp]); in msDlcWriteCurve()
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| /utopia/UTPA2-700.0.x/modules/dlc/hal/k6/dlc/ |
| H A D | MsDlc.c | 375 msWriteByte((REG_ADDR_DLC_DATA_START_MAIN+ucTmp), g_ucTable[ucTmp]); in msDlcInitWithCurve()
2428 msWriteByte((REG_ADDR_DLC_DATA_START_MAIN+ucTmp), g_ucTable[ucTmp]); in msDlcWriteCurve()
2455 msWriteByte((REG_ADDR_DLC_DATA_START_MAIN+ucTmp), g_ucTable[ucTmp]); in msDlcWriteCurve()
2569 msWriteByte((REG_ADDR_DLC_DATA_START_MAIN+ucTmp), g_ucTable[ucTmp]); in msDlcWriteCurve()
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| /utopia/UTPA2-700.0.x/modules/dlc/hal/kano/dlc/ |
| H A D | MsDlc.c | 375 msWriteByte((REG_ADDR_DLC_DATA_START_MAIN+ucTmp), g_ucTable[ucTmp]); in msDlcInitWithCurve()
2428 msWriteByte((REG_ADDR_DLC_DATA_START_MAIN+ucTmp), g_ucTable[ucTmp]); in msDlcWriteCurve()
2455 msWriteByte((REG_ADDR_DLC_DATA_START_MAIN+ucTmp), g_ucTable[ucTmp]); in msDlcWriteCurve()
2569 msWriteByte((REG_ADDR_DLC_DATA_START_MAIN+ucTmp), g_ucTable[ucTmp]); in msDlcWriteCurve()
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| /utopia/UTPA2-700.0.x/modules/dlc/hal/maserati/dlc/ |
| H A D | MsDlc.c | 384 msWriteByte((REG_ADDR_DLC_DATA_START_MAIN+ucTmp), g_ucTable[ucTmp]); in msDlcInitWithCurve()
2528 msWriteByte((REG_ADDR_DLC_DATA_START_MAIN+ucTmp), g_ucTable[ucTmp]); in msDlcWriteCurve()
2573 msWriteByte((REG_ADDR_DLC_DATA_START_MAIN+ucTmp), g_ucTable[ucTmp]); in msDlcWriteCurve()
2639 msWriteByte((REG_ADDR_DLC_DATA_START_MAIN+ucTmp), g_ucTable[ucTmp]); in msDlcWriteCurve()
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| /utopia/UTPA2-700.0.x/modules/dlc/hal/mustang/dlc/ |
| H A D | MsDlc.c | 369 msWriteByte((REG_ADDR_DLC_DATA_START_MAIN+ucTmp), g_ucTable[ucTmp]); in msDlcInitWithCurve()
2598 msWriteByte((REG_ADDR_DLC_DATA_START_MAIN+ucTmp), g_ucTable[ucTmp]); in msDlcWriteCurve()
2643 msWriteByte((REG_ADDR_DLC_DATA_START_MAIN+ucTmp), g_ucTable[ucTmp]); in msDlcWriteCurve()
2827 msWriteByte((REG_ADDR_DLC_DATA_START_MAIN+ucTmp), g_ucTable[ucTmp]); in msDlcWriteCurve()
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| /utopia/UTPA2-700.0.x/modules/dlc/hal/manhattan/dlc/ |
| H A D | MsDlc.c | 369 msWriteByte((REG_ADDR_DLC_DATA_START_MAIN+ucTmp), g_ucTable[ucTmp]); in msDlcInitWithCurve()
2614 msWriteByte((REG_ADDR_DLC_DATA_START_MAIN+ucTmp), g_ucTable[ucTmp]); in msDlcWriteCurve()
2659 msWriteByte((REG_ADDR_DLC_DATA_START_MAIN+ucTmp), g_ucTable[ucTmp]); in msDlcWriteCurve()
2843 msWriteByte((REG_ADDR_DLC_DATA_START_MAIN+ucTmp), g_ucTable[ucTmp]); in msDlcWriteCurve()
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| /utopia/UTPA2-700.0.x/modules/dlc/hal/maldives/dlc/ |
| H A D | MsDlc.c | 369 msWriteByte((REG_ADDR_DLC_DATA_START_MAIN+ucTmp), g_ucTable[ucTmp]); in msDlcInitWithCurve()
2598 msWriteByte((REG_ADDR_DLC_DATA_START_MAIN+ucTmp), g_ucTable[ucTmp]); in msDlcWriteCurve()
2643 msWriteByte((REG_ADDR_DLC_DATA_START_MAIN+ucTmp), g_ucTable[ucTmp]); in msDlcWriteCurve()
2827 msWriteByte((REG_ADDR_DLC_DATA_START_MAIN+ucTmp), g_ucTable[ucTmp]); in msDlcWriteCurve()
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| /utopia/UTPA2-700.0.x/modules/dlc/hal/M7621/dlc/ |
| H A D | MsDlc.c | 369 msWriteByte((REG_ADDR_DLC_DATA_START_MAIN+ucTmp), g_ucTable[ucTmp]); in msDlcInitWithCurve()
2614 msWriteByte((REG_ADDR_DLC_DATA_START_MAIN+ucTmp), g_ucTable[ucTmp]); in msDlcWriteCurve()
2659 msWriteByte((REG_ADDR_DLC_DATA_START_MAIN+ucTmp), g_ucTable[ucTmp]); in msDlcWriteCurve()
2843 msWriteByte((REG_ADDR_DLC_DATA_START_MAIN+ucTmp), g_ucTable[ucTmp]); in msDlcWriteCurve()
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| /utopia/UTPA2-700.0.x/modules/dlc/hal/maxim/dlc/ |
| H A D | MsDlc.c | 369 msWriteByte((REG_ADDR_DLC_DATA_START_MAIN+ucTmp), g_ucTable[ucTmp]); in msDlcInitWithCurve()
2616 msWriteByte((REG_ADDR_DLC_DATA_START_MAIN+ucTmp), g_ucTable[ucTmp]); in msDlcWriteCurve()
2661 msWriteByte((REG_ADDR_DLC_DATA_START_MAIN+ucTmp), g_ucTable[ucTmp]); in msDlcWriteCurve()
2845 msWriteByte((REG_ADDR_DLC_DATA_START_MAIN+ucTmp), g_ucTable[ucTmp]); in msDlcWriteCurve()
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| /utopia/UTPA2-700.0.x/modules/dlc/hal/messi/dlc/ |
| H A D | MsDlc.c | 369 msWriteByte((REG_ADDR_DLC_DATA_START_MAIN+ucTmp), g_ucTable[ucTmp]); in msDlcInitWithCurve()
2598 msWriteByte((REG_ADDR_DLC_DATA_START_MAIN+ucTmp), g_ucTable[ucTmp]); in msDlcWriteCurve()
2643 msWriteByte((REG_ADDR_DLC_DATA_START_MAIN+ucTmp), g_ucTable[ucTmp]); in msDlcWriteCurve()
2827 msWriteByte((REG_ADDR_DLC_DATA_START_MAIN+ucTmp), g_ucTable[ucTmp]); in msDlcWriteCurve()
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| /utopia/UTPA2-700.0.x/modules/dlc/hal/mainz/dlc/ |
| H A D | MsDlc.c | 369 msWriteByte((REG_ADDR_DLC_DATA_START_MAIN+ucTmp), g_ucTable[ucTmp]); in msDlcInitWithCurve()
2598 msWriteByte((REG_ADDR_DLC_DATA_START_MAIN+ucTmp), g_ucTable[ucTmp]); in msDlcWriteCurve()
2643 msWriteByte((REG_ADDR_DLC_DATA_START_MAIN+ucTmp), g_ucTable[ucTmp]); in msDlcWriteCurve()
2827 msWriteByte((REG_ADDR_DLC_DATA_START_MAIN+ucTmp), g_ucTable[ucTmp]); in msDlcWriteCurve()
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| /utopia/UTPA2-700.0.x/modules/dlc/hal/mooney/dlc/ |
| H A D | MsDlc.c | 369 msWriteByte((REG_ADDR_DLC_DATA_START_MAIN+ucTmp), g_ucTable[ucTmp]); in msDlcInitWithCurve()
2614 msWriteByte((REG_ADDR_DLC_DATA_START_MAIN+ucTmp), g_ucTable[ucTmp]); in msDlcWriteCurve()
2659 msWriteByte((REG_ADDR_DLC_DATA_START_MAIN+ucTmp), g_ucTable[ucTmp]); in msDlcWriteCurve()
2843 msWriteByte((REG_ADDR_DLC_DATA_START_MAIN+ucTmp), g_ucTable[ucTmp]); in msDlcWriteCurve()
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| /utopia/UTPA2-700.0.x/modules/dlc/hal/macan/dlc/ |
| H A D | MsDlc.c | 369 msWriteByte((REG_ADDR_DLC_DATA_START_MAIN+ucTmp), g_ucTable[ucTmp]); in msDlcInitWithCurve()
2614 msWriteByte((REG_ADDR_DLC_DATA_START_MAIN+ucTmp), g_ucTable[ucTmp]); in msDlcWriteCurve()
2659 msWriteByte((REG_ADDR_DLC_DATA_START_MAIN+ucTmp), g_ucTable[ucTmp]); in msDlcWriteCurve()
2843 msWriteByte((REG_ADDR_DLC_DATA_START_MAIN+ucTmp), g_ucTable[ucTmp]); in msDlcWriteCurve()
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| /utopia/UTPA2-700.0.x/modules/dlc/hal/M7821/dlc/include/ |
| H A D | MsDlc_LIB_Group_DTV3.h | 202 #define REG_ADDR_DLC_DATA_START_MAIN L_BK_DLC(0x30) macro
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| /utopia/UTPA2-700.0.x/modules/dlc/hal/maserati/dlc/include/ |
| H A D | MsDlc_LIB_Group_DTV3.h | 202 #define REG_ADDR_DLC_DATA_START_MAIN L_BK_DLC(0x30) macro
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| /utopia/UTPA2-700.0.x/modules/dlc/hal/k6/dlc/include/ |
| H A D | MsDlc_LIB_Group_DTV2.h | 203 #define REG_ADDR_DLC_DATA_START_MAIN L_BK_DLC(0x30) macro
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| /utopia/UTPA2-700.0.x/modules/dlc/hal/curry/dlc/include/ |
| H A D | MsDlc_LIB_Group_DTV2.h | 203 #define REG_ADDR_DLC_DATA_START_MAIN L_BK_DLC(0x30) macro
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| /utopia/UTPA2-700.0.x/modules/dlc/hal/kano/dlc/include/ |
| H A D | MsDlc_LIB_Group_DTV2.h | 203 #define REG_ADDR_DLC_DATA_START_MAIN L_BK_DLC(0x30) macro
|
| /utopia/UTPA2-700.0.x/modules/dlc/hal/k6lite/dlc/include/ |
| H A D | MsDlc_LIB_Group_DTV2.h | 203 #define REG_ADDR_DLC_DATA_START_MAIN L_BK_DLC(0x30) macro
|
| /utopia/UTPA2-700.0.x/modules/dlc/hal/maldives/dlc/include/ |
| H A D | MsDlc_LIB_Group_DTV3.h | 201 #define REG_ADDR_DLC_DATA_START_MAIN L_BK_DLC(0x30) macro
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| /utopia/UTPA2-700.0.x/modules/dlc/hal/mustang/dlc/include/ |
| H A D | MsDlc_LIB_Group_DTV3.h | 201 #define REG_ADDR_DLC_DATA_START_MAIN L_BK_DLC(0x30) macro
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| /utopia/UTPA2-700.0.x/modules/dlc/hal/maxim/dlc/include/ |
| H A D | MsDlc_LIB_Group_DTV3.h | 204 #define REG_ADDR_DLC_DATA_START_MAIN L_BK_DLC(0x30) macro
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| /utopia/UTPA2-700.0.x/modules/dlc/hal/macan/dlc/include/ |
| H A D | MsDlc_LIB_Group_DTV3.h | 204 #define REG_ADDR_DLC_DATA_START_MAIN L_BK_DLC(0x30) macro
|